28 nm PMOS器件中Ge注入对NBTI可靠性的影响
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摘要
研究了28 nm多晶硅栅工艺中Ge注入对PMOS器件的负偏压温度不稳定性(NBTI)的影响。在N阱中注入Ge,制作了具有SiGe沟道的PMOS量子阱器件。针对不同栅氧厚度和不同应力条件的器件,采用动态测量方法测量了NBTI的退化情况,采用电荷泵方法测量了界面态的变化情况。实验结果表明,由于Ge的注入,PMOS器件中饱和漏电流的退化量降低了43%,同时应力过程中产生的界面态得到减少,有效提高了PMOS器件的NBTI可靠性。
The impact of germanium implantation on the negative bias temperature instability(NBTI) of PMOS devices in 28 nm poly gate process was studied. Ge had been implanted into N-well, so PMOS quantum well device with SiGe channel had been fabricated. For the devices with different gate oxide thickness and different stress conditions, the on-the-fly method was used to measure the degradation of NBTI, and the charge pumping method was used to measure the change of interface state. The experimental results showed that Ge implantation had reduced the degradation of PMOS saturation leakage current by 43%, and reduced the interface states generated by the stress process simultaneously, which had effectively improved the reliability of PMOS NBTI.
The impact of germanium implantation on the negative bias temperature instability(NBTI) of PMOS devices in 28 nm poly gate process was studied. Ge had been implanted into N-well, so PMOS quantum well device with SiGe channel had been fabricated. For the devices with different gate oxide thickness and different stress conditions, the on-the-fly method was used to measure the degradation of NBTI, and the charge pumping method was used to measure the change of interface state. The experimental results showed that Ge implantation had reduced the degradation of PMOS saturation leakage current by 43%, and reduced the interface states generated by the stress process simultaneously, which had effectively improved the reliability of PMOS NBTI.
引文
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[2] MA C Y,MATTAUSCH H J,MIURA-MATTAUSCH M,et al.Universal NBTI model and its application for high frequency circuit simulation [C]// IEEE Int Reliab Phys Symp.Waikoloa,HI,USA.2014:CA.4.1-CA.4.6.
[3] ISLAM A E,KUFLUOGLU H,VARGHESE D,et al.Recent issues in negative-bias temperature instability:initial degradation,field dependence of interface trap generation,hole trapping effects,and relaxation [J].IEEE Trans Elec Dev,2007,54(9):2143-2154.
[4] MA C Y,LI X B,SUN F,et al.Investigation of the NBTI induced mobility degradation for precise circuit aging simulation [C] // IEEE INEC.Chengdu,China.2016:1-2.
[5] BRISBIN D,CHAPARALA P.A new fast-switching NBTI characterization method that determines subthreshold slope degradation [J].IEEE Trans Dev & Mater Reliab,2009,9(2):115-119.
[6] JOSHI K,MUKHOPADHYAY S,GOEL N,et al.A detailed study of gate insulator process dependence of NBTI using a compact model [J].IEEE Trans Elec Dev,2014,61(2):408-415.
[7] LIAO C C,GAN Z H ,ZHENG K,et al.Factors for negative bias temperature instability improvement in deep sub-micron CMOS technology [C] // Int Conf Sol Sta & Integr Circ Technol.Beijing,China.2008:612-615.
[8] TERAI M,WATANABE K,FUJIEDA S.Effect of nitrogen profile and fluorine incorporation on negative-bias temperature instability of ultrathin plasma-nitrided SiON MOSFETs [J].IEEE Trans Elec Dev,2007,54(7):1658-1665.
[9] FRANCO J,KACZER B,MITARD J,et al.Superior reliability and reduced time-dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications [C] // IEEE Int Conf IC Des & Technol.Austin,TX,USA.2012:1-4.
[10] SUTHRAM S,MAJHI P,SUN G,et al.High performance pMOSFETs using Si/Si1-x Gex/Si quantum wells with high-k/metal gate stacks and additive uniaxial strain for 22 nm technology node [C]// IEEE Int Elec Dev Meet.Washington D C,USA.2007:727-730.
[11] IRISAWA T,NUMATA T,TOYODA E,et al.Physical understanding of strain effects on gate oxide reliability of MOSFETs [C]// IEEE Symp VLSI Technol.Kyoto,Japan.2007:36-37.
[12] FRANCO J,KACZER B,ENEMAN G,et al.Superior NBTI reliability of SiGe channel pMOSFETs:replacement gate,FinFETs,and impact of body bias [C]// IEEE IEDM.Washington D C,USA.2011:18.5.1-18.5.4.
[13] WALTL M,RZEPA G,GRILL A,et al.Superior NBTI in high-k SiGe transistors-part II:theory [J].IEEE Trans Elec Dev,2017,64(5):2099-2105.
[14] FRANCO J,KACZER B,ROUSSEL P J,et al.SiGe channel technology:superior reliability toward ultrathin EOT devices-part I:NBTI [J].IEEE Trans Elec Dev,2013,60(1):396-404.
[15] WALTL M,RZEPA G,GRILL A,et al.Superior NBTI in high-k SiGe transistors-part I:experimental [J].IEEE Trans Elec Dev,2017,64(5):2092-2098.
[16] YEH W K,CHEN Y T,HUANG F S,et al.The improvement of high-k/metal gate pMOSFET performance and reliability using optimized Si cap/SiGe channel structure [J].IEEE Trans Dev & Mater Reliab,2011,11(1):7-12.
[17] ZHANG J F,JI Z,CHANG M H,et al.Real Vth instability of pMOSFETs under practical operation conditions [C]// IEEE IEDM.Washington D C,USA.2007:817-820.
[18] DENAIS M,PARTHASARATHY C,RIBES G,et al.On-the-fly characterization of NBTI in ultra-thin gate oxide PMOSFET’s [C]// IEEE IEDM.San Francisco,CA,USA.2004:109-112.
[19] GROESENEKEN G,MAES H E,BELTRAN N,et al.A reliable approach to charge-pumping measurements in MOS transistors [J].IEEE Trans Elec Dev,1984,31(1):42-53.