EDMA在实时视频解码中的应用
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摘要
高清视频处理系统对实时性要求很高,解码之后的数据量很大,而且搬移到显示缓冲区有不同的排列显示要求。给出了4种情况下,解码的宏块地址到显示缓冲区地址的对应关系。针对主要出现的第一种和第三种情况,计算了搬移一帧图像的复杂度,并提供了多种方案解决此问题。最后通过实验进行对比说明,利用DSP中的协处理器EDMA(Enhanced Direct Memory Access)可以实现快速的搬移数据,而不占用CPU资源,并且配合使用数据缓冲区的PING-PONG结构,有助于实现视频的实时解码要求。
HD video processing system has high requirement in real-time. Hence,there is large amount of data after decoding to be moved to the display buffer with different arrangement according to the display demands. The correspondence is presented between the macro block address after decoding and the display buffer address according to four kinds of circumstances in this paper. And several solutions have been provided to solve the problem which is computing the high complexity of moving one frame of image in the first and third cases. The result of the experiment shows that if DSP's coprocessor EDMA( Enhanced Direct Memory Access) is fully taken advantage of,it can move data quickly and does not take up CPU resources. Besides,the requirement of real-time video decoding can be realized by using the PING_PONG structure in the data buffer.
HD video processing system has high requirement in real-time. Hence,there is large amount of data after decoding to be moved to the display buffer with different arrangement according to the display demands. The correspondence is presented between the macro block address after decoding and the display buffer address according to four kinds of circumstances in this paper. And several solutions have been provided to solve the problem which is computing the high complexity of moving one frame of image in the first and third cases. The result of the experiment shows that if DSP's coprocessor EDMA( Enhanced Direct Memory Access) is fully taken advantage of,it can move data quickly and does not take up CPU resources. Besides,the requirement of real-time video decoding can be realized by using the PING_PONG structure in the data buffer.
引文
[1]JEDEC Standard NO.79,Double data rate(DDR)SDRAM specification[S].2004.
[2]冯永茂,徐秀知,邓春健,等.基于FPGA的数字视频多窗口内存地址生成器设计[J].液晶与显示,2006,21(6):709-711.
[3]TMS320C645x DSP enhanced DMA(EDMA3)controller user’s guide[EB/OL].[2013-05-08].http://www.ti.com.cn/dsp/cn/docs/litabsmultiplefilelist.tsp?sectionId=3&tabId=409&literatureNumber=spru966c&docCategoryId=6&familyId=132.
[4]崔遥,赵锴,崔慧娟,等.H.264/AVC编码器在TMS320DM6437上的EDMA优化[J].电视技术,2010,34(9):39-40.
[5]丁刚.从TMS320C6000 EDMA的结构来理解和优化其应用[J].无线电工程,2002,32(8):31-32.
[6]刘嵩,喻胜辉,刘海华,等.基于EDMA的多通道数据传输的实现[J].计算机测试与控制,2009,17(7):1434.
[7]曾庆如,毕笃彦,王洪迅.TMS320C64x EDMA的图像数据传输优化[J].电视技术,2005,29(S1):67-68.
[2]冯永茂,徐秀知,邓春健,等.基于FPGA的数字视频多窗口内存地址生成器设计[J].液晶与显示,2006,21(6):709-711.
[3]TMS320C645x DSP enhanced DMA(EDMA3)controller user’s guide[EB/OL].[2013-05-08].http://www.ti.com.cn/dsp/cn/docs/litabsmultiplefilelist.tsp?sectionId=3&tabId=409&literatureNumber=spru966c&docCategoryId=6&familyId=132.
[4]崔遥,赵锴,崔慧娟,等.H.264/AVC编码器在TMS320DM6437上的EDMA优化[J].电视技术,2010,34(9):39-40.
[5]丁刚.从TMS320C6000 EDMA的结构来理解和优化其应用[J].无线电工程,2002,32(8):31-32.
[6]刘嵩,喻胜辉,刘海华,等.基于EDMA的多通道数据传输的实现[J].计算机测试与控制,2009,17(7):1434.
[7]曾庆如,毕笃彦,王洪迅.TMS320C64x EDMA的图像数据传输优化[J].电视技术,2005,29(S1):67-68.