IIR数字滤波器设计与FPGA实现
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摘要
提出了一种由FPGA实现六阶巴特沃斯带通IIR数字滤波器的解决方案。电路由三个二阶滤波器级联构成,采样频率为28.8k Hz时通带为1k Hz至3k Hz,适用于对幅频特性要求较高而对相频特性不敏感的领域。根据设计要求利用Matlab得到传递函数,根据Simulink模型仿真确定字长,使用CSD编码将滤波器系数优化为最少非零元素系统,从而减少了加法器级数。电路使用Verilog语言描述并通过FPGA实现,再用移位运算与加法运算代替浮点乘法来减少对FPGA资源的需求。实验测试结果符合理论设计,达到了预期的滤波效果。
This paper presents a solution to realize the sixth-order Butterworth band-pass IIR digital filter by FPGA. The circuit is composed of three second-order filters in cascade, and the passband is 1 k Hz to 3 k Hz when the sampling frequency is 28.8 k Hz, which is suitable for the field with high requirement to amplitude-frequency characteristics and insensitive to phase-frequency characteristics. Accord to design requirement, the transfer function is obtained by using MATLAB, the word length is determined according to Simulink model simulation, and the filter coefficient is optimized into a sytem with a minimum of non-zero elements by CSD coding, so as to reduce the adder series. The circuit is described in Verilog language and implemented by FPGA, and then shift operation and addition operation are used instead of floating-point multiplication to reduce the demand for FPGA resources. The experimental results accord with the theoretical design and achieve the desired filtering effect.
This paper presents a solution to realize the sixth-order Butterworth band-pass IIR digital filter by FPGA. The circuit is composed of three second-order filters in cascade, and the passband is 1 k Hz to 3 k Hz when the sampling frequency is 28.8 k Hz, which is suitable for the field with high requirement to amplitude-frequency characteristics and insensitive to phase-frequency characteristics. Accord to design requirement, the transfer function is obtained by using MATLAB, the word length is determined according to Simulink model simulation, and the filter coefficient is optimized into a sytem with a minimum of non-zero elements by CSD coding, so as to reduce the adder series. The circuit is described in Verilog language and implemented by FPGA, and then shift operation and addition operation are used instead of floating-point multiplication to reduce the demand for FPGA resources. The experimental results accord with the theoretical design and achieve the desired filtering effect.
引文
[1]许臣蓉.基于DSP的数字滤波器设计[D].武汉:武汉理工大学,2006.XU Chenrong.Digital filter design based on DSP[D].Wuhan:Wuhan University of Technology,2006.
[2]郭志阳,孙向阳,陈学英.基于FPGA的DSTFT算法对FSK信号解调的改进[J].电子设计工程,2016,24(21):4-6.GUO Zhiyang,SUN Xiangyang,CHEN Xueying.Improvement of FSK signal demodulation of DSTFT algorithm based on FPGA[J].Electronic Design Engineering,2016.24(21):4-6.
[3]王大伟,贾荣丛,王划一.基于Matlab的巴特沃斯滤波器设计[J].现代电子技术,2012,35(21):71-72.WANG Dawei,JIA Rongcong,WANG Huayi.Design of Butter worth analog filter based on Matlab[J].Modern Electronics Technique,2012,35(21):71-72.
[4]朱广信.高效数字滤波器结构研究及其在虚拟听觉实现中的应用[D].杭州:浙江大学,2010.ZHU Guangxin.Research on efficient digital filter structure and its application in virtual auditory realization[D].Hangzhou:Zhejiang University,2010.
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[7]Hashemian R.A new method for conversion of a 2's complement to canonic signed digit number system and its representation[C]//Signals,Systems and Computers,1996.Conference Record of the Thirtieth Asilomar Conference on.IEEE,1996:904-907.
[8]张伟,顾强,李世中,等.基于Signal Tap II的数据采集系统设计与调试[J].微型机与应用,2014,33(2):8-10.ZHANG Wei,GU Qiang,LI Shizhong,et al.Design and debugging of the data acquisition system based on Signal Tap II[J].Microcomputer&Its Applications,2014,33(2):8-10.
[9]晏勇.基于FPGA三相正弦信号发生器的设计与实现[J].电气自动化,2014,36(4):38-40.YAN Yong.Design and implementation of 3-phase Sinusoidal signal generator based on FPGA[J].Electrical Automation,2014,36(4):38-40.
[2]郭志阳,孙向阳,陈学英.基于FPGA的DSTFT算法对FSK信号解调的改进[J].电子设计工程,2016,24(21):4-6.GUO Zhiyang,SUN Xiangyang,CHEN Xueying.Improvement of FSK signal demodulation of DSTFT algorithm based on FPGA[J].Electronic Design Engineering,2016.24(21):4-6.
[3]王大伟,贾荣丛,王划一.基于Matlab的巴特沃斯滤波器设计[J].现代电子技术,2012,35(21):71-72.WANG Dawei,JIA Rongcong,WANG Huayi.Design of Butter worth analog filter based on Matlab[J].Modern Electronics Technique,2012,35(21):71-72.
[4]朱广信.高效数字滤波器结构研究及其在虚拟听觉实现中的应用[D].杭州:浙江大学,2010.ZHU Guangxin.Research on efficient digital filter structure and its application in virtual auditory realization[D].Hangzhou:Zhejiang University,2010.
[5]胡广书.数字信号处理[M].北京:清华大学出版社,2003.HU Guangshu.Digital signal processing[M].Beijing:Tsinghua University Press,2003.
[6]Sait S M,Farooqui A A,Beckhoff G F.A novel technique for fast multiplication[C]//Computers and Communications,1995.,Conference Proceedings of the 1995 IEEE Fourteenth Annual International Phoenix Conference on.IEEE,1995:109-114.
[7]Hashemian R.A new method for conversion of a 2's complement to canonic signed digit number system and its representation[C]//Signals,Systems and Computers,1996.Conference Record of the Thirtieth Asilomar Conference on.IEEE,1996:904-907.
[8]张伟,顾强,李世中,等.基于Signal Tap II的数据采集系统设计与调试[J].微型机与应用,2014,33(2):8-10.ZHANG Wei,GU Qiang,LI Shizhong,et al.Design and debugging of the data acquisition system based on Signal Tap II[J].Microcomputer&Its Applications,2014,33(2):8-10.
[9]晏勇.基于FPGA三相正弦信号发生器的设计与实现[J].电气自动化,2014,36(4):38-40.YAN Yong.Design and implementation of 3-phase Sinusoidal signal generator based on FPGA[J].Electrical Automation,2014,36(4):38-40.