摘要
本文以某课题宽带频综研制实例详细阐述以DDS激励PLL方式实现频率合成器的设计实现过程。测试结果表明:采用该方案设计的宽带频综具有较高的频率分辨率和较低的相位噪声,同时具有较好的杂散抑制。
In this paper, some broadband frequency synthesizer is illustrated to expatiate the design and implementation of frequency synthesizer with DDS spur PLL technology.The result of the test shows that this broadband frequency synthesizer has higher frequency resolution,lower phase noise and meanwhile suppressing spur better.
引文
[1].王亮亮.基于DDS和PLL技术的高分辨率可变频综器设计与实现:硕士学位论文,国防科技大学,2011
[2].陆莉娟.S波段频率合成器的设计与实现:硕士学位论文,安徽大学,2010
[3].Analog Devices:ADF4107,2007