用于空间探测的抗辐照电子学设计
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- 英文论文题名：Design of electronics anti-radiation technology used in space exploration
- 论文作者：张飞 ; 董亦凡 ; 龚轲 ; 吴帝 ; 樊瑞睿 ; 彭文溪
- 英文论文作者：ZHANG Fei ; DONG Yi-fan ; GONG Ke ; Wu Di ; Institute of high energy physics
- 年：2015
- 作者机构：中国科学院高能物理研究所;
- 论文关键词：抗辐射设计 ; 总剂量效应 ; 单粒子翻转 ; 单粒子锁定
- 英文论文关键词：anti-radiation ; TID ; SEL ; SEU
- 会议召开时间：2015-09-21
- 会议录名称：中国核科学技术进展报告（第四卷）——中国核学会2015年学术年会论文集第9册（核技术经济与管理现代化分卷、核电子学与核探测技术分卷、核测试与分析分卷）
- 语种：中文
- 分类号：V447
- 学会代码：EGVD
- 会议名称：中国核学会2015年学术年会
- 会议地点：中国四川绵阳
- 主办单位：中国核学会
- 学会名称：中国核学会
- 页数：6
- 文件大小：379k
- 原文格式：O
- 会议级别：全国
摘要
在轨运行的空间探测仪器不可避免的受空间宇宙线和高能粒子的辐射。典型的空间辐射带来的影响有总剂量效应(TID)、单粒子锁定(SEL)和单粒子翻转(SEU)。尽管星载探测器设计规范要求尽量采用高等级的元器件,但最近几年的空间探测仪器为了追求更好的性能(紧凑体积、低功耗、高速度),不得不筛选等级较低的工业级器件、专用集成电路(ASIC)。即使高等级的电子器件,比如SRAM/FPGA也不可避免的受到SEU事件的影响。这些都需要在仪器研制中采取必要的措施。本文结合多个项目工程经验,介绍在空间探测仪器研制中为降低TID、SEL、SEU效应带来危害而采取各种电子学软硬件设计手段。
Space exploration instruments are inevitable to be radiated by cosmic rays and high energy particles on board.Typical radiation influences are Total Ionizing Dose(TID),Single Event Latchup(SEL) and Single Event Upset(SEU).Although high-grade electronics components are as far as possible required by the design specifications for satellite instruments,the lower level industrial grade devices and the Application Specific Integrated Circuits(ASIC) has to be screened to get a better performance of compact volume,low power consumption,high speed in recent years of space exploration instruments.Even if the high-grade electronics devices,such as SRAM/FPGAs are inevitably affected by the SEU events.The necessary measures should be taken in the instruments design.In this paper,based on engineering experiences of many space projects,the different design methods of electronics software and hardware are introduced to reduce the TID,SEL and SEU influences.
Space exploration instruments are inevitable to be radiated by cosmic rays and high energy particles on board.Typical radiation influences are Total Ionizing Dose(TID),Single Event Latchup(SEL) and Single Event Upset(SEU).Although high-grade electronics components are as far as possible required by the design specifications for satellite instruments,the lower level industrial grade devices and the Application Specific Integrated Circuits(ASIC) has to be screened to get a better performance of compact volume,low power consumption,high speed in recent years of space exploration instruments.Even if the high-grade electronics devices,such as SRAM/FPGAs are inevitably affected by the SEU events.The necessary measures should be taken in the instruments design.In this paper,based on engineering experiences of many space projects,the different design methods of electronics software and hardware are introduced to reduce the TID,SEL and SEU influences.
引文
[1]宋明龙,等.卫星抗辐射加固技术,上海航天,2001.
[2]张飞.高分辨太阳软X射线谱仪电子学.博士学位论文,2007.
[3]IDEAS Company.VA140 document(VORl).
[4]DALLAS Semiconductor.DS18S20 High Precision 1-Wire Digital Thermometer(data sheet).
[5]Gregory R.Allen,et al.Single Event Effects Test Results for Advanced Field Programmable Gate Arrays,1-4244-0638-2/06(2006 IEEE).
[2]张飞.高分辨太阳软X射线谱仪电子学.博士学位论文,2007.
[3]IDEAS Company.VA140 document(VORl).
[4]DALLAS Semiconductor.DS18S20 High Precision 1-Wire Digital Thermometer(data sheet).
[5]Gregory R.Allen,et al.Single Event Effects Test Results for Advanced Field Programmable Gate Arrays,1-4244-0638-2/06(2006 IEEE).