基于VME总线的ASIC芯片研究
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摘要
当今时代,新技术层出不穷,而VME( Versa(Verification Execution and Rewrite System for ACSR) Module Eurocard)总线已经沿用了20多年,并一直受到军事、医疗、运输和工业控制系统开发人员的欢迎,保持着旺盛的生命力。VME总线接口控制芯片作为VME系统必不可少的部分,国外已有不少产品,遗憾的是在国内却还没有一家开发VME总线接口芯片,完全依赖进口。因此我们有必要在这方面做一些研究。
本文探讨了如何实现与CYPRESS 公司VIC64 兼容的VME 总线接口控制芯片。作者所在的VME 设计小组在一年多的时间里,采用集成电路正向设计方法,从研究IEEE1014 标准、VIC64 的产品手册入手,到整个产品的模块划分,状态机的设计,RTL 级代码的输入,所有功能的仿真,到FPGA 的验证,然后再做ASIC 的设计,做了大量的工作,也总结了不少项目开发的经验。最后成功地通过了FPGA 的验证,完成了ASIC 的设计,达到了项目开发的要求。
VIC64 是CYPRESS 公司和VMEbus 技术协会联合开发出来的产品,由于合作,VIC64 能够提供最完善的功能和最好的兼容性。本课题开发出来的VME总线接口控制芯片从结构上与VIC64 一样具有1. 完备的系统控制器和仲裁功能2. 完备的VME 总线主模块接口功能3. 完备的VME 总线从模块接口功能。4. 中断和中断处理功能。文章首先对IEEE1014 标准,VIC64 的各个功能模块进行了介绍,接着对作者所负责的工作,进行了详细叙述,包括从模块VME状态机的设计,中断和中断处理器的设计,芯片的仿真,FPGA 验证,ASIC 设计。
In our age, new technology emerges in endlessly, but VMEbus technology has existed for more than 20 years and still kept popular. The VMEbus interface controller is the necessary unit of VMEbus system. But it’s a pity that there is no any institute at home who has developed it successfully. So it is necessary for us to do some research in this field.
The target of this research project is how to develop the VMEbus interface controller, which is compatible with VIC64 of CYPRESS Company. For more than one year, the author and his group adopt top-down IC design method, and have done a lot of job, include read IEEE Standard 1014, digest VIC64 specification, design whole project’s architecture and FSM(Finite State Machine) , write RTL code, simulate, do FPGA verification, ASIC design(synthesis, place and route). The result completely meets the design requirement.
VIC64 offers an implementation that provides the broadest feature set and multi-vendor compatibility available on the market. VMEbus interface controller we have developed has the same structure with VIC64, include (1) the complete VMEbus Interface Controller and Arbiter (2) The complete VMEbus Master Interface (3) The complete VMEbus Slave Interface (4) interrupter and interrupter handling The dissertation first gives a brief introduction of IEEE Standard 1014 and all functional modules of VIC64, then details some modules which the author is in charge of, including VME FSM of slave module, interrupter and interrupter handling, simulation, FPGA verification, ASIC design.
本文探讨了如何实现与CYPRESS 公司VIC64 兼容的VME 总线接口控制芯片。作者所在的VME 设计小组在一年多的时间里,采用集成电路正向设计方法,从研究IEEE1014 标准、VIC64 的产品手册入手,到整个产品的模块划分,状态机的设计,RTL 级代码的输入,所有功能的仿真,到FPGA 的验证,然后再做ASIC 的设计,做了大量的工作,也总结了不少项目开发的经验。最后成功地通过了FPGA 的验证,完成了ASIC 的设计,达到了项目开发的要求。
VIC64 是CYPRESS 公司和VMEbus 技术协会联合开发出来的产品,由于合作,VIC64 能够提供最完善的功能和最好的兼容性。本课题开发出来的VME总线接口控制芯片从结构上与VIC64 一样具有1. 完备的系统控制器和仲裁功能2. 完备的VME 总线主模块接口功能3. 完备的VME 总线从模块接口功能。4. 中断和中断处理功能。文章首先对IEEE1014 标准,VIC64 的各个功能模块进行了介绍,接着对作者所负责的工作,进行了详细叙述,包括从模块VME状态机的设计,中断和中断处理器的设计,芯片的仿真,FPGA 验证,ASIC 设计。
In our age, new technology emerges in endlessly, but VMEbus technology has existed for more than 20 years and still kept popular. The VMEbus interface controller is the necessary unit of VMEbus system. But it’s a pity that there is no any institute at home who has developed it successfully. So it is necessary for us to do some research in this field.
The target of this research project is how to develop the VMEbus interface controller, which is compatible with VIC64 of CYPRESS Company. For more than one year, the author and his group adopt top-down IC design method, and have done a lot of job, include read IEEE Standard 1014, digest VIC64 specification, design whole project’s architecture and FSM(Finite State Machine) , write RTL code, simulate, do FPGA verification, ASIC design(synthesis, place and route). The result completely meets the design requirement.
VIC64 offers an implementation that provides the broadest feature set and multi-vendor compatibility available on the market. VMEbus interface controller we have developed has the same structure with VIC64, include (1) the complete VMEbus Interface Controller and Arbiter (2) The complete VMEbus Master Interface (3) The complete VMEbus Slave Interface (4) interrupter and interrupter handling The dissertation first gives a brief introduction of IEEE Standard 1014 and all functional modules of VIC64, then details some modules which the author is in charge of, including VME FSM of slave module, interrupter and interrupter handling, simulation, FPGA verification, ASIC design.
引文
[1] VME bus 简介,中国电子技术信息网,网址:CETNet.com. ANSI/IEEEANSI/IEEE Std 1014-1987, IEEE Standard for A Versatile Backplane Bus: VMEbus
[2] 陈代寿,VME 让语音卡更强大,中国计算机报,2002-03-04,总期号:1097 本年期号:14
[3] William Stallings, Computer Organization and Architecture: Design for Performance( 4th ed.),Copyright by Prentice Hall, Inc.,1996, 3～7, 50～52。
[4] American National Standards Institute, Inc., VMEbus International Trade Association, ANSI/VITA 1-1994, American National Standard for VME64, April 10, 1995,1～198
[5] American National Standards Institute, IEEE Standards Board, ANSI/IEEEANSI/IEEE Std 1014-1987, IEEE Standard for A Versatile Backplane Bus: VMEbus,1987,1～123
[6] The VICO068A VMEbus Interface Controller, Cypress Semiconductor Corporation,1997,1-29～1-30, 1-45～1-55,1-59～1-78
[7]Mohamed F.Younis,Jeffrey X.Zhou,Mohamed Aboutabl,Strong Partitioning Protocol for a Multiprocessor VME System,0731-3071/98$10.00@1998IEEE pp.176～185
[8] 袁俊泉等,Verilog HDL 数字系统设计及其应用,西安电子科技大学出版社
[9] 高明伦,Verilog 与PC 机接口电路设计,168～248
[10] Janick Bergeron , Writing Testbenches:Functional Verification of HDL Models,61～153
[11] synopsys taining book,about synthesys using DC,3-2～10-30
[12] 牛风举等,基于IP 复用的数字IC 设计技术,26～116
[2] 陈代寿,VME 让语音卡更强大,中国计算机报,2002-03-04,总期号:1097 本年期号:14
[3] William Stallings, Computer Organization and Architecture: Design for Performance( 4th ed.),Copyright by Prentice Hall, Inc.,1996, 3～7, 50～52。
[4] American National Standards Institute, Inc., VMEbus International Trade Association, ANSI/VITA 1-1994, American National Standard for VME64, April 10, 1995,1～198
[5] American National Standards Institute, IEEE Standards Board, ANSI/IEEEANSI/IEEE Std 1014-1987, IEEE Standard for A Versatile Backplane Bus: VMEbus,1987,1～123
[6] The VICO068A VMEbus Interface Controller, Cypress Semiconductor Corporation,1997,1-29～1-30, 1-45～1-55,1-59～1-78
[7]Mohamed F.Younis,Jeffrey X.Zhou,Mohamed Aboutabl,Strong Partitioning Protocol for a Multiprocessor VME System,0731-3071/98$10.00@1998IEEE pp.176～185
[8] 袁俊泉等,Verilog HDL 数字系统设计及其应用,西安电子科技大学出版社
[9] 高明伦,Verilog 与PC 机接口电路设计,168～248
[10] Janick Bergeron , Writing Testbenches:Functional Verification of HDL Models,61～153
[11] synopsys taining book,about synthesys using DC,3-2～10-30
[12] 牛风举等,基于IP 复用的数字IC 设计技术,26～116