基于H.264标准的网络视频编码器关键技术的研究与实现
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摘要
随着多媒体和信息技术的发展与完善,各种新的视频应用不断出现,人们对图像质量的要求越来越高。其中实时视频应用倍受大家青睐,应用前景相当广阔。在视频应用领域,图像质量和编码效率一直是两难问题。H.264视频编码标准成功的解决了这一问题,但是编码过程的计算复杂性很高。因此降低编码过程的计算复杂性,提高编码速度是H.264视频应用的重点和难点。
     本课题从三个方面研究了网络视频编码器:H.264视频编码算法优化;DSP系统中视频编码应用的硬件加速;H.264视频报文的网络实时传输。
     首先,分析算法优化难点,提出了启发式预测模式确定算法,对帧间预测、帧内预测和最佳预测模式的确定过程进行综合优化。该算法利用视频序列在空间和时间上的相关性,以及相邻的图像单位在预测失真上的相似性,推测当前宏块中接近最佳性能的预测块划分方法和预测模式。算法提供了推测错误处理机制,能够保证预测块与原始图像之间实现最佳匹配。实验证明经过优化之后,以微小的编码图像失真为代价,较大幅度地提高了编码速度,编码器的性能得到显著改善。
     其次,研究了DSP上实现H.264的关键技术。将保证DSP系统定点运算精度和利用DSP算法实现加速的关键技术作为研究重点。提出了多层次优化设计方案,在程序、算法和指令三个不同层次上,通过优化程序结构、改善存储管理、合理分配资源、优化指令调度、减少cache失效,以及利用多种DMA传输机制实现视频处理与数据传输的重叠作业等优化关键技术,提高DSP系统中的功能部件、存储资源和外部设备的工作效率,实现了视频图像的实时编码。实验结果表明,通过关键技术优化的DSP视频编码器性能有大幅度的提高。
     最后,利用德州仪器提供的网络开发工具包实现了RTP/RTCP实时网络传输协议,主要包括TCP/IP网络协议栈的配置与使用,以及实现基于RTP/RTCP协议的应用服务。在网络应用的基础上,对视频编码器进行性能进行测试,检验视频编码器的实时效果;完成了进行数据完整性测试,验证了视频编码器的正确性。测试结果表明本课题研究和实现的视频编码器具有良好的实时性和稳定性。
With the development of multimedia and communication technology, a variety of new applications with high image resolution have been taken into practice. With great perspective, realtime video applications are very popular, in which image quality and bitrates are in the dilemma. H.264 video coding standard can solve this intractability problem successfully. However, there is much complexity in the encoding processes of H.264 encoder. Therefore, how to reduce the complexities of encoding process, as well as to speed up the encoder, becomes the keystone of video application, which is hard to achieve. Therefore, this dissertation researches on three aspects of network video encoder, which include the optimizing algorithm in video encoder, DSP hardware speedup and the real-time transfer of H.264 video packets.
     Firstly, by researching on the optimizing algorithms, we propose an algorithm based on method of elicitation to optimize intra prediction, inter prediction and mode decision. By exploiting spacial or temporal correlation of neighbor macroblocks, as well as distortion of neighbor macroblock, the algorithm speculates that the partition method and prediction mode of current macroblock is similar to its neighbors. The mechanism provided by the algorithm ensures the best match between prediction block and original block. The results of test prove that the algorithm improves the encoding rate with little image distortion.
     Secondly, our researches focus on high accuracy fix-point arithmetic and DSP hardware speedup of H.264 application. By optimizing the structure of program, improving memory management, and assigning resources properly, we realize optimizations on the program, algorithm and instruction level respectively. High speed data transfers between DSP and peripherals are implemented by EDMA operations. An overlap between data transfers and data processing are introduced by EDMA mechanisms and the flexible configuration of the on chip SRAM of DSP. After the optimization, ALUs, memory and peripherals are sufficiently utilized. The testing results indicate that the high performance of video encoder optimized by DSP optimized algorithms.
     Finally, we implement RTP protocol based on the network develop kit provided by TI corporation, which includes the configuration and utilization of TCP/IP protocol. Experimental results are given to evaluate the performance of the video encoder. According to the results, our video encoder is considered to be an application with good performance and high reliability.
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