多层次并行与分布实时仿真平台关键技术研究
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摘要
随着实时仿真应用规模和性能需求的提高,满足高性能、大规模的实时仿真需求,提高平台的重用性、扩展性和标准化,成为实时仿真平台构建的关键问题,多层次并行分布实时仿真平台的研究正是在这一背景展开的。基于DSP (Digital Signal Processor)等硬件的实时仿真平台扩展,在计算稳定性、时间控制精度、高速数据通讯等方面,具有通用计算机不可比拟的优势,能够提供微秒级的实时仿真环境,满足信号级实时仿真的需求。本文在传统实时仿真平台研究的基础上,提出了实时仿真平台层次架构的设计思想,重点讨论了基于DSP实时仿真平台的扩展.
     论文首先从并行分布实时仿真平台的约束关系入手,基于实时仿真应用需求,分析了衡量仿真平台的性能指标和信号级实时仿真应用的特点,在此基础上提出了层次化结构的设计思想,从平台的硬件组成、软件管理、模型特点等方面,将仿真平台分为:非实时层、弱实时层、强实时层和苛刻实时层,并重点分析了苛刻实时层的实现特点和硬件选型。
     在仿真平台层次化架构研究的基础上,实现了基于DSP苛刻实时仿真层的设计与开发。设计与实现了基于单节点DSP的苛刻实时仿真层,并通过实验验证在计算稳定性、通讯实时性上,具有通用计算机不可比拟的优势。为实现苛刻实时仿真层的扩展,研究了通讯性能与多节点DSP苛刻实时仿真层性能间的关系,提出了苛刻实时层单板多节点多设计的基本原则,实现了基于三级存储结构的多节点苛刻实时仿真层设计,并以此提供了不同形式的扩展以及平台化的结构方案。
     结合多层次PDRTS硬件平台的实现,为保证仿真平台的时间控制,论文研究了仿真平台尤其是苛刻实时仿真层的时间管理。在传统并行分布仿真平台时间管理的分析基础之上,针对苛刻实时仿真层,提出了基于GPS的PPS时钟信号和高精度时钟晶振信号相结合的仿真时钟控制机制,实现了局部偏差(Local Error)与全局偏差(Global Error)相互校正的时钟控制策略。基于硬件实现苛刻实时仿真层的时钟控制,提出了TTSU同步启动策略和QHCS同步控制策略,并从理论上分析了相应同步策略的性能。
     接下来,在保证平台实时性能的基础上为提高执行效率,论文对仿真平台调度策略进行了研究。在仿真任务和平台形式化描述的基础上,首先研究了静态调度策略,针对遗传算法和交互优先调度策略的缺陷,论文根据多层次仿真平台的特点,提出了多层次等效负载(MLEL)调度策略,经实验证明该策略可以有效地减少任务聚集,提高仿真平台的整体性能。为弥补静态条件的获取误差,增加平台的容错能力,论文研究了动态调度策略,提出了基于任务复制策略,以消除状态冻结带来的任务执行延迟,设计了平台的整体调度策略,提出了静态调度与动态调度相结合的调度思想。
     最后,论文介绍了仿真平台的整体设计与实现。在多层次实时仿真平台关键技术研究的基础上,设计并实现了多层次并行分布实时仿真平台的原型系统。通过XX突防系统仿真实例的应用,验证了仿真平台层次化的设计思想,展示了平台的可扩展性、可重用性以及可定制性。
As the scale and performance of the real-time simulation applications are increasing, the simulation environment, that is more powerful, and more cosmical, is needed. In the building of the real-time simulation platform, the reusability, expansibility and standardization are the important issues. Under the requirement, the Multi-Level Parallel and Distributed Real-Time(PDRT) simulaiton platform is researched. The development of the real-time simulation platform, based on the DSP(Digital Signal Processor), has more advantage than the general computer in computing stability, time managmeny precision and communication speed. The frame time that the platform can supply is a few microsecond, so it can satisfy with the requriment of signal simulation. Based on the research of the traditional simulation platform, we propose the four level architecture for the design of the simulation platform, and emphasize on the development of the platform based on DSP.
     The dissertation first analyzes the restriction relationship of the real-time simulation platform. From view of the simulaiton platform development, the performance standard of the real-time simulation platform and the characteristic of signal real-time simulaiton are analyzed. Based on the analyse, the delamination idea for the design of the real-time simulation platform is proposed. Based the hardware, software and model, the platform is leveled with non-real-time level, soft real-time level, hard real-time level and rigorous real-time level, and especially analyzes the rigorous real-time level.
     Based on the research of the level architecture, the regorous real-time simulation level is designed and developed using DSP. Firstly, the regorous real-time simulation level with one DSP is researched. Through the test, the advantage in computing stability and communication ability, comparing with the general computer, is proved. Furthermor, in order to improve the ability of the regorous real-time simulation level, the dissertation researches the relationship between the communication ability and the speedup of Multi-DSP. The basic principle is introduced for designing the regorous with Multi-DSP. In the end, the multi-DSP regorous real-time level, based on the three-level memory structure, is designed, and called Super Node(SN). Based on the SN, the different extended styles are introduced.
     Then, based on the hardware of the platform, the dissertation discusses the Time Management to promise the control of the time, especially researches the time controlling in the regorous real-time level. In order to satisfy the time required, by analyzing the GPS clock error and combing the charateristics of the GPS-PPS signal with the high precision oscillator, strategy for correcting both error of the GPS-PPS and the oscillator is introduced. As the GPS-PPS is free from cumulative error, and the high precision crystal oscillator is free from random error, each error can be revised by each other. Using the high precision simulaiton clock, the Timer Synchronization Start-Up(TSSU) and the Quasi-Homologous Clock Synchronization(QHCS) are proposed to satisfy the time requirement in the regorous real-time level.
     Following this, in order to improve the efficiency of the platform with satisfying the performance requirement, the dissertation researches scheduling strategy in multi-level PDRTS platform. Based on the description of formalization, the static scheduling strategy first is desibussed. By analyzing the charateristics of the platform, a new static scheduling called MLEL(Multi-Level Equivalent Load), that improved on GA and IP's weakness in tasks assemble, is proposed. Tests conducted on the same platform proves that the new strategy can effectively improve the ability of platform. For remedying the windage in the obtaining of static conditions and enhancing the correcting ability, the dynamic sheduling strategy, based on the task replicate(TR), is proposed to eliminate the state delay along with the freezing state. In the platform, the static and dynamic sheduling strategy are combined to ensure the executing effectively.
     At last, this dissertation introduces the design and realization of the overall platform. Based the study of the key technologies, a prototype system is designed and implement. As a result, it validates the delamination idea for the real-time simulation platform, and the above-mentional key technologies are feasible to statify the requirement of the platform design, under a typical application of missile electronic prnetration simulation system. It shows the expandability, reusability and scalable of the platform.
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