基于SOPC的变频控制器IP核的研究
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摘要
以可编程片上系统SOPC(System On a Programmable Chip)为核心的电子产品,是近几年集成电路中发展最快的产品。随着SOPC性能的高速发展和设计人员自身能力的提高,SOPC进一步扩大适用领域,将复杂专用芯片推向高端和超复杂应用。另外,随着能源、环保等问题的日益突出,节能效果显著的变频器市场规模日益扩大,但国内的变频器目前仅占据25%左右的市场份额。运用SOPC技术开发核心控制芯片,是改变这一现状的有效措施之一。
     本文基于FPGA解决方案的SOPC,实现对SPWM变频控制器IP核的研究。文中首先对变频调速的基本原理以及变频控制技术中的正弦脉宽调制(SPWM)相关内容进行研究,在深入研究SPWM控制原理、各种SPWM的实现算法以及SPWM模式的优化方法的基础上,给出本文SPWM的实现方法。然后具体介绍SOPC系统的设计与实现方法,最后在QUARTUS II开发软件中,综合VHDL硬件描述语言以及宏功能模块的设计方法,采用数字化自然采样法,实现变频控制器IP核的设计,并对IP核的部分功能进行时序仿真验证。文中,对如何实现变频控制器IP核的设计,进行详细的阐述。
     为验证本文变频器IP核的设计方法的可行性,最后以ACEX1K系列的FPGA/SOPC开发板为实验测试平台,对IP核进行测试。通过对测试结果的分析,进一步验证采用本文的方法来设计变频器IP核的有效性和可行性。该IP核的设计完全可以满足电机驱动和逆变电源的要求,其中开关频率,死区时间等参数可以进行修改,IP核可移植性好,稍加优化改进后,可应用到交流电机驱动控制系统中。
Electronic products using SOPC as cores are the fastest growing integrated circuit product recent years. With the rapid development of SOPC capability and the improvement of designers’ability, SOPC further expand the fields of application, and complex ASIC will be dedicated to high-end and ultra-complex applications. In addition, as energy, environmental protection and other issues have become increasingly prominent, energy-saving significant inverter is expanding the size of the market, but domestic inverter currently only occupy about 25 percent market share. Using SOPC to develop control core chip is one of the effective measures to change the status.
     The paper is to achieve the research of SPWM inverter IP core based on SOPC. Firstly, the basic principles of frequency control technology and the contents relating to SPWM are studied. Based on in-depth study SPWM control principle, the realization of various SPWM algorithms and the optimization method SPWM model, the realization of SPWM in this paper is given. Then, the design and the realization method of SOPC are introduced specifically. Lastly, under the QUARTUS II software environment, using VHDL and macro functions module design method, and using the digital natural sampling, the design of the inverter IP core is achieved. Some functions of the IP core are simulated by timing. In this paper, how to achieve the design of the inverter IP core will be described detailed.
     To verify the feasibility of the design method of this inverter IP core, the ACEX1K series of FPGA/SOPC development board as the experimental test platform is used to test the IP core. The analysis of the test results further validate the validity and feasibility of the method used to design this inverter IP core. The design of the IP core is fully satisfied with the requirements of the motor drive and the inverter power source, and the switching frequency, the dead time, and other parameters can be modified. This IP core has good portability, and can be applied to the AC motor drive control system after a little improvement and optimization.
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