H.264 & AVS双模解码器BUS调度方法分析
摘要
目前世界视频设备市场已经进入从模拟设备向数字设备的转型期。与此同时,视频编解码标准领域也呈现出多标准并存的局面。H.264作为新一代视频编码标准,已在国际上的很多领域被广泛采用,AVS是中国拥有自主知识产权的新一代标准,在国内市场的前景十分广阔。由于两种标准的不兼容性,研究同时支持两种标准的双模解码很有意义。同时由于视频处理任务实时性要求高、数据量巨大,使得总线的负担异常繁重。为使总线的性能得到优化迫切需要一种能快速而有效评估出各种总线调度策略好坏的方法。
本文在研究了AVS和H.264视频编码标准和视频解码芯片的系统结构的基础上,提出了利用电子系统级(ESL)设计平台协助进行多模解码SOC架构设计及总线调度分析的方法。本文主要针对以下问题进行了研究:
利用ESL平台协助进行SOC系统的软硬件划分
在SOC的设计中,如何进行软硬件划分一直是困难而又至关重要的问题。由于设计初期缺乏相关的性能数据,以前的软硬件划分工作主要依靠经验完成,但划分的是否合理,只有等系统完成之后才能测试得知,一旦发现了问题,进行修改也极为不便。本文利用了目前IC设计领域较为先进的电子系统级(ESL)设计平台,在设计规划阶段便通过采集原型系统的性能数据为软硬件划分提供依据,并且通过为软硬件划分方案提供强大的仿真平台,使得在具体的硬件设计工作开始之前便可以评估出该划分方案的大致性能,从而尽早进行修改、调整,有力保证了系统软硬件划分方案的可行性、高效性。
利用Network Calculus的总线仲裁器数学建模数学工具被广泛应用于工程领域各种问题的抽象上,相比于其他的仿真方法,数学模型具有抽象度高、适用范围广、仿真速度快等优点。本文采用Network Calculus的数学工具,对系统总线的仲裁器进行了数学建模,推导出了各调度策略下请求处理的模型,为总线调度策略的优化提供了有力的工具。
利用ESL平台和Network Calculus数学模型的总线调度策略分析
数学模型只是对关注对象的抽象,要具体的分析其性能还需要提供实际中的数据输入。本文利用ESL平台强大的数据采集能力获取解码器工作时的请求流情况,将其作为输入提供给总线的数学模型,从而得出总线调度策略的性能分析。为总线性能的优化提供了依据。
Nowadays, world video market has entered into the transition period form analogy equipment to digital equipment. Meanwhile, there are many new video standards in the world. H.264, as one of the newest standards, has been widely used in world. AVS, as Chinese new video standard has large domestic market. But these two standards are not compatible. So to study the dual-standard decoder is meaningful. The bus burden of video decoding system is very heavy, because of real-time demand and huge data transition. So a fast and effective way to evaluate the bus schedule strategy is needed.
In this paper, we study the AVS and H.264 video standard and a method based on ESL platform to help design multi-standard decoder architecture and analyze bus schedule strategy. Follow aspects are discussed in this thesis.
Using ESL platform to help deciding the SW/HW partition In SOC design, how to decide SW/HW partition is a difficult and crucial problem. As in the beginning of design, we are lack of profiling data. So we have to decide the SW/HW partition mainly depend on experience. But we do not know whether this partition is proper until we finish the whole implementation. Once we find the partition is not right then, it is difficult to modify. In this paper, we used the ESL platform to gather profiling data from an original system to provide partition basis.
Then use the powerful simulation function to evaluate the partition plan, we can know the approximate performance of the whole system before the hardware implementation. Therefore, we can do some modifies and adjustments early to guarantee the feasibility and efficiency of this partition.
Using Network Calculus to build the bus arbiter model Math tools have been wildly used in engineering field to abstract different problems. Compared to other simulation method, math model has the advantage of high abstraction, wide application, fast simulating and so on. In this paper, we use Network Calculus math tool to build the bus arbiter model, which is very helpful to the bus schedule strategy optimization.
Using ESL and Network Calculus to analyze the bus schedule strategy
Build a math model just finish the abstraction of the object. You have to get the actual input data to analyze the performance. In this paper, we use the powerful data gathering function to gain the request flow in decoding process, and use it as the model input to get the bus schedule strategy analyzing report which is a main reference of the bus optimization.
本文在研究了AVS和H.264视频编码标准和视频解码芯片的系统结构的基础上,提出了利用电子系统级(ESL)设计平台协助进行多模解码SOC架构设计及总线调度分析的方法。本文主要针对以下问题进行了研究:
利用ESL平台协助进行SOC系统的软硬件划分
在SOC的设计中,如何进行软硬件划分一直是困难而又至关重要的问题。由于设计初期缺乏相关的性能数据,以前的软硬件划分工作主要依靠经验完成,但划分的是否合理,只有等系统完成之后才能测试得知,一旦发现了问题,进行修改也极为不便。本文利用了目前IC设计领域较为先进的电子系统级(ESL)设计平台,在设计规划阶段便通过采集原型系统的性能数据为软硬件划分提供依据,并且通过为软硬件划分方案提供强大的仿真平台,使得在具体的硬件设计工作开始之前便可以评估出该划分方案的大致性能,从而尽早进行修改、调整,有力保证了系统软硬件划分方案的可行性、高效性。
利用Network Calculus的总线仲裁器数学建模数学工具被广泛应用于工程领域各种问题的抽象上,相比于其他的仿真方法,数学模型具有抽象度高、适用范围广、仿真速度快等优点。本文采用Network Calculus的数学工具,对系统总线的仲裁器进行了数学建模,推导出了各调度策略下请求处理的模型,为总线调度策略的优化提供了有力的工具。
利用ESL平台和Network Calculus数学模型的总线调度策略分析
数学模型只是对关注对象的抽象,要具体的分析其性能还需要提供实际中的数据输入。本文利用ESL平台强大的数据采集能力获取解码器工作时的请求流情况,将其作为输入提供给总线的数学模型,从而得出总线调度策略的性能分析。为总线性能的优化提供了依据。
Nowadays, world video market has entered into the transition period form analogy equipment to digital equipment. Meanwhile, there are many new video standards in the world. H.264, as one of the newest standards, has been widely used in world. AVS, as Chinese new video standard has large domestic market. But these two standards are not compatible. So to study the dual-standard decoder is meaningful. The bus burden of video decoding system is very heavy, because of real-time demand and huge data transition. So a fast and effective way to evaluate the bus schedule strategy is needed.
In this paper, we study the AVS and H.264 video standard and a method based on ESL platform to help design multi-standard decoder architecture and analyze bus schedule strategy. Follow aspects are discussed in this thesis.
Using ESL platform to help deciding the SW/HW partition In SOC design, how to decide SW/HW partition is a difficult and crucial problem. As in the beginning of design, we are lack of profiling data. So we have to decide the SW/HW partition mainly depend on experience. But we do not know whether this partition is proper until we finish the whole implementation. Once we find the partition is not right then, it is difficult to modify. In this paper, we used the ESL platform to gather profiling data from an original system to provide partition basis.
Then use the powerful simulation function to evaluate the partition plan, we can know the approximate performance of the whole system before the hardware implementation. Therefore, we can do some modifies and adjustments early to guarantee the feasibility and efficiency of this partition.
Using Network Calculus to build the bus arbiter model Math tools have been wildly used in engineering field to abstract different problems. Compared to other simulation method, math model has the advantage of high abstraction, wide application, fast simulating and so on. In this paper, we use Network Calculus math tool to build the bus arbiter model, which is very helpful to the bus schedule strategy optimization.
Using ESL and Network Calculus to analyze the bus schedule strategy
Build a math model just finish the abstraction of the object. You have to get the actual input data to analyze the performance. In this paper, we use the powerful data gathering function to gain the request flow in decoding process, and use it as the model input to get the bus schedule strategy analyzing report which is a main reference of the bus optimization.
引文
[1] Behzad Razavi, “Design of Analog CMOS Integrated Circuits”, McGraw-Hill International Edition, 2001. Page: 1-3
[2] 黄晁,王荣刚,彭聪,“可配置兼容多标准的视频解码器片上系统”,信息技术快报,Vol.3, No.3, 2005, Page: 3
[3] Iain E.G.Richardson, H.264 and MPEG-4 Video Compression Video Coding for Next generation Multimedia, John Wiley & Sons Ltd, 2003
[4] R L Cruz. Acalculus for network delay, part Ⅰ: Network elements in isolation. IEEE Transactions on information theory[J]. 1991, 37: 114-131.
[5] C S Chang. Stability, queue length and delay, Part Ⅰ: deterministic queuing networks[R]. Tech. Rep. Technical Report RC 17708, IBM, 1192.
[6] 纪洪之,张玉明,“H.264 及 AVS 解码中帧内预测的硬件设计和 ASIC 实现”,西安电子科技大学硕士学位论文,2007.
[7] 朱东巍,吴成柯,“H.264 中去块效应滤波器的研究及硬件设计”,西安电子科技大学硕士学位论文,2006.
[8] 彭聪,李国杰,“多模数字视频解码 SOC 芯片设计及研究”,中国科学院研究生院博士学位论文,2006.
[9] J Y Le Boudec and Patrick Thiran. Network Calculus: A Theory of Deteministic Queuing System for the Internet[M]. Heidelberg: Spring-Verlag, 2004.
[10] 高文宇,陈松乔,王建新,“网络微积分学研究”,微电子学与计算机,2004年第 21 卷 11 期
[11] Iain E. G. Richardson, “H.264 and MPEG-4 Video Compression: Video Coding for Next-generation Multimedia”, John Wiley & Sons, ISBN 0-470-84837-5 September 2003, 196-201(2003)
[12] Audio Video coding Standard Workgroup of China (AVS), Video Coding Standard, Nov. 2005.
[13] Joint Video Team (JVT) of ISO/IEC MPEG and ITU-TVCEG, “Draft ITU-T recommendation and final draft international standard of joint video specification (ITU-T Rec.H.264/ISO/IEC 14496-10 AVC),” JVTG050, 2003.
[14] Iain E. G. Richardson, “Video Codec Design: Developing Image and Video Compression Systems”, John Wiley & Sons, ISBN 0-411-48553-5, 2002.
[15] H.264/AVC reference software JM92.
[16] ARM reference software Soc Designer.
[17] http://www.tsmc.com/schinese/c_service/c01_desing/c010502_reference4.htm
[18] 许国辉, “视频编码芯片中的可重用性设计研究”, 浙江大学硕士学位论文, 2005 年, 第 22 页.
[19] 高文, “信源编码标准 AVS 及其在数字电视中的应用”, 电视技术, 2003 (11)
[20] 黄铁军, “AVS 标准的背景、进展与产业应用展望”, 信息技术与标准化. 2003 (9)
[21] P.List, A.Joch, J.Lainema, G. Bjontegaard, and M.Karczewicz, “Adaptive deblocking filter”, IEEE Transactions on Circuits and Systems for Video Technology, Vol.13, NO.7, July 2003
[22] Miao Sima, Yuanhua Zhou, and Wei Zhang, “An Efficient Architecture for Adaptive Deblocking Filter of H.264/AVC Video Coding”, IEEE Transactions on Consumer Electronics, Vol.50, No.1, Feb.2004
[23] Bin Sheng, Wen Gao, Di Wu, “A platform-based architecture of loop filter for AVS”, ICSP’04 Proceedings, 571-574
[24] 常周林, “基于 H.264/AVC 的 HDTV 视频解码芯片研究与初步设计”, 暨南大学硕士学位论文, 2005
[25] Cong Peng, Chao Huang, Ronggang Wang, Jianwei Dai, Yansheng Zhao, “Architecture of AVS Hardware Decoding System”, Proceeding of 2004 International Symposium on Intelligent Multimedia, Video and Speech Processing, October 20-22, 2004 HongKong.
[26] H.264/MPEG-4 Part10 White Paper: Overview of H.264, www.vcodex.com
[27] H.264/MPEG-4 Part10 White Paper: Reconstruction Filter, www.vcodex.com
[28] SAMIR PALNITKAR, “Verilog 数字设计与综合”, 夏宇闻等译, 电子工业出版社, 2004, 第二版
[29] 郭炜, 郭筝, 谢憬, “SOC 设计方法与实现”, 电子工业出版社, 2007, 第一版
[30] 虞露, 胡倩, 易峰, “AVS 视频的技术特征”, 数字电视与数字视频, 2005 年第7 期
[31] 魏少军, “集成电路设计方法学的几个热点”, 电子科技导报, 1998 年第 1 期, 第 20-24 页
[32] Michael Keating, Pierre Bircaud, “Reuse Methodology Manual: For a System-on-a-chip Designs”, Third Edition, Kluwer Academic Publisher, ISBN 1-4020-7141-8, 2002
[2] 黄晁,王荣刚,彭聪,“可配置兼容多标准的视频解码器片上系统”,信息技术快报,Vol.3, No.3, 2005, Page: 3
[3] Iain E.G.Richardson, H.264 and MPEG-4 Video Compression Video Coding for Next generation Multimedia, John Wiley & Sons Ltd, 2003
[4] R L Cruz. Acalculus for network delay, part Ⅰ: Network elements in isolation. IEEE Transactions on information theory[J]. 1991, 37: 114-131.
[5] C S Chang. Stability, queue length and delay, Part Ⅰ: deterministic queuing networks[R]. Tech. Rep. Technical Report RC 17708, IBM, 1192.
[6] 纪洪之,张玉明,“H.264 及 AVS 解码中帧内预测的硬件设计和 ASIC 实现”,西安电子科技大学硕士学位论文,2007.
[7] 朱东巍,吴成柯,“H.264 中去块效应滤波器的研究及硬件设计”,西安电子科技大学硕士学位论文,2006.
[8] 彭聪,李国杰,“多模数字视频解码 SOC 芯片设计及研究”,中国科学院研究生院博士学位论文,2006.
[9] J Y Le Boudec and Patrick Thiran. Network Calculus: A Theory of Deteministic Queuing System for the Internet[M]. Heidelberg: Spring-Verlag, 2004.
[10] 高文宇,陈松乔,王建新,“网络微积分学研究”,微电子学与计算机,2004年第 21 卷 11 期
[11] Iain E. G. Richardson, “H.264 and MPEG-4 Video Compression: Video Coding for Next-generation Multimedia”, John Wiley & Sons, ISBN 0-470-84837-5 September 2003, 196-201(2003)
[12] Audio Video coding Standard Workgroup of China (AVS), Video Coding Standard, Nov. 2005.
[13] Joint Video Team (JVT) of ISO/IEC MPEG and ITU-TVCEG, “Draft ITU-T recommendation and final draft international standard of joint video specification (ITU-T Rec.H.264/ISO/IEC 14496-10 AVC),” JVTG050, 2003.
[14] Iain E. G. Richardson, “Video Codec Design: Developing Image and Video Compression Systems”, John Wiley & Sons, ISBN 0-411-48553-5, 2002.
[15] H.264/AVC reference software JM92.
[16] ARM reference software Soc Designer.
[17] http://www.tsmc.com/schinese/c_service/c01_desing/c010502_reference4.htm
[18] 许国辉, “视频编码芯片中的可重用性设计研究”, 浙江大学硕士学位论文, 2005 年, 第 22 页.
[19] 高文, “信源编码标准 AVS 及其在数字电视中的应用”, 电视技术, 2003 (11)
[20] 黄铁军, “AVS 标准的背景、进展与产业应用展望”, 信息技术与标准化. 2003 (9)
[21] P.List, A.Joch, J.Lainema, G. Bjontegaard, and M.Karczewicz, “Adaptive deblocking filter”, IEEE Transactions on Circuits and Systems for Video Technology, Vol.13, NO.7, July 2003
[22] Miao Sima, Yuanhua Zhou, and Wei Zhang, “An Efficient Architecture for Adaptive Deblocking Filter of H.264/AVC Video Coding”, IEEE Transactions on Consumer Electronics, Vol.50, No.1, Feb.2004
[23] Bin Sheng, Wen Gao, Di Wu, “A platform-based architecture of loop filter for AVS”, ICSP’04 Proceedings, 571-574
[24] 常周林, “基于 H.264/AVC 的 HDTV 视频解码芯片研究与初步设计”, 暨南大学硕士学位论文, 2005
[25] Cong Peng, Chao Huang, Ronggang Wang, Jianwei Dai, Yansheng Zhao, “Architecture of AVS Hardware Decoding System”, Proceeding of 2004 International Symposium on Intelligent Multimedia, Video and Speech Processing, October 20-22, 2004 HongKong.
[26] H.264/MPEG-4 Part10 White Paper: Overview of H.264, www.vcodex.com
[27] H.264/MPEG-4 Part10 White Paper: Reconstruction Filter, www.vcodex.com
[28] SAMIR PALNITKAR, “Verilog 数字设计与综合”, 夏宇闻等译, 电子工业出版社, 2004, 第二版
[29] 郭炜, 郭筝, 谢憬, “SOC 设计方法与实现”, 电子工业出版社, 2007, 第一版
[30] 虞露, 胡倩, 易峰, “AVS 视频的技术特征”, 数字电视与数字视频, 2005 年第7 期
[31] 魏少军, “集成电路设计方法学的几个热点”, 电子科技导报, 1998 年第 1 期, 第 20-24 页
[32] Michael Keating, Pierre Bircaud, “Reuse Methodology Manual: For a System-on-a-chip Designs”, Third Edition, Kluwer Academic Publisher, ISBN 1-4020-7141-8, 2002