一种低压轨至轨输入/输出稳定跨导运算放大器的设计
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摘要
近年来,随着便携式电子产品的广泛应用和高性能VLSI系统集成的迅速发展,低电压模拟集成电路设计技术越来越受到人们的关注。但是,由于噪声和失调的限制,模拟集成电路不能使用最小尺寸器件,因此对于特征尺寸的缩小受益很少。此外,电源电压的降低迫使模拟电路单元在动态范围、电路速度等方面的性能大大降低,使得电路设计更加复杂化。为了提高运放的性能,增大输入输出信号的动态范围,最好能达到整个电源电压范围,即轨到轨(Rail-to-Rail),必须对运放的差分输入级和输出级进行改进设计。其中,稳定跨导的Rail-to-Rail运算放大器的设计更是成为研究的热点。
本设计对低电压轨至轨输入/输出稳定跨导技术做了广泛的调查研究,分析了这些技术的原理和优缺点。在吸收这些技术成果的基础上,设计了一个工作在±1.5V轨至轨输入/输出稳定跨导的CMOS运算放大器。
本文主要完成了以下几项工作:
1.对国内外的相关研究动态做了广泛的调研,详细比较了各种实现电路的优缺点,研究了各种电路的组成结构和工作原理。在吸收已有的相关技术成果基础上,提出自己的设计方案并验证了其实施的可行性。
2.根据CMOS工艺特点和要求,设计各级所采用的电路形式,如偏置电路、轨至轨稳定跨导输入级、共源共栅级、轨至轨输出级,密勒补偿电容等。特别是对于稳定跨导输入级的设计,比较了各种稳定跨导的方法,最终选用电平转移电路来稳定输入级跨导,并将输入级的总跨导稳定在8%左右。对于轨至轨输出级的设计,采用AB类前馈式输出级,不仅提高了输出电压动态范围,而且不增加电路额外功耗、具有良好的高频特性。
3.在版图的设计上,尽可能的使版图对称,减小由于器件不匹配而产生的寄生电容和寄生电阻。对于沟道宽度非常大的管子,采用叉指晶体管来替代简单的MOS晶体管折叠结构,从而减小了S/D结面积和栅电阻。
4.Hspice软件仿真的结果显示,运放能在-1.5V—+1.5V正常工作,基本达到轨至轨输入/输出,跨导变化率稳定在8%左右,直流增益达到90dB,相位裕度70°,实现了低压轨至轨输入/输出稳定跨导运算放大器的设计要求。
Recently, with the increasing application of portable electronic products and rapid development of the high performance VLSI System Integration, the design technique of Low-Voltage Analog Integrated Circuit attracts people increasingly. However, for the limit of noise and voltage offset limitation, the Analog IC cannot utilize the minimum size of the components. As a result, there are little benefits from regarding the characteristic size reduction. In addition, the reduction of supply voltage forces great decrease of analog circuit unit on dynamic range and speed, which lead to more complicated of circuit design. In order to increase the operational performance and the dynamic range of input/output signal, preferably the dynamic range cover the entire supply voltage scope (i.e. Rail-to-Rail), it is necessary to develop the design of operational differential input/output stage. Among them, the design of Rail-to-Rail operational amplifier with stable transconductance becomes a hot spot.
This paper has made widespread investigation of the low-voltage Rail-to-Rail input/output stable transconductance technology, and has analyzed the principles of these techniques as well as their pros and cons. Based on these technical achievement, this paper designs a CMOS operational amplifier with±1.5V Rail-to-Rail input/output stable transconductance.
This paper has involved the following subjects:
1. It has made the widespread investigation of the related domestic and foreign research, carefully compared the advantages and disadvantages of each kind of realization electric circuit, and studied the structure and the principles of each kind of electric circuit. On the basis of the related technical achievement, it set forth its own design proposal and has confirmed feasible implementation.
2. According to process properties and requirement of CMOS, the paper has designed the circuit forms used in each stage, such as bias circuit, Rail-to-Rail stable transconductance input stage, cascode stage, Rail-to-Rail output stage, and miller compensation capacitors, and the like. Especially, for design of Rail-to-Rail stable transconductance input stage, a variety of stable transconductance methods were compared, and finally the level-shifts circuit was employed, the total transconductance change of input stage is fixed about 8%. For design of Rail-to-Rail output stage, AB-type feed-forward output stages is used to enhance the dynamic range of output voltage, without circuit power increase, and having a good high-frequency characteristic.
3. In the domain design, making the domain to be symmetrical as far as possible, and reducing the parasitic capacity and the parasitic resistance caused by dismatch components. And for tubes with wide channel, interdigital transistors are used to replace the simple folding MOS transistor structure, which reduces the S/D junction area and gate resistance.
4. The Hspice simulation indicated that the operational amplifier can work on -1.5V—+1.5V, achieves the Rail-to-Rail input/output, with the rate of change of transconductance is stably about 8%, the DC gain 90dB, the phase allowance 70 degrees. It has realized the design of a operational amplifier of Rail-to-Rail input/output stable transconductance.
本设计对低电压轨至轨输入/输出稳定跨导技术做了广泛的调查研究,分析了这些技术的原理和优缺点。在吸收这些技术成果的基础上,设计了一个工作在±1.5V轨至轨输入/输出稳定跨导的CMOS运算放大器。
本文主要完成了以下几项工作:
1.对国内外的相关研究动态做了广泛的调研,详细比较了各种实现电路的优缺点,研究了各种电路的组成结构和工作原理。在吸收已有的相关技术成果基础上,提出自己的设计方案并验证了其实施的可行性。
2.根据CMOS工艺特点和要求,设计各级所采用的电路形式,如偏置电路、轨至轨稳定跨导输入级、共源共栅级、轨至轨输出级,密勒补偿电容等。特别是对于稳定跨导输入级的设计,比较了各种稳定跨导的方法,最终选用电平转移电路来稳定输入级跨导,并将输入级的总跨导稳定在8%左右。对于轨至轨输出级的设计,采用AB类前馈式输出级,不仅提高了输出电压动态范围,而且不增加电路额外功耗、具有良好的高频特性。
3.在版图的设计上,尽可能的使版图对称,减小由于器件不匹配而产生的寄生电容和寄生电阻。对于沟道宽度非常大的管子,采用叉指晶体管来替代简单的MOS晶体管折叠结构,从而减小了S/D结面积和栅电阻。
4.Hspice软件仿真的结果显示,运放能在-1.5V—+1.5V正常工作,基本达到轨至轨输入/输出,跨导变化率稳定在8%左右,直流增益达到90dB,相位裕度70°,实现了低压轨至轨输入/输出稳定跨导运算放大器的设计要求。
Recently, with the increasing application of portable electronic products and rapid development of the high performance VLSI System Integration, the design technique of Low-Voltage Analog Integrated Circuit attracts people increasingly. However, for the limit of noise and voltage offset limitation, the Analog IC cannot utilize the minimum size of the components. As a result, there are little benefits from regarding the characteristic size reduction. In addition, the reduction of supply voltage forces great decrease of analog circuit unit on dynamic range and speed, which lead to more complicated of circuit design. In order to increase the operational performance and the dynamic range of input/output signal, preferably the dynamic range cover the entire supply voltage scope (i.e. Rail-to-Rail), it is necessary to develop the design of operational differential input/output stage. Among them, the design of Rail-to-Rail operational amplifier with stable transconductance becomes a hot spot.
This paper has made widespread investigation of the low-voltage Rail-to-Rail input/output stable transconductance technology, and has analyzed the principles of these techniques as well as their pros and cons. Based on these technical achievement, this paper designs a CMOS operational amplifier with±1.5V Rail-to-Rail input/output stable transconductance.
This paper has involved the following subjects:
1. It has made the widespread investigation of the related domestic and foreign research, carefully compared the advantages and disadvantages of each kind of realization electric circuit, and studied the structure and the principles of each kind of electric circuit. On the basis of the related technical achievement, it set forth its own design proposal and has confirmed feasible implementation.
2. According to process properties and requirement of CMOS, the paper has designed the circuit forms used in each stage, such as bias circuit, Rail-to-Rail stable transconductance input stage, cascode stage, Rail-to-Rail output stage, and miller compensation capacitors, and the like. Especially, for design of Rail-to-Rail stable transconductance input stage, a variety of stable transconductance methods were compared, and finally the level-shifts circuit was employed, the total transconductance change of input stage is fixed about 8%. For design of Rail-to-Rail output stage, AB-type feed-forward output stages is used to enhance the dynamic range of output voltage, without circuit power increase, and having a good high-frequency characteristic.
3. In the domain design, making the domain to be symmetrical as far as possible, and reducing the parasitic capacity and the parasitic resistance caused by dismatch components. And for tubes with wide channel, interdigital transistors are used to replace the simple folding MOS transistor structure, which reduces the S/D junction area and gate resistance.
4. The Hspice simulation indicated that the operational amplifier can work on -1.5V—+1.5V, achieves the Rail-to-Rail input/output, with the rate of change of transconductance is stably about 8%, the DC gain 90dB, the phase allowance 70 degrees. It has realized the design of a operational amplifier of Rail-to-Rail input/output stable transconductance.
引文
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[30]K Langen,J H Huijsing.Compact Low-Voltage Power Efficient Operational Amplifier Cells for VLSI.IEEE J.Solid-State Circuits.1998,33(10):1483-1496
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[2]陈贵灿,邵志标,程军,林长贵.CMOS集成电路设计[M]。西安交通大学出版社.1999:48-54
[3]赵玉山.跨导型放大器原理·电路·应用.电子工业出版.1995:24-95
[4]孙润,尤一心,孙家麟.TANNER集成电路设计教程.北京希望电子出版社.2002:2-57
[5]J H Huijsing,D Linebarger.Low-Voltage Operational Amplifier with Rail-to-Rail Input and Output Ranges.IEEE J.Solid-State Circuits.1985,SC-20(6):1144-1150
[6]R Hogervorst,J P Tero,R G H Eschauzier,et al.A Compact Power-efficient 3V CMOS Rail-to-Rail Input/Output Operational Amplifier for VLSI Cell Libraries.IEEE J.Solid-State Circuits.1994,29(12):1505-1512
[7]Ron Hogervorst,Johan H.Huijsing.Design of Low-voltage,Low-Power Operational Amplifier Cells.Netherlands.Kluwer Academic Publishers.1996:34-35
[8]Wen-Chung S.Wu,Ward j.Helms,Jay A.kuhn,and Bruce E.Byrkett.Digital-Compatible High-Performance Operational Amplifier with Rail-to-Rail Input and Output Ranges.IEEE J.Solid-State Circuits.1994,29(1):63-66
[9]寇戈,蒋立平.模拟电路与数字电路[M].电子工业出版社.2004:25-29
[10]高文焕等著.模拟电路的计算机分析与设计[M].北京清华大学出版社.1999:4-61
[11]李金平.模拟集成电路基础.清华大学出版社.2003:179-182
[12]邵丙铣,郑国祥等.MOS集成电路的分析与设计.复旦大学出版社.2002:36-72
[13]S.folangge.基于运算放大器和模拟集成电路的电路设计.刘树棠,朱茂林,荣玫译.西安交通大学出版社.2004:48-62
[14]高德远,樊晓桠,王党辉等.超大规模集成电路.高等教育出版社.2003:43-86
[15]Y.Tsividis.Problems with Modeling of Analog MOS LSI.IEDM.1982:274-277
[16]C.T.Sah.Characteristocs of the Metal-Oxide-Semiconductor Transistor.IEEE Trans.Electron Devices.1964,11(7):324-345
[17]H.Shichman,D.Hodges.Modelling and Simulation of Insulated-Gate Field-Effect Transistor Switching Circuits.IEEE J.solid-State circuits.1968,SC-3(3):285-289
[18]P.R.Gray,R.G.Meyer.Analysis and Design of Analog Integrated Circuits.2nd.Wiley,1984:646
[19]Y.Tsivides.Moderate Inversion in MOS Devices.Solid State Electron.1982,25(11):1099-1104
[20]Ron Hogervorst and Johan H.Huijsing.Design of Low-Voltage,Low-Power Operational Amplifier Cells.Kluwer Academic Publishers,Netherlands,1996
[21]Lin C H,M Ismail.A Low-Voltage Low-Power CMOS OpAmp with Rail-to-Rail Input Output.IEEE Trans.Circuits and Systems,Proceedings of the 40th Midwest Symposium on[C].1997:1193-1196
[22]J H Huijsing,D Linebarger.Low-Voltage Operational Amplifier with Rail-to-Rail Input and Output Ranges[J].IEEE J.Solid-State Circuits.1985,SC-20(6):1144-1150
[23]S Akurai,M Ismail.Robust design of rail-to-rail CMOS operational amplifiers for a low power supply voltage[J].IEEE J.Solid-State Circuits.1996,31(2):146-156
[24]R.Hogervorst,J.P.Tero,J.H.Huijsing.Compact CMOS Constant-gm Rail-to-Rail Input Stage with gm-Control by an Electric Zenor Diode.IEEE J.of Solid-state Circuits.1996,31(7):1035-1040
[25]Chi-Hung Lin,Mohammed Ismail.A Low-Voltage Low-Power CMOS OpAmp with Rail-to-Rail Input/Output.IEEE.1997:1193-1194
[26]Minsheng Wang,Terry L.Mayhugh,Jr.,sheriff H.K.Embabi and Edgar Sanchez-Sinencio.Constant-gm Rail-to-Rail CMOS Op-Amp Input Stage with Overlapped Transition Regions.IEEE J.Solid-State Circuits.1999,134(2):148-156
[27]Abdulkerim L Coban,Phillip E Allen.A 1.75V Rail-to-Rail CMOS Op-Amp.IEEE Trans.Circuits and Systems,1994.ISCAS.IEEE International Symposium.1994:497-500
[28]H Elwan,W Gao,R Sadkowski,et al.CMOS low-voltage class-AB operational transconductance amplifier.Electron.Lett.2000,36(17):1439-1440
[29]A Torralba,R G Carvajal,J Martinez-Heredia,et al.Class AB output stage for low voltage CMOS op-amps with accurate quiescent current control.Electron.Lett.2000,36(21):1753-1754
[30]K Langen,J H Huijsing.Compact Low-Voltage Power Efficient Operational Amplifier Cells for VLSI.IEEE J.Solid-State Circuits.1998,33(10):1483-1496
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