4H-SiC MESFETs微波功率器件新结构与实验研究
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摘要
碳化硅(SiC)是第三代半导体材料的典型代表,也是目前晶体生长技术和器件制造水平最成熟、应用最广泛的宽禁带半导体材料之一。与传统半导体材料Si和GaAs相比,SiC材料具有大禁带宽度、高临界击穿电场、高电子饱和漂移速度以及高热导率等优良物理特性,是高温、高频、抗辐照、大功率应用场合下极为理想的半导体材料。在微波大功率器件领域,具有高功率密度和高温可靠性的4H-SiCMESFETs器件是极具潜力的竞争者,在固态微波通讯系统和相控阵雷达等领域具有广阔的应用前景。然而SiC MESFETs器件存在的自热效应和陷阱效应严重影响器件工作稳定性,降低了器件输出功率密度,制约其进一步发展。
本文对4H-SiC MESFETs器件的功率特性和频率特性等进行研究,提出源场板SiC MESFETs器件新结构;在深入分析影响器件工作稳定性的自热效应基础上,建立了大栅宽SiC MESFETs器件三维电热解析模型;并进行多凹栅结构SiC MESFETs器件的实验研究。主要工作包括:
(1)提出源场板4H-SiC MESFETs器件新结构。该结构通过将场板与源极直接相连,不仅削弱器件栅漏侧栅极边缘的电场强度,优化了栅漏侧的表面电场,提高器件击穿电压;而且场板与源极相连,使得场板与沟道电容转变为漏源反馈电容,并在输出调谐回路中被电感抵消掉,从而降低栅漏反馈电容,改善器件功率增益,克服了栅场板结构引入额外栅漏反馈电容降低器件功率增益的缺点。数值分析结果表明,本文提出的源场板4H-SiC MESFETs器件新结构比常规结构SiCMESFETs器件击穿电压提高66%,最大理论输出功率密度提高73%,功率增益增加2.2dB。同时,本文新结构与常规结构SiC MESFETs工艺相兼容,这为提高SiC微波器件输出功率提供了一种新选择。
(2)提出大栅宽4H-SiC MESFETs三维电热解析模型。在研究大栅宽SiCMESFETs电热特性的基础上,针对目前严重影响SiC微波器件性能稳定性的自热效应,建立了一个精确且简化的大栅宽SiC MESFETs器件电热解析模型。该模型从固体三维线性热传导方程出发,通过求解器件稳态情况下的拉普拉斯方程,获得器件表面温度分布的解析模型。通过与大信号三区解析模型的联立耦合求解,计算出器件表面各栅指的温度分布。该电热解析模型给出了器件表面峰值温度分布与结构参数(如栅指间距、衬底厚度)和偏置关系(如漏极电压、栅极电压)的解析表达式。模拟分析结果表明,本文建立的三维电热解析模型计算的器件表面各栅指峰值温度分布与二维数值仿真结果基本一致。该电热解析模型有助于器件设计者进行热设计,从而抑制大栅宽器件自热效应的影响,提高器件工作稳定性。
(3)大栅宽4H-SiC MESFETs多凹栅器件结构实验研究。基于目前国内SiC工艺加工平台,设计制作了多凹栅结构SiC MESFETs器件。该器件通过多凹槽结构削弱栅下峰值电场强度,增加了器件栅漏击穿电压。在仿真分析基础上,合理设计了多凹槽刻蚀工艺流程和5mm栅宽SiC MESFETs器件版图,成功进行了工艺实验。在S波段2GHz脉冲状态下,获得最大输出功率为13.5W,增益11.3dB,功率附加效率50%,输出脉冲顶降小于0.5dB的多凹栅结构SiC MESFETs器件。同时,对影响器件性能的几个关键工艺步骤(源漏电极的欧姆接触电阻、栅凹槽刻蚀和空气桥)进行了工艺研究。通过矩形传输线测试方法,获得源漏电极的比接触电阻率为1.05×10~(-6)Ω.cm~2。实验测量多凹栅结构SiC MESFETs器件栅漏击穿电压大于100V,而相同工艺下常规结构器件栅漏击穿电压只有50V。
同时,本文对影响SiC MESFETs器件性能稳定性的表面陷阱效应和几何尺寸效应进行了研究,详细分析和讨论了表面态能级和陷阱密度对器件Ⅳ特性、转移特性、跨导和瞬态响应等特性的影响以及栅源、栅漏间距对器件直流和微波性能的影响。模拟分析结果表明,表面态降低了漏电流,使阈值电压发生漂移,引起负跨导频率色散等,严重影响器件性能稳定性,降低了器件输出功率和附加效率。而栅源间距相对于栅漏间距对SiC MESFETs器件性能具有更明显的影响,通过减小栅源间距,可以显著提高器件Ⅳ特性和高频小信号特性。
Silicon carbide (SiC) is an attractive wide band-gap semiconductor material for high-power, high-voltage, high-frequency and high-temperature applications due to its superior properties, such as the wide bandgap, high critical electric field, high thermal conductivity and high electron saturation velocity, and the relatively mature material growth and device fabrication technology. 4H-SiC metal semiconductor field-effect transistors (MESFETs) are emerging as a promising technology for high power microwave applications such as transmitters for commercial and military communications. On account of the recent progress in device process and the technology for producing high quality SiC substrates and epitaxial films, impressive performances for SiC MESFETs has been reported. However, although these performances were very promising, two limitations have appeared, i.e., the self-heating and trapping effects.
This dissertation majors on studying the power and frequency characteristics of the 4H-SiC MESFETs. A new structure of 4H-SiC MESFETs based on the source field plate technology is proposed in this thesis. Meanwhile, a three-dimensional (3D) electro-thermal analytical model to accurately predict the temperature distribution in multi-finger SiC MESFETs has been developed. And a large periphery SiC MESFETs with multi-recess gate was fabricated. The detail contributions of the dissertation are listed as followings:
(1) Novel 4H-SiC MESFETs with the source field plate: The proposed structure, which is the source metal extension over the gate to the drift region, not only improve the breakdown voltage, but also eliminate the drawback of low gain characteristics relatively resulted from additional feedback capacitance associated with the field plate electrode. The improvement of the breakdown voltage is due to the facte that the depletion layer formed under the source field plate electrode resulted in the reduction of the electric field strength at the gate edge toward drain. Moreover, the field plate to channel capacitance becomes a drain-source capacitance, which could be absorbed in the output tuning network, thereby reducing gate-to-drain capacitance and improving the gain characteristics. As compared to the conventional structures, the MESFETs with the source field plate show an approximately 66% increase in breakdown voltage, which is responsible for the 73% improvement in the power density. At the same time, the proposed device, which is compatible with conventional SiC MESFETs technology, can afford a novel option to improve the performance of the high-power SiC MESFET devices.
(2) Electro-thermal analytical model for multi-finger 4H-SiC power MESFETs: A three-dimensional (3D) electro-thermal analytical model to accurately predict the temperature distribution in multi-finger SiC-MESFETs has been proposed by solving the 3D linear heat transfer equation in solid material. The results of the analytical and numerical investigation of self-heating effects have also been presented. The analytical results are well supported by the two-dimensional electro-thermal simulation results obtained by Atlas. The models give an explicit influence on temperature distribution in terms of the structure parameter and operation condition, such as the gate-to-gate pitch, the thickness of the substrate and the source-drain bias. The obtained results can be used for optimization of the thermal design of the multi-finger 4H-SiC power MESFETs.
(3) 4H-SiC MESFETs with a multi-recess gate: A large periphery SiC MESFETs with multi-recess gate to increase the output power and drain efficiency was fabricated. The gate recess reduces the peak electric field at the gate, enabling both higher operating breakdown voltage and reduced dispersion, leading to higher output power densities and power-added efficiency (PAE). Numerical simulations have indicated similar effects for SiC MESFETs with a multi-recess gate. Packaged devices with 5 mm gate periphery of these transistors demonstrated an output power of 13.5 W with a linear gain of 11.3 dB and a power-added efficiency of 50% under pulse operation at 2 GHz. These results are improved compared to conventional MESFETs fabricated in this work using the same process. The influences of the key processes, such as the omic contact, the recess etch and the air bridge, on the performance of SiC MESFETs also study in this thesis. The typical specific contact resistance on n+ epilayer extracted from transmission line method (TLM) is deduced to be about 1.05×10~6Ω.cm~2. The gate-drain breakdown voltage measured is over 100 V for proposed devices and about 50 V for conventional devices.
Finally, this dissertation also studies the influence of the surface state effects and the gate-source scaling effects in SiC MESFETs. The mechanism by which acceptor-type traps effect the transconductance and drain current changes has been discussed. The simulation results show that transconductance exhibits negative frequency dispersion behavior, which is caused by the charge exchange via the surface states existing between the gate-source and gate-drain terminals. The current degradation behavior and the threshold voltage shift are also observed due to acceptor-type traps, acting as electron traps, in MESFET devices. Two-dimensional DC and small-signal ac analyses show that a downscaling of the gate-source distance can improve device performance, enhancing drain current, transconductance and maximum oscillation frequency. The variations of gate-to-source capacitance, gate-to-drain capacitance, cut-off frequency and maximum oscillation frequency with respect to the change in gate-source length have also been studied in detail. The obtained results can be used for a design guideline for the layout of 4H-SiC MESFETs.
本文对4H-SiC MESFETs器件的功率特性和频率特性等进行研究,提出源场板SiC MESFETs器件新结构;在深入分析影响器件工作稳定性的自热效应基础上,建立了大栅宽SiC MESFETs器件三维电热解析模型;并进行多凹栅结构SiC MESFETs器件的实验研究。主要工作包括:
(1)提出源场板4H-SiC MESFETs器件新结构。该结构通过将场板与源极直接相连,不仅削弱器件栅漏侧栅极边缘的电场强度,优化了栅漏侧的表面电场,提高器件击穿电压;而且场板与源极相连,使得场板与沟道电容转变为漏源反馈电容,并在输出调谐回路中被电感抵消掉,从而降低栅漏反馈电容,改善器件功率增益,克服了栅场板结构引入额外栅漏反馈电容降低器件功率增益的缺点。数值分析结果表明,本文提出的源场板4H-SiC MESFETs器件新结构比常规结构SiCMESFETs器件击穿电压提高66%,最大理论输出功率密度提高73%,功率增益增加2.2dB。同时,本文新结构与常规结构SiC MESFETs工艺相兼容,这为提高SiC微波器件输出功率提供了一种新选择。
(2)提出大栅宽4H-SiC MESFETs三维电热解析模型。在研究大栅宽SiCMESFETs电热特性的基础上,针对目前严重影响SiC微波器件性能稳定性的自热效应,建立了一个精确且简化的大栅宽SiC MESFETs器件电热解析模型。该模型从固体三维线性热传导方程出发,通过求解器件稳态情况下的拉普拉斯方程,获得器件表面温度分布的解析模型。通过与大信号三区解析模型的联立耦合求解,计算出器件表面各栅指的温度分布。该电热解析模型给出了器件表面峰值温度分布与结构参数(如栅指间距、衬底厚度)和偏置关系(如漏极电压、栅极电压)的解析表达式。模拟分析结果表明,本文建立的三维电热解析模型计算的器件表面各栅指峰值温度分布与二维数值仿真结果基本一致。该电热解析模型有助于器件设计者进行热设计,从而抑制大栅宽器件自热效应的影响,提高器件工作稳定性。
(3)大栅宽4H-SiC MESFETs多凹栅器件结构实验研究。基于目前国内SiC工艺加工平台,设计制作了多凹栅结构SiC MESFETs器件。该器件通过多凹槽结构削弱栅下峰值电场强度,增加了器件栅漏击穿电压。在仿真分析基础上,合理设计了多凹槽刻蚀工艺流程和5mm栅宽SiC MESFETs器件版图,成功进行了工艺实验。在S波段2GHz脉冲状态下,获得最大输出功率为13.5W,增益11.3dB,功率附加效率50%,输出脉冲顶降小于0.5dB的多凹栅结构SiC MESFETs器件。同时,对影响器件性能的几个关键工艺步骤(源漏电极的欧姆接触电阻、栅凹槽刻蚀和空气桥)进行了工艺研究。通过矩形传输线测试方法,获得源漏电极的比接触电阻率为1.05×10~(-6)Ω.cm~2。实验测量多凹栅结构SiC MESFETs器件栅漏击穿电压大于100V,而相同工艺下常规结构器件栅漏击穿电压只有50V。
同时,本文对影响SiC MESFETs器件性能稳定性的表面陷阱效应和几何尺寸效应进行了研究,详细分析和讨论了表面态能级和陷阱密度对器件Ⅳ特性、转移特性、跨导和瞬态响应等特性的影响以及栅源、栅漏间距对器件直流和微波性能的影响。模拟分析结果表明,表面态降低了漏电流,使阈值电压发生漂移,引起负跨导频率色散等,严重影响器件性能稳定性,降低了器件输出功率和附加效率。而栅源间距相对于栅漏间距对SiC MESFETs器件性能具有更明显的影响,通过减小栅源间距,可以显著提高器件Ⅳ特性和高频小信号特性。
Silicon carbide (SiC) is an attractive wide band-gap semiconductor material for high-power, high-voltage, high-frequency and high-temperature applications due to its superior properties, such as the wide bandgap, high critical electric field, high thermal conductivity and high electron saturation velocity, and the relatively mature material growth and device fabrication technology. 4H-SiC metal semiconductor field-effect transistors (MESFETs) are emerging as a promising technology for high power microwave applications such as transmitters for commercial and military communications. On account of the recent progress in device process and the technology for producing high quality SiC substrates and epitaxial films, impressive performances for SiC MESFETs has been reported. However, although these performances were very promising, two limitations have appeared, i.e., the self-heating and trapping effects.
This dissertation majors on studying the power and frequency characteristics of the 4H-SiC MESFETs. A new structure of 4H-SiC MESFETs based on the source field plate technology is proposed in this thesis. Meanwhile, a three-dimensional (3D) electro-thermal analytical model to accurately predict the temperature distribution in multi-finger SiC MESFETs has been developed. And a large periphery SiC MESFETs with multi-recess gate was fabricated. The detail contributions of the dissertation are listed as followings:
(1) Novel 4H-SiC MESFETs with the source field plate: The proposed structure, which is the source metal extension over the gate to the drift region, not only improve the breakdown voltage, but also eliminate the drawback of low gain characteristics relatively resulted from additional feedback capacitance associated with the field plate electrode. The improvement of the breakdown voltage is due to the facte that the depletion layer formed under the source field plate electrode resulted in the reduction of the electric field strength at the gate edge toward drain. Moreover, the field plate to channel capacitance becomes a drain-source capacitance, which could be absorbed in the output tuning network, thereby reducing gate-to-drain capacitance and improving the gain characteristics. As compared to the conventional structures, the MESFETs with the source field plate show an approximately 66% increase in breakdown voltage, which is responsible for the 73% improvement in the power density. At the same time, the proposed device, which is compatible with conventional SiC MESFETs technology, can afford a novel option to improve the performance of the high-power SiC MESFET devices.
(2) Electro-thermal analytical model for multi-finger 4H-SiC power MESFETs: A three-dimensional (3D) electro-thermal analytical model to accurately predict the temperature distribution in multi-finger SiC-MESFETs has been proposed by solving the 3D linear heat transfer equation in solid material. The results of the analytical and numerical investigation of self-heating effects have also been presented. The analytical results are well supported by the two-dimensional electro-thermal simulation results obtained by Atlas. The models give an explicit influence on temperature distribution in terms of the structure parameter and operation condition, such as the gate-to-gate pitch, the thickness of the substrate and the source-drain bias. The obtained results can be used for optimization of the thermal design of the multi-finger 4H-SiC power MESFETs.
(3) 4H-SiC MESFETs with a multi-recess gate: A large periphery SiC MESFETs with multi-recess gate to increase the output power and drain efficiency was fabricated. The gate recess reduces the peak electric field at the gate, enabling both higher operating breakdown voltage and reduced dispersion, leading to higher output power densities and power-added efficiency (PAE). Numerical simulations have indicated similar effects for SiC MESFETs with a multi-recess gate. Packaged devices with 5 mm gate periphery of these transistors demonstrated an output power of 13.5 W with a linear gain of 11.3 dB and a power-added efficiency of 50% under pulse operation at 2 GHz. These results are improved compared to conventional MESFETs fabricated in this work using the same process. The influences of the key processes, such as the omic contact, the recess etch and the air bridge, on the performance of SiC MESFETs also study in this thesis. The typical specific contact resistance on n+ epilayer extracted from transmission line method (TLM) is deduced to be about 1.05×10~6Ω.cm~2. The gate-drain breakdown voltage measured is over 100 V for proposed devices and about 50 V for conventional devices.
Finally, this dissertation also studies the influence of the surface state effects and the gate-source scaling effects in SiC MESFETs. The mechanism by which acceptor-type traps effect the transconductance and drain current changes has been discussed. The simulation results show that transconductance exhibits negative frequency dispersion behavior, which is caused by the charge exchange via the surface states existing between the gate-source and gate-drain terminals. The current degradation behavior and the threshold voltage shift are also observed due to acceptor-type traps, acting as electron traps, in MESFET devices. Two-dimensional DC and small-signal ac analyses show that a downscaling of the gate-source distance can improve device performance, enhancing drain current, transconductance and maximum oscillation frequency. The variations of gate-to-source capacitance, gate-to-drain capacitance, cut-off frequency and maximum oscillation frequency with respect to the change in gate-source length have also been studied in detail. The obtained results can be used for a design guideline for the layout of 4H-SiC MESFETs.
引文
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