高速数字设计技术在微机保护设备中的应用研究
|
摘要
电力系统的高速发展对继电保护不断提出新的要求，而电子技术、计算机技术与通信技术的飞速发展又为继电保护技术的发展注入了新的活力，微机保护作为一种新型的继电保护方式，正逐渐从单片机时代向嵌入式时代跨进。嵌入式系统在微机保护设备中的应用，使得继电保护日新月异，网络化、智能化以及保护、控制、测量、数据通信一体化得以实现。
嵌入式技术的应用，给继电保护带来了活力，同时，也给微机保护设备的硬件设计带来了挑战，传统的低速数字设计(工作频率低于50MHz的数字设计)方法在高速数字设计(高于50MHz)领域已经不再适用，甚至不能实现，而高速数字设计技术为高速嵌入式系统的硬件设计提供了支持。高速数字设计技术，其核心的思想就是采用模拟设计的手段来解决数字电路设计中的信号完整性问题及电磁兼容问题。
本文广泛收集、整理、分析了当前微机保护的现状，对微机保护设备的原理及构成作了剖析，并对嵌入式技术本身及其在微机保护设备硬件设计中的应用做了阐述，提出微机保护设备硬件设计存在的问题和将面临的问题。同时，本文收集并分析了目前高速数字设计领域的研究成果，对高速数字设计中面临的三大问题：时序问题、信号完整性问题以及电磁兼容问题作了深入的分析，信号完整性仿真与分析技术是高速数字设计的最有效方法，对于高速数字设计中的时序问题以及电磁兼容问题，本文提出一些有效的、针对性的解决方法。将高速数字设计技术应用于微机保护设备的嵌入式系统设计是本文的目的，也正是本文主要论述的内容，本文将结合应用实例作进一步的论证。
The rapid development of power system raises new demands to relay protection. And the fast development of electronic technology, computer technology and communication technology injects new vitality to the development of relay protection technology. As a new way of relay protection, computer protection now strides from SCM era to embedded era. The application of embedded system in the computer protection equipment makes great changes to relay protection. It makes network, intelligence, the integration of protection, control, measurement and data communications come true.
The application of embedded technology brings vitality to relay protection. It also brings new challenges to the hardware design of computer protection equipment. The method of traditional low-speed digital design (below 50MHz frequency digital design) is no longer applicable in the field of high-speed digital design (above 50MHz), which even cannot be realized. While high-speed digital design techniques provide support for high-speed embedded systems hardware design. The core of high-speed digital design techniques is to solve the signal integrity problems and electromagnetic compatibility problems in the digital circuit design by means of analog design.
This paper collects, collates and analyzes the current status of computer protection. It analyzes the principle and components of computer protection equipment. Furthermore, it expounds embedded technology and its application in the hardware design of computer protection equipment. It points out the existing problems and future problems of the hardware design of computer protection equipment. This paper also collects and analyzes the research results of current high-speed digital design. It makes a thorough analysis on the three problems of high-speed digital design: timing, signal integrity and electromagnetic compatibility. Signal integrity simulation and analysis technology is the most effective way for the high-speed digital design. Concerning timing problems and electromagnetic compatibility problems, this paper proposes some effective solutions. The purpose of this paper is to apply high-speed digital design techniques to the embedded system design of computer protection equipment. This paper will combine examples for further proof.
嵌入式技术的应用，给继电保护带来了活力，同时，也给微机保护设备的硬件设计带来了挑战，传统的低速数字设计(工作频率低于50MHz的数字设计)方法在高速数字设计(高于50MHz)领域已经不再适用，甚至不能实现，而高速数字设计技术为高速嵌入式系统的硬件设计提供了支持。高速数字设计技术，其核心的思想就是采用模拟设计的手段来解决数字电路设计中的信号完整性问题及电磁兼容问题。
本文广泛收集、整理、分析了当前微机保护的现状，对微机保护设备的原理及构成作了剖析，并对嵌入式技术本身及其在微机保护设备硬件设计中的应用做了阐述，提出微机保护设备硬件设计存在的问题和将面临的问题。同时，本文收集并分析了目前高速数字设计领域的研究成果，对高速数字设计中面临的三大问题：时序问题、信号完整性问题以及电磁兼容问题作了深入的分析，信号完整性仿真与分析技术是高速数字设计的最有效方法，对于高速数字设计中的时序问题以及电磁兼容问题，本文提出一些有效的、针对性的解决方法。将高速数字设计技术应用于微机保护设备的嵌入式系统设计是本文的目的，也正是本文主要论述的内容，本文将结合应用实例作进一步的论证。
The rapid development of power system raises new demands to relay protection. And the fast development of electronic technology, computer technology and communication technology injects new vitality to the development of relay protection technology. As a new way of relay protection, computer protection now strides from SCM era to embedded era. The application of embedded system in the computer protection equipment makes great changes to relay protection. It makes network, intelligence, the integration of protection, control, measurement and data communications come true.
The application of embedded technology brings vitality to relay protection. It also brings new challenges to the hardware design of computer protection equipment. The method of traditional low-speed digital design (below 50MHz frequency digital design) is no longer applicable in the field of high-speed digital design (above 50MHz), which even cannot be realized. While high-speed digital design techniques provide support for high-speed embedded systems hardware design. The core of high-speed digital design techniques is to solve the signal integrity problems and electromagnetic compatibility problems in the digital circuit design by means of analog design.
This paper collects, collates and analyzes the current status of computer protection. It analyzes the principle and components of computer protection equipment. Furthermore, it expounds embedded technology and its application in the hardware design of computer protection equipment. It points out the existing problems and future problems of the hardware design of computer protection equipment. This paper also collects and analyzes the research results of current high-speed digital design. It makes a thorough analysis on the three problems of high-speed digital design: timing, signal integrity and electromagnetic compatibility. Signal integrity simulation and analysis technology is the most effective way for the high-speed digital design. Concerning timing problems and electromagnetic compatibility problems, this paper proposes some effective solutions. The purpose of this paper is to apply high-speed digital design techniques to the embedded system design of computer protection equipment. This paper will combine examples for further proof.
引文
[1] 贺家李、电力系统继电保护技术的现状与发展、中国电力、1999、32(10)：38-40
[2] 张大波、嵌入式系统原理、设计与应用、机械工业出版社、2005
[3] 杨奇逊、微型机继电保护基础、水利电力出版社、1988
[4] 周志敏、周纪海、纪爱华、继电保护实用技术问答电子工业出版社、2005
[5] Estrin D. connecting、The Physical World with Pervasive Networks [J]. IEEE pervasive Computing. 2002、1(1) :56-69
[6] 贺家李、宋从矩、电力系统继电保护原理、中国电力出版社、2004
[7] http://baike.baidu.com/view/405903.htm.
[8] 贾绍文、顾凯、电子设备中嵌入式单片机系统抗干扰技术研究、航空电子技术、2004年9月第35卷第3期
[9] 金敏、周翔、金粱、嵌入式系统——组成、原理与设计编程、人民邮电出版社、2006
[10] Stephen H. Hall, Garrett W. Hall, James A. McCall、High-Speed Digital System Design—A Handbook of Interconnect Theory and Design Practices.
[11] Howard Johnson, Martin Graham, High-Speed Digital Design—A Handbook of Black Magic.
[12] Brian Young, Digital Signal Integrity-Modeling and Simulation with Interconnects and Packages.
[13] Douglas Brooks, Signal Integrity Issues and Printed Circuit Board Design.
[14] Cadence Design Systems Inc. PCB Designer' s SI Guide-A basic guide for SI and crosstalk for a 印 PCB designer.
[15] [日]久保寺忠 著、冯杰、盖强、樊东 译、高速数字电路设计与安装技巧、科学出版社、2006
[16] 顾海洲、马双武、印制电路板 电磁兼容技术——设计实践、清华 大学出版社、2004
[17] 朱力恒 电子技术仿真实验教程、电子工业出版社、2003
[18] [美] C．A．哈珀 主编、贾松良、蔡坚、王豫明等译、电子组装制造——芯片．电路板．封装及元器件、科学出版社、2005
[19] 周润景、袁伟亭、刘晓滨、Cadence印制电路板 设计与制版、电子工业出版社、2005
[20] [美]Mark I．Montrose著、刘元安、李书芳、高攸纲 译、电磁兼容与印制电路板——理论、设计和布线，人民邮电出版社、2002
[21] 伦德全、电路板级的电磁兼容设计、飞思卡尔半导体应用笔记、第1版、10／2005
[22] http://www.eetchina.com/ART_8800234799_480101_a19d013c. H TM
[23] Walt Kester、High-speed Design Techniques、Analog Devices, Inc.、1996
[24] Walt Kester、James Bryant、Grounding in High Speed Systems、 Analog Devices, Inc.
[25] 于波，高速电子线路的信号完整性设计，北京理工大学
[26] 朱文立、线路板(PCB)级的电磁兼容设计、中国赛宝实验室
[27] 徐暄等、印制电路板的电磁兼容问题、电子工艺技术、2001年7月、第22卷 第4期 147-149
[28] Analog Devices, Inc. ADSP-BF533 Blackfin Embedded Processor Data Sheet、Rev. C, May, 2006.
[29] Cadence Design Systems Inc. Allegro PCB SI Foundations Training Manual Version 15.2
[30] Micron Technology Inc., MT48LC16M16A2 data sheet、2002
[31] Samsung Electronics、K9F5608U0D NAND Flash Memory data sheet Revision 1.3、June 2nd 2006
[32] Silicon Storage Technology Inc., SST39VF040 data sheet、 2001
[33] IMP Inc., IMP706P data sheet、1999
[34] Cadence Design Systems, Inc., Allegro PCB Layout System Training Manual Version 15.0, 2003
[35] Cadence Design Systems, Inc., Concept HDL Front-to-Back Design Flow Training Manual Version 15.0, 2003
[36] Cadence Design Systems, Inc., PCB Librarian Expert Manual Version 15.0、2003
[37] 李楠、庞健、由武军、袁园、Cadence Concept HDL & Allegro原理图与PCB设计、人民邮电出版社、2005
[38] 周润景、袁伟亭、Cadence高速电路板设计与仿真、电子工业出版社、2006
[39] 黄豪佑、董辉、卢建刚、Cadence高速PCB设计与仿真分析、北京航空航天大学出版社、2006
[40] Kim G. Helliwell、Comparison of Signal Integrity Simulations and Lab Measurements: a "Forensic" Case Study, Acuson Corporation
[41] Lynne Green、Simulation and Modeling for Signal Integrity and EMC、Cadence Design Systems, Inc., 2001
[2] 张大波、嵌入式系统原理、设计与应用、机械工业出版社、2005
[3] 杨奇逊、微型机继电保护基础、水利电力出版社、1988
[4] 周志敏、周纪海、纪爱华、继电保护实用技术问答电子工业出版社、2005
[5] Estrin D. connecting、The Physical World with Pervasive Networks [J]. IEEE pervasive Computing. 2002、1(1) :56-69
[6] 贺家李、宋从矩、电力系统继电保护原理、中国电力出版社、2004
[7] http://baike.baidu.com/view/405903.htm.
[8] 贾绍文、顾凯、电子设备中嵌入式单片机系统抗干扰技术研究、航空电子技术、2004年9月第35卷第3期
[9] 金敏、周翔、金粱、嵌入式系统——组成、原理与设计编程、人民邮电出版社、2006
[10] Stephen H. Hall, Garrett W. Hall, James A. McCall、High-Speed Digital System Design—A Handbook of Interconnect Theory and Design Practices.
[11] Howard Johnson, Martin Graham, High-Speed Digital Design—A Handbook of Black Magic.
[12] Brian Young, Digital Signal Integrity-Modeling and Simulation with Interconnects and Packages.
[13] Douglas Brooks, Signal Integrity Issues and Printed Circuit Board Design.
[14] Cadence Design Systems Inc. PCB Designer' s SI Guide-A basic guide for SI and crosstalk for a 印 PCB designer.
[15] [日]久保寺忠 著、冯杰、盖强、樊东 译、高速数字电路设计与安装技巧、科学出版社、2006
[16] 顾海洲、马双武、印制电路板 电磁兼容技术——设计实践、清华 大学出版社、2004
[17] 朱力恒 电子技术仿真实验教程、电子工业出版社、2003
[18] [美] C．A．哈珀 主编、贾松良、蔡坚、王豫明等译、电子组装制造——芯片．电路板．封装及元器件、科学出版社、2005
[19] 周润景、袁伟亭、刘晓滨、Cadence印制电路板 设计与制版、电子工业出版社、2005
[20] [美]Mark I．Montrose著、刘元安、李书芳、高攸纲 译、电磁兼容与印制电路板——理论、设计和布线，人民邮电出版社、2002
[21] 伦德全、电路板级的电磁兼容设计、飞思卡尔半导体应用笔记、第1版、10／2005
[22] http://www.eetchina.com/ART_8800234799_480101_a19d013c. H TM
[23] Walt Kester、High-speed Design Techniques、Analog Devices, Inc.、1996
[24] Walt Kester、James Bryant、Grounding in High Speed Systems、 Analog Devices, Inc.
[25] 于波，高速电子线路的信号完整性设计，北京理工大学
[26] 朱文立、线路板(PCB)级的电磁兼容设计、中国赛宝实验室
[27] 徐暄等、印制电路板的电磁兼容问题、电子工艺技术、2001年7月、第22卷 第4期 147-149
[28] Analog Devices, Inc. ADSP-BF533 Blackfin Embedded Processor Data Sheet、Rev. C, May, 2006.
[29] Cadence Design Systems Inc. Allegro PCB SI Foundations Training Manual Version 15.2
[30] Micron Technology Inc., MT48LC16M16A2 data sheet、2002
[31] Samsung Electronics、K9F5608U0D NAND Flash Memory data sheet Revision 1.3、June 2nd 2006
[32] Silicon Storage Technology Inc., SST39VF040 data sheet、 2001
[33] IMP Inc., IMP706P data sheet、1999
[34] Cadence Design Systems, Inc., Allegro PCB Layout System Training Manual Version 15.0, 2003
[35] Cadence Design Systems, Inc., Concept HDL Front-to-Back Design Flow Training Manual Version 15.0, 2003
[36] Cadence Design Systems, Inc., PCB Librarian Expert Manual Version 15.0、2003
[37] 李楠、庞健、由武军、袁园、Cadence Concept HDL & Allegro原理图与PCB设计、人民邮电出版社、2005
[38] 周润景、袁伟亭、Cadence高速电路板设计与仿真、电子工业出版社、2006
[39] 黄豪佑、董辉、卢建刚、Cadence高速PCB设计与仿真分析、北京航空航天大学出版社、2006
[40] Kim G. Helliwell、Comparison of Signal Integrity Simulations and Lab Measurements: a "Forensic" Case Study, Acuson Corporation
[41] Lynne Green、Simulation and Modeling for Signal Integrity and EMC、Cadence Design Systems, Inc., 2001