基于32nm光刻双重图形技术的研究和工艺实践
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摘要
近十年来,随着半导体技术的不断进步,器件的功能也不断强大。然而随之而来的制造难度也与日俱增。为了便于半导体生产商突破制造技术的瓶颈,生产导向型设计(DFM)应运而生。而作为生产导向型设计的重要组成部分,光刻分辨率增强技术(RET)和光学临近效应修正技术(OPC)得到了业界的普遍重视。随着半导体技术大步迈向32纳米技术节点,通常的RET和OPC已经无法满足更高技术代的要求,双重图形光刻技术(Double Patterning Lithography)、高折射率浸没式光刻技术(High Index Immersion Lithography)以及极紫外光刻技术(Extremely Ultra Violet Lithography)等光刻分辨率增强技术应运而生。然而,高折射率浸没式光刻所选择的液体和镜头组的开发仍然没有定论；EUV受制于过低的光源功率、光刻版的缺陷率、光刻胶的选择、过低的产能等诸多难题,在短时间内量产的可能性不大。目前,作为这些光刻分辨率增强技术之一的双重图形浸没式光刻技术,被认为是在2011年前实现32纳米甚至22纳米技术的唯一可行性解决方案。
双重图形的原理是将一套高密度的电路图形分解成两套分立的、密度低一些的图形,然后将它们印制到目标圆晶上。双重图形被当作是一种能够使本已很难再降低的k1因子(表征光刻工艺复杂度的参数)得以继续减小的主流方案,在2006年,它已经加入ITRS中。目前此技术仍处在研发阶段,尚有若干技术问题需要研究解决。国外知名的研发机构乃至有实力的半导体大公司都在投入大量人力物力进行研发使其能成为解决32nm技术节点的可行性量产技术。国内由于技术代和国际上的差距,虽然现阶段无法量产32nm,但对其研发终究会指导未来的技术走向,并在现有设备前提不变的条件下或只需对现有光刻基础设施进行很小的改动,就可以有效地填补45nm到32nm,浸没式光刻与EUV之间的甚至更小节点的光刻技术空白。利用该技术提高设备的工艺能力,为解决光刻机的设备资本高投入从而降低成本做出贡献。
In the recent ten years, semiconductor as a high technology has developed gradually, device fuctions become stronger and stronger. Meanwhile, its manufacturing is more and more difficult.In order to overcome the bottle neck of the manufacture, Design For Manufacture (DFM) has played an important role. As the most important part of DFM, Resolution Enhancement Technology (RET) and Optical Proximity Correction (OPC) have become more popular. As the 32nm technology node is coming, Double Patterning Tech, High Index Immersion Tech, and Extremely Ultra Violet Lithography (EUVL) are the main options for technology beyond 32nm. So far there is no conclusion about High Index Immersion lens set and liquid materials. EUV has also got into the dilemmar of the low illumination power, high reticle blanket defect ratio, novel resist, low throughput etc.. However, as one of the RETs, DPT it is believed to be the only access to 32nm even 22nm tech.
The goal of double patterning is to improve resolution of dense circuit layouts by splitting them into two separate, sparser layers, imaging them separately, and recombining the images into the target pattern through the fabrication. DPT is considered as the main approach to get lower K1 factor and it has been included into ITRS in 2006. So far DPT is not mature to use in mass production, it is still at R&D, lots of problems are needed to be solved. Many companies have put more and more efforts for DPT since for most low technology node foundries it can use current tools to get smaller CD by DPT. It can also fill the gap between 45nm and 32nm, becoming the transition between immersion litho and EUV litho. Using DPT to enhance the litho tool resolution, it can lower the equipment investment.
双重图形的原理是将一套高密度的电路图形分解成两套分立的、密度低一些的图形,然后将它们印制到目标圆晶上。双重图形被当作是一种能够使本已很难再降低的k1因子(表征光刻工艺复杂度的参数)得以继续减小的主流方案,在2006年,它已经加入ITRS中。目前此技术仍处在研发阶段,尚有若干技术问题需要研究解决。国外知名的研发机构乃至有实力的半导体大公司都在投入大量人力物力进行研发使其能成为解决32nm技术节点的可行性量产技术。国内由于技术代和国际上的差距,虽然现阶段无法量产32nm,但对其研发终究会指导未来的技术走向,并在现有设备前提不变的条件下或只需对现有光刻基础设施进行很小的改动,就可以有效地填补45nm到32nm,浸没式光刻与EUV之间的甚至更小节点的光刻技术空白。利用该技术提高设备的工艺能力,为解决光刻机的设备资本高投入从而降低成本做出贡献。
In the recent ten years, semiconductor as a high technology has developed gradually, device fuctions become stronger and stronger. Meanwhile, its manufacturing is more and more difficult.In order to overcome the bottle neck of the manufacture, Design For Manufacture (DFM) has played an important role. As the most important part of DFM, Resolution Enhancement Technology (RET) and Optical Proximity Correction (OPC) have become more popular. As the 32nm technology node is coming, Double Patterning Tech, High Index Immersion Tech, and Extremely Ultra Violet Lithography (EUVL) are the main options for technology beyond 32nm. So far there is no conclusion about High Index Immersion lens set and liquid materials. EUV has also got into the dilemmar of the low illumination power, high reticle blanket defect ratio, novel resist, low throughput etc.. However, as one of the RETs, DPT it is believed to be the only access to 32nm even 22nm tech.
The goal of double patterning is to improve resolution of dense circuit layouts by splitting them into two separate, sparser layers, imaging them separately, and recombining the images into the target pattern through the fabrication. DPT is considered as the main approach to get lower K1 factor and it has been included into ITRS in 2006. So far DPT is not mature to use in mass production, it is still at R&D, lots of problems are needed to be solved. Many companies have put more and more efforts for DPT since for most low technology node foundries it can use current tools to get smaller CD by DPT. It can also fill the gap between 45nm and 32nm, becoming the transition between immersion litho and EUV litho. Using DPT to enhance the litho tool resolution, it can lower the equipment investment.
引文
[1]杨力,先进光学制造技术[M],科学出版社,139-233,2001
[2]刘建海,陈开盛,曹庄琪.光刻技术在微细加工中的应用[J].半导体技术,2001,26(8)：37-39
[3]赵猛,张亚非,徐东,王印月.超精细图案光刻技术的研究与发展[J].微细加工技术,2002,(4)：1-6
[4]M Quirk. J Serda et al, "Semiconductor Manufacturing Technology" [M], Publishing House of Electronics Industry, paged 341-400,2004
[5]M.波恩,E.沃尔夫.光学原理[M].北京：科学出版社,1981：699-704
[6]王国雄,王雪洁.用于提高光刻分辨率的光学成像算法的研究[J].半导体技术,2005,30(9)：24-27
[7]M. Neisser, et al., "Mechanism studies of Scanning Electron Microscope measurement effects on 193nm photoresists and the development of improved linewidth measurement methods, "[J]. Proceedings of Interface 2000,2000. pp.43-52.
[8]Aaron H.光刻技术：任重道远[EB].：半导体国际,2006-3-18
[9]冯伯儒.光刻技术及其极限和发展前景[J].光电工程,1994,21(2)：57-64
[10]童志义.远紫外光刻现状及未来[J].电子工业专用设备,1997,26(2)：5-11
[11]冯伯儒,张锦,侯德胜,等.相移掩膜和光学邻近效应校正光刻技术[J].光电工程,2001,28(1)：1-5
[12]苏平,冯伯儒,张锦.提高光刻图形质量的双曝光技术[J].微细加工技术,2001,(2)：20-23
[13]郭立萍,黄惠杰,王向朝.光学光刻中的离轴照明技术[J].激光杂志,2005,26(1)：23-25
[14]Levenson MD. Improving Resolution in Photolithography With a Phase-Shifting Mask[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES,1982, 29 (12):1828-1836
[15]Vicent wuxi Interactions of double patterning technology with wafer processing, OPC and design flows SPIE Vol 6924_2
[16]Jos de Klerkl, Christian Wagnerl. Performance of a 1.35NA ArF immersion lithography system for 40nm application. SPIE Vol.6520 65201Y-1
[2]刘建海,陈开盛,曹庄琪.光刻技术在微细加工中的应用[J].半导体技术,2001,26(8)：37-39
[3]赵猛,张亚非,徐东,王印月.超精细图案光刻技术的研究与发展[J].微细加工技术,2002,(4)：1-6
[4]M Quirk. J Serda et al, "Semiconductor Manufacturing Technology" [M], Publishing House of Electronics Industry, paged 341-400,2004
[5]M.波恩,E.沃尔夫.光学原理[M].北京：科学出版社,1981：699-704
[6]王国雄,王雪洁.用于提高光刻分辨率的光学成像算法的研究[J].半导体技术,2005,30(9)：24-27
[7]M. Neisser, et al., "Mechanism studies of Scanning Electron Microscope measurement effects on 193nm photoresists and the development of improved linewidth measurement methods, "[J]. Proceedings of Interface 2000,2000. pp.43-52.
[8]Aaron H.光刻技术：任重道远[EB].：半导体国际,2006-3-18
[9]冯伯儒.光刻技术及其极限和发展前景[J].光电工程,1994,21(2)：57-64
[10]童志义.远紫外光刻现状及未来[J].电子工业专用设备,1997,26(2)：5-11
[11]冯伯儒,张锦,侯德胜,等.相移掩膜和光学邻近效应校正光刻技术[J].光电工程,2001,28(1)：1-5
[12]苏平,冯伯儒,张锦.提高光刻图形质量的双曝光技术[J].微细加工技术,2001,(2)：20-23
[13]郭立萍,黄惠杰,王向朝.光学光刻中的离轴照明技术[J].激光杂志,2005,26(1)：23-25
[14]Levenson MD. Improving Resolution in Photolithography With a Phase-Shifting Mask[J]. IEEE TRANSACTIONS ON ELECTRON DEVICES,1982, 29 (12):1828-1836
[15]Vicent wuxi Interactions of double patterning technology with wafer processing, OPC and design flows SPIE Vol 6924_2
[16]Jos de Klerkl, Christian Wagnerl. Performance of a 1.35NA ArF immersion lithography system for 40nm application. SPIE Vol.6520 65201Y-1