数字音频处理芯片的∑-△A/D转换器设计—调制器部分
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摘要
Sigma-Delta ADC采用过采样和噪声整形技术实现高精度模数转换,和传统的Nyquist率模数转换器相比,避免了对模拟电路性能指标和元器件匹配精度的较高要求,并可充分利用现代VLSI的高速、高集成度、低成本的优点,它已成为音频模数转换的主要技术。
本文设计了一个适合于音频处理芯片的Sigma-Delta调制器,采用过采样的概念并结合噪声整形技术来实现Sigma-Delta调制器的结构。为了提高模数转换器的解析度,可以从两方面着手,一、提高过采样率;二、增加Sigma-Delta调制器的阶数。但是,采用过高的过采样率会带来设计上的困难。因而,恰当的方式是折中设计过采样率和调制器的阶数。本文使用两阶结构和256的过采样率(OSR),实现一个解析度为14位的二阶Sigma-Delta调制器。
本文在分析调制器工作理论的基础上,使用MATLAB SIMULINK对调制器进行了行为级的分析设计。调制器采用全差分开关电容电路实现,并根据系统结构特点就如何优化电路结构、克服电路中存在的非理想特性、提高电路性能作了具体分析,在此基础上完成了开关电容积分器、全差分折叠共源共栅运算放大器、参考电压源、比较器、两相非交叠时钟等模块的电路结构和参数设计。本文采用HJTC 0.35μm CMOS工艺,使用Cadence Spectre和Hspice工具对电路进行了仿真分析,最后给出了Sigma-Delta调制器电路实现,仿真结果表明可以达到86.5 dB的信噪比。
Sigma-Delta ADCs can achieve high resolution based on over-sampling and noise-shaping techniques. Comparing to conventional Nyquist converters, Sigma-Delta converters avoids the high requirements of high performance and precisely matched components in analog circuit design. Additionally, it takes full advantage of modern VLSI technology, which features high speed, high density and low cost. Currently, Sigma-Delta ADCs have been widely used for audio A/D conversion and become the mainstream technology.
In this thesis, A second-order sigma-delta modulator for digital audio operational chip is designed. The sigma-delta modulator is realized by over-sampling and noise-shaping techniques. In order to enhance resolution of analog-digital converter, two points should be considered: firstly, to enhance over-sampling rate. Secondly, to add the sigma-delta modulator’s order. Nevertheless, excessive over-sampling rate will bring difficulties to the design. So, a moderate method is to have a trade-off between over-sampling rate and modulator’s order. In this thesis, a 14-bit resolution sigma-delta modulator is designed which is based on a second-order architecture and 256 over-sampling rate(OSR).
Based on the theoretical work, the behavioral of the modulator is simulated by Matlab Simulink. The experimental modulator has been designed with fully differential switched-capacitor circuit. According to the feature of the system, structure optimization, overcome of non-idealities and performance improvement are analyzed Based on the above works, switched-capacitor integrator, fully differential cascade operational amplifier, non-overlap clock, voltage reference, comparator, all of the blocks have been designed. The schematic simulation is by the tools of Cadence Spectre and Hspice with HJTC 0.35-μm CMOS technology. Finally, it is shown good circuit simulation results of the Sigma-Delta modulator whose signal-noise rate is 86.5 dB.
本文设计了一个适合于音频处理芯片的Sigma-Delta调制器,采用过采样的概念并结合噪声整形技术来实现Sigma-Delta调制器的结构。为了提高模数转换器的解析度,可以从两方面着手,一、提高过采样率;二、增加Sigma-Delta调制器的阶数。但是,采用过高的过采样率会带来设计上的困难。因而,恰当的方式是折中设计过采样率和调制器的阶数。本文使用两阶结构和256的过采样率(OSR),实现一个解析度为14位的二阶Sigma-Delta调制器。
本文在分析调制器工作理论的基础上,使用MATLAB SIMULINK对调制器进行了行为级的分析设计。调制器采用全差分开关电容电路实现,并根据系统结构特点就如何优化电路结构、克服电路中存在的非理想特性、提高电路性能作了具体分析,在此基础上完成了开关电容积分器、全差分折叠共源共栅运算放大器、参考电压源、比较器、两相非交叠时钟等模块的电路结构和参数设计。本文采用HJTC 0.35μm CMOS工艺,使用Cadence Spectre和Hspice工具对电路进行了仿真分析,最后给出了Sigma-Delta调制器电路实现,仿真结果表明可以达到86.5 dB的信噪比。
Sigma-Delta ADCs can achieve high resolution based on over-sampling and noise-shaping techniques. Comparing to conventional Nyquist converters, Sigma-Delta converters avoids the high requirements of high performance and precisely matched components in analog circuit design. Additionally, it takes full advantage of modern VLSI technology, which features high speed, high density and low cost. Currently, Sigma-Delta ADCs have been widely used for audio A/D conversion and become the mainstream technology.
In this thesis, A second-order sigma-delta modulator for digital audio operational chip is designed. The sigma-delta modulator is realized by over-sampling and noise-shaping techniques. In order to enhance resolution of analog-digital converter, two points should be considered: firstly, to enhance over-sampling rate. Secondly, to add the sigma-delta modulator’s order. Nevertheless, excessive over-sampling rate will bring difficulties to the design. So, a moderate method is to have a trade-off between over-sampling rate and modulator’s order. In this thesis, a 14-bit resolution sigma-delta modulator is designed which is based on a second-order architecture and 256 over-sampling rate(OSR).
Based on the theoretical work, the behavioral of the modulator is simulated by Matlab Simulink. The experimental modulator has been designed with fully differential switched-capacitor circuit. According to the feature of the system, structure optimization, overcome of non-idealities and performance improvement are analyzed Based on the above works, switched-capacitor integrator, fully differential cascade operational amplifier, non-overlap clock, voltage reference, comparator, all of the blocks have been designed. The schematic simulation is by the tools of Cadence Spectre and Hspice with HJTC 0.35-μm CMOS technology. Finally, it is shown good circuit simulation results of the Sigma-Delta modulator whose signal-noise rate is 86.5 dB.
引文
1. Schreier R,Temes G.C.Delta-Sigma Data Converters[M].Beijing:Publishing House of Science,2007.2-138
2. Morizio J.C,Hoke I.M,Kocak T,etc.14-bit 2.2-MS/s sigma-delta ADC's[J].Solid-State Circuits,IEEE Journal of, July 2000,35(7):968-976
3. Y.Geerts,M.S.J.Steyaert,W.Sansen.A High-performance Multibit△ΣCMOS ADC[J]. IEEE Journal of Solid-State Circuits,2000,35:1829-1840
4.易婷.高性能∑-△模数转化器设计[D]:[博士学位论文].上海:复旦大学,2002
5.陈树毅,马琪.A/D转换技术及其发展趋势[J].杭州电子科技大学学报,2006,26(6):57-61
6.张媛媛,蒋岩峰.∑-△模拟/数字转换器综述[J].微电子学,2006,36(4):456-460
7. Dong Hyun Ko,Ji Hoon Jung,Young Gun Pu,etc.A Design of 14-bits ADC and DAC for CODEC Applications in 0.18μm CMOS Process[J].Electronic Design, Test & Applications,IEEE International Symposium on,23-25 Jan.2008,Page(s):3-6
8. Nuzzo P,De Bernardinis F.Efficient Calibration through Statistical Behavioral Modeling of a High-Speed Low-Power ADC[J].Microelectronics and Electronics,2006,50(16):297- 300
9. S. Rabii,B.Wooley.A 1.8-V digital-audio sigma-delta modulator in 0.8-um CMOS[D]. Center for Integrated Systems Stanford University Stanford,CA 94305,1997
10. R.Jacob Bake. CMOS Mix-signal Circuit Design[M]. Beijing: Publishing House of Science,2005.14-38
11.洪志良.模拟集成电路分析与设计[M].Beijing:科学出版社,2005.256-312
12. David A.Johns,Ken Martin.Analog Integrated Circuit Design[M].China Machine Press, 2007.523-551
13.朱颖.高速两阶Sigma-Delta调制器的研究与设计[D]:[硕士学位论文].浙江:浙江大学, 2005
14. Richard Schreier,Gabor C.Temes.Understanding Delta-Sigma Data Converters[M]. Wiley, 2005. ISBN:0-471-46585-2
15. B. E. Boser, B.A. Wooley. The Design of Sigma-Delta Modulation Analog-to-Digital Converters[J].IEEE J. Solid-State Circuit, Dec.1988, Vol. SC-23:1298-1308
16. Phillip E. Allen, Douglas R.Holberg.CMOS Analog Circuit Design,Second Edition[M]. Beijing:Publishing House of Electronics Industry, 2005.249-259,571-583
17. Dragi.a Milovanovi?, Milan Savi?, Miljan Nikoli?. Second-Order Sigma-Delta Modulator in Standard CMOS Technology[J]. Serbian Journal of Electrical Engineering,November 2004,1(3):37-44
18. Cheongyuen W.Tsang,Yun Chiu,Borivoje Nikolic.A 1.2V,10.8mW,500kHz Sigma-Delta Modulator with 84dB SNDR and 96dB SFDR[J].VLSI Circuits.Digest of Technical Papers, 2006,Page(s):161-163
19.杨银堂,朱樟明等.高速CMOS数据转化器[M].北京:科学出版社,2006.14-18
20. Pervez M.Aziz,Henrik V. Sorensen ,Jan Van der Spiegel. An Overview of Sigma-Delta Converters:How a 1-bit ADC achieves more than 16-bit resolution[M].IEEE Signal Processing Magazine,Jan.1996,13(1):61-84
21. Bernhard E. Boser, Student Member, IEEE, Bruce A.Wooley,Fellow, IEEE.The Design of Sigma-Delta Modulation Analog-to-Digital Converters[J].IEEE Journal of Solid State Circuits, Dec.1998,23(6):1298-1308
22. DADI Mohamed béchir,BOUALLEGUE Ridha,EZZEDDINE taher.New Approach to Optimize a Sigma Delta Modulator[J].IJCSNS International Journal of Computer Science and Network Security,Jun.2007,7(6):250-253
23. S.Brigati,F.Francesconi,P.Malcovati,etc.Modeling Sigma-Delta Modulator Non-Idealities in SIMULINK[J].Proceedings of IEEE International Symposium on Circuits and Systems,Orlando,USA,1999,(2):384-387
24. Hashem Zare-Hoseini,Izzet Kale,Omid Shoaei.Modeling of switched-capacitor delta-sigma Modulators inSIMULINK[J]. IEEE Transactions on Instrumentation and Measurement,Aug.2005,54(4):1646-1654
25. Reid Wender,David Ihme.TSA002-16-bit Sigma Delta ADC Design [R]. TRIAD Semiconductor,June 2,2007.
26. Behzad Razavi. Design of Analog CMOS Integrated Circuits[M].Xian:Xian Jiaotong University Press, 2003.239-279,309-359
27. Lei Wang,Junyan Ren,Wenjing Yin,etc.A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch[J].Circuits and Systems,2007.ISCAS 2007.IEEE International Symposium on,27-30 May 2007,Page(s):1721-1724
28.吴建辉. CMOS模拟集成电路分析与设计[M].北京:电子工业出版社,2004.195-216
29. Zhineng Zhu, Raghu Tumati, Scott Collins,etc. A Low-noise Low-offset Op Amp in 0.35μm CMOS Process[J].Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on,10-13 Dec.2006,Page(s):624-627
30.程剑平.带通Σ-Δ调制器的研究和设计[D]:[博士学位论文].南京:东南大学,2006
31. Erik McCarthy. Design and Layout of aTelescopic Operational Transconductance Amplifier[D].Orono, Maine:Department of Electrical and Computer Engineering University of Maine,2003
32. Ali M.Niknejad,Bernhard E.Boser.Analog Intergrated Circuits[M].Department of Electrical Engineering and Computer Sciences,2006.
33. P.R.Gray.模拟集成电路设计与分析[M].北京:高等教育出版社,2005.759-789
34.孙彤,李冬梅.一种0.2-mV 20-MHz 600-μW比较器[J].微电子学, 2007, 37(2):270-278
35.李建中,魏同力.一种CMOS动态闩锁比较器优化设计[J].电路与系统学报, 2005,10(2):48-52
36.吴光林,吴建辉,等.一种用于ADC电路的高速高精度比较器设计[J].应用科学学报, 2005,23(6):591-594
37. R.Jacob Baker,Harry W.Li,David E.Boyce.CMOS Circuit Design,Layout,and Simulation [M].Beijing:China Machine Press,2006.683-791
38. Ayman A.Fayed,M.Ismall. A High Speed,Low Voltage CMOS Offset Comparator[J]. Analog Integrated Circuits and Signal Processing,2003,36:267-272
39. Yu-Chemg Hung,Bin-Da Liu. A Low-voltage Wide-input CMOS Comparator for Sensor Application Using Back-gate Technique[J].Biosensors and Bioelectronics,2004,20:53-59
2. Morizio J.C,Hoke I.M,Kocak T,etc.14-bit 2.2-MS/s sigma-delta ADC's[J].Solid-State Circuits,IEEE Journal of, July 2000,35(7):968-976
3. Y.Geerts,M.S.J.Steyaert,W.Sansen.A High-performance Multibit△ΣCMOS ADC[J]. IEEE Journal of Solid-State Circuits,2000,35:1829-1840
4.易婷.高性能∑-△模数转化器设计[D]:[博士学位论文].上海:复旦大学,2002
5.陈树毅,马琪.A/D转换技术及其发展趋势[J].杭州电子科技大学学报,2006,26(6):57-61
6.张媛媛,蒋岩峰.∑-△模拟/数字转换器综述[J].微电子学,2006,36(4):456-460
7. Dong Hyun Ko,Ji Hoon Jung,Young Gun Pu,etc.A Design of 14-bits ADC and DAC for CODEC Applications in 0.18μm CMOS Process[J].Electronic Design, Test & Applications,IEEE International Symposium on,23-25 Jan.2008,Page(s):3-6
8. Nuzzo P,De Bernardinis F.Efficient Calibration through Statistical Behavioral Modeling of a High-Speed Low-Power ADC[J].Microelectronics and Electronics,2006,50(16):297- 300
9. S. Rabii,B.Wooley.A 1.8-V digital-audio sigma-delta modulator in 0.8-um CMOS[D]. Center for Integrated Systems Stanford University Stanford,CA 94305,1997
10. R.Jacob Bake. CMOS Mix-signal Circuit Design[M]. Beijing: Publishing House of Science,2005.14-38
11.洪志良.模拟集成电路分析与设计[M].Beijing:科学出版社,2005.256-312
12. David A.Johns,Ken Martin.Analog Integrated Circuit Design[M].China Machine Press, 2007.523-551
13.朱颖.高速两阶Sigma-Delta调制器的研究与设计[D]:[硕士学位论文].浙江:浙江大学, 2005
14. Richard Schreier,Gabor C.Temes.Understanding Delta-Sigma Data Converters[M]. Wiley, 2005. ISBN:0-471-46585-2
15. B. E. Boser, B.A. Wooley. The Design of Sigma-Delta Modulation Analog-to-Digital Converters[J].IEEE J. Solid-State Circuit, Dec.1988, Vol. SC-23:1298-1308
16. Phillip E. Allen, Douglas R.Holberg.CMOS Analog Circuit Design,Second Edition[M]. Beijing:Publishing House of Electronics Industry, 2005.249-259,571-583
17. Dragi.a Milovanovi?, Milan Savi?, Miljan Nikoli?. Second-Order Sigma-Delta Modulator in Standard CMOS Technology[J]. Serbian Journal of Electrical Engineering,November 2004,1(3):37-44
18. Cheongyuen W.Tsang,Yun Chiu,Borivoje Nikolic.A 1.2V,10.8mW,500kHz Sigma-Delta Modulator with 84dB SNDR and 96dB SFDR[J].VLSI Circuits.Digest of Technical Papers, 2006,Page(s):161-163
19.杨银堂,朱樟明等.高速CMOS数据转化器[M].北京:科学出版社,2006.14-18
20. Pervez M.Aziz,Henrik V. Sorensen ,Jan Van der Spiegel. An Overview of Sigma-Delta Converters:How a 1-bit ADC achieves more than 16-bit resolution[M].IEEE Signal Processing Magazine,Jan.1996,13(1):61-84
21. Bernhard E. Boser, Student Member, IEEE, Bruce A.Wooley,Fellow, IEEE.The Design of Sigma-Delta Modulation Analog-to-Digital Converters[J].IEEE Journal of Solid State Circuits, Dec.1998,23(6):1298-1308
22. DADI Mohamed béchir,BOUALLEGUE Ridha,EZZEDDINE taher.New Approach to Optimize a Sigma Delta Modulator[J].IJCSNS International Journal of Computer Science and Network Security,Jun.2007,7(6):250-253
23. S.Brigati,F.Francesconi,P.Malcovati,etc.Modeling Sigma-Delta Modulator Non-Idealities in SIMULINK[J].Proceedings of IEEE International Symposium on Circuits and Systems,Orlando,USA,1999,(2):384-387
24. Hashem Zare-Hoseini,Izzet Kale,Omid Shoaei.Modeling of switched-capacitor delta-sigma Modulators inSIMULINK[J]. IEEE Transactions on Instrumentation and Measurement,Aug.2005,54(4):1646-1654
25. Reid Wender,David Ihme.TSA002-16-bit Sigma Delta ADC Design [R]. TRIAD Semiconductor,June 2,2007.
26. Behzad Razavi. Design of Analog CMOS Integrated Circuits[M].Xian:Xian Jiaotong University Press, 2003.239-279,309-359
27. Lei Wang,Junyan Ren,Wenjing Yin,etc.A High-Speed High-Resolution Low-Distortion CMOS Bootstrapped Switch[J].Circuits and Systems,2007.ISCAS 2007.IEEE International Symposium on,27-30 May 2007,Page(s):1721-1724
28.吴建辉. CMOS模拟集成电路分析与设计[M].北京:电子工业出版社,2004.195-216
29. Zhineng Zhu, Raghu Tumati, Scott Collins,etc. A Low-noise Low-offset Op Amp in 0.35μm CMOS Process[J].Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on,10-13 Dec.2006,Page(s):624-627
30.程剑平.带通Σ-Δ调制器的研究和设计[D]:[博士学位论文].南京:东南大学,2006
31. Erik McCarthy. Design and Layout of aTelescopic Operational Transconductance Amplifier[D].Orono, Maine:Department of Electrical and Computer Engineering University of Maine,2003
32. Ali M.Niknejad,Bernhard E.Boser.Analog Intergrated Circuits[M].Department of Electrical Engineering and Computer Sciences,2006.
33. P.R.Gray.模拟集成电路设计与分析[M].北京:高等教育出版社,2005.759-789
34.孙彤,李冬梅.一种0.2-mV 20-MHz 600-μW比较器[J].微电子学, 2007, 37(2):270-278
35.李建中,魏同力.一种CMOS动态闩锁比较器优化设计[J].电路与系统学报, 2005,10(2):48-52
36.吴光林,吴建辉,等.一种用于ADC电路的高速高精度比较器设计[J].应用科学学报, 2005,23(6):591-594
37. R.Jacob Baker,Harry W.Li,David E.Boyce.CMOS Circuit Design,Layout,and Simulation [M].Beijing:China Machine Press,2006.683-791
38. Ayman A.Fayed,M.Ismall. A High Speed,Low Voltage CMOS Offset Comparator[J]. Analog Integrated Circuits and Signal Processing,2003,36:267-272
39. Yu-Chemg Hung,Bin-Da Liu. A Low-voltage Wide-input CMOS Comparator for Sensor Application Using Back-gate Technique[J].Biosensors and Bioelectronics,2004,20:53-59