液晶显示器背光的冷阴极荧光灯控制芯片设计
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摘要
本设计为天津大学IC设计中心与天大天财公司的合作项目，实现了用于液晶显示器背光的冷阴极荧光灯（后简称为液晶背光灯）的控制芯片。其核心功能为采用脉宽调制方法控制液晶背光灯的亮度。在此基础上，我们本着保障电路正常运行以及完善电路功能原则设计了这款芯片。这也是本芯片的特色所在。
经过设计，本芯片能够提供两路独立的脉宽调制输出信号。在灯管开启后，芯片具有开路保护、低压监控和标准信号监控功能,保障了芯片的运行安全。灯管的亮度能够通过反馈回路，或者设置误差放大器输入端的参考端直流电平来调整。用户可以选择较高的参考直流电平使灯变得更亮或者选择更低的电平使灯变得更暗。用户可以根据需要定义软开关开启的时间，还可以自由选择是否采用软开关信号。脉宽调制信号的频率可以由用户设置电容的大小来调整。
本文按照自顶向下的IC设计思想，首先介绍了芯片应用的背景以及设计要求，继而从电路总体结构、模块划分入手阐述了电路的工作原理。之后着重介绍了各模块电路的设计思想，依次论述了它们的具体实现。其中包括开关控制模块、带隙参考电压源电路、工作点电压模块、锯齿波发生器模块、脉宽调制模块、软开关选择模块、开灯保护及低压监控模块、标准信号监控模块和输出模块。在电路的设计和仿真章节中，介绍了最底层基本单元电路的实现，并给出了仿真验证的结果。经过反复的模拟和调试，本芯片的各项指标都能够达到要求。论文的最后为芯片的版图设计部分，从基本的器件版图设计到整体的布局布线都作了详尽的阐述，并介绍了版图完成之后的验证步骤。该芯片的版图已经通过了各项检查。
A CCFL backlight control chip was designed and implemented in this paper. It is based on the method of pulse width modulation to output the signal in order to control the source outside the chip, and accordingly the lamp.
After our design, this chip can provide 2 fully functioned PWM control circuit. The open lamp condition can be detected after lamp period, which ensure the circuit working safely. The lamp dimming can be done through this feedback loop or, by setting the reference DC level of the input of error amplifier. The reference DC level of dimming can be selected as higher level for more brightness or lower level for less brightness. Customer can define the period of soft start signal, and can also decide whether to use the soft start signal. The frequency of PWM wave can also adjusted by engineers through choosing the capacitance.
According to the Top-Down IC design method, this paper describes the application background and the design requirements of the chip firstly. Then the structure and the modules of the design, the working mechanism was presented. The main part of this paper provides the design thoughts of every module, including the ON/OFF module, bandgap reference circuit, saw tooth wave generator, bias circuit, PWM module, and protection circuits thoroughly. The detailed circuits and their simulation were also discussed. At the end of this paper, were the layout design and its verification. Now the chip has passed the verification of the simulation and design check.
经过设计，本芯片能够提供两路独立的脉宽调制输出信号。在灯管开启后，芯片具有开路保护、低压监控和标准信号监控功能,保障了芯片的运行安全。灯管的亮度能够通过反馈回路，或者设置误差放大器输入端的参考端直流电平来调整。用户可以选择较高的参考直流电平使灯变得更亮或者选择更低的电平使灯变得更暗。用户可以根据需要定义软开关开启的时间，还可以自由选择是否采用软开关信号。脉宽调制信号的频率可以由用户设置电容的大小来调整。
本文按照自顶向下的IC设计思想，首先介绍了芯片应用的背景以及设计要求，继而从电路总体结构、模块划分入手阐述了电路的工作原理。之后着重介绍了各模块电路的设计思想，依次论述了它们的具体实现。其中包括开关控制模块、带隙参考电压源电路、工作点电压模块、锯齿波发生器模块、脉宽调制模块、软开关选择模块、开灯保护及低压监控模块、标准信号监控模块和输出模块。在电路的设计和仿真章节中，介绍了最底层基本单元电路的实现，并给出了仿真验证的结果。经过反复的模拟和调试，本芯片的各项指标都能够达到要求。论文的最后为芯片的版图设计部分，从基本的器件版图设计到整体的布局布线都作了详尽的阐述，并介绍了版图完成之后的验证步骤。该芯片的版图已经通过了各项检查。
A CCFL backlight control chip was designed and implemented in this paper. It is based on the method of pulse width modulation to output the signal in order to control the source outside the chip, and accordingly the lamp.
After our design, this chip can provide 2 fully functioned PWM control circuit. The open lamp condition can be detected after lamp period, which ensure the circuit working safely. The lamp dimming can be done through this feedback loop or, by setting the reference DC level of the input of error amplifier. The reference DC level of dimming can be selected as higher level for more brightness or lower level for less brightness. Customer can define the period of soft start signal, and can also decide whether to use the soft start signal. The frequency of PWM wave can also adjusted by engineers through choosing the capacitance.
According to the Top-Down IC design method, this paper describes the application background and the design requirements of the chip firstly. Then the structure and the modules of the design, the working mechanism was presented. The main part of this paper provides the design thoughts of every module, including the ON/OFF module, bandgap reference circuit, saw tooth wave generator, bias circuit, PWM module, and protection circuits thoroughly. The detailed circuits and their simulation were also discussed. At the end of this paper, were the layout design and its verification. Now the chip has passed the verification of the simulation and design check.
引文
[1] 华南联合科技股份有限公司， 产品介绍-产品原理， http://www.sh-hwanan.com/chanping4.htm，2002。
[2] 华东计算技术研究所电源研究室，晶体管开关稳压电源，北京：人民邮电出版社，1985。
[3] 户川治朗[日] 何伟仁（译），实用电源电路设计手册，北京：中国计量出版社，1990。
[4] 叶治政 叶靖国，开关稳压电源，北京：高等教育出版社，1989。
[5] 李锡雄 陈婉儿，脉宽调制技术，武昌：华中理工大学出版社，1996。
[6] 王毓银，数字电路逻辑设计，北京：高等教育出版社，1999。
[7] 毕查德·拉扎维 著，陈贵灿 等译，模拟CMOS集成电路设计，西安交通大学出版社，2003。
[8] P. E. 艾伦，D. R. 霍尔伯格著，CMOS模拟电路设计，科学出版社，北京，1995
[9] 刘明亮，振荡器原理和应用，北京：高等教育出版社，1984：143~148。
[10] 李联，MOS运算放大器—原理、设计与应用，上海：复旦大学出版社，1988：61。
[11] Trond Ytterdal, Analog CMOS1, Norway: Department of Physical Electronics, NTNU, http://www.fysel.ntnu.no/Courses/SIE4085/, 2001。
[12] 谢家奎，金宝琴，谢洪曛，电子线路，北京：高等教育出版社，1988。
[13] Warren. R Anderson, Circuit and Process Design Considerations For ESD Protection in Advanced CMOS Processes, Microelectronics Reliability, 1997,1087-1103。
[14] D. L. Lin, Effect of VLSI technology scaling on ESD current-carrying capability, Journal of ELECTROSTATICS, 1997, 175-188。
[15] Cadence, Analog Artist Simulation Help, 1997。
[16] 李瑞平，CMOS Amplifiers Design 研究报告，http://www.51ic.net，2000。
[17] 夏武影，半导体器件模型和工艺模型，北京：科学出版社，1986。
[18] 李瑞平，CMOS Comparators Design 研究报告，http://www.51ic.net，2000。
[19] Anthony FALLU, Design of an integrated full dofferential operational amplifier in a 0.35um CMOS-AMS technology, 2000。
[20] C. Schwoerer, E, Andre, D. Morche, Report on A/D Converter and Filter, France Telrcom, 1999。
[21] Cadence, Dracula Reference, 1997。
[2] 华东计算技术研究所电源研究室，晶体管开关稳压电源，北京：人民邮电出版社，1985。
[3] 户川治朗[日] 何伟仁（译），实用电源电路设计手册，北京：中国计量出版社，1990。
[4] 叶治政 叶靖国，开关稳压电源，北京：高等教育出版社，1989。
[5] 李锡雄 陈婉儿，脉宽调制技术，武昌：华中理工大学出版社，1996。
[6] 王毓银，数字电路逻辑设计，北京：高等教育出版社，1999。
[7] 毕查德·拉扎维 著，陈贵灿 等译，模拟CMOS集成电路设计，西安交通大学出版社，2003。
[8] P. E. 艾伦，D. R. 霍尔伯格著，CMOS模拟电路设计，科学出版社，北京，1995
[9] 刘明亮，振荡器原理和应用，北京：高等教育出版社，1984：143~148。
[10] 李联，MOS运算放大器—原理、设计与应用，上海：复旦大学出版社，1988：61。
[11] Trond Ytterdal, Analog CMOS1, Norway: Department of Physical Electronics, NTNU, http://www.fysel.ntnu.no/Courses/SIE4085/, 2001。
[12] 谢家奎，金宝琴，谢洪曛，电子线路，北京：高等教育出版社，1988。
[13] Warren. R Anderson, Circuit and Process Design Considerations For ESD Protection in Advanced CMOS Processes, Microelectronics Reliability, 1997,1087-1103。
[14] D. L. Lin, Effect of VLSI technology scaling on ESD current-carrying capability, Journal of ELECTROSTATICS, 1997, 175-188。
[15] Cadence, Analog Artist Simulation Help, 1997。
[16] 李瑞平，CMOS Amplifiers Design 研究报告，http://www.51ic.net，2000。
[17] 夏武影，半导体器件模型和工艺模型，北京：科学出版社，1986。
[18] 李瑞平，CMOS Comparators Design 研究报告，http://www.51ic.net，2000。
[19] Anthony FALLU, Design of an integrated full dofferential operational amplifier in a 0.35um CMOS-AMS technology, 2000。
[20] C. Schwoerer, E, Andre, D. Morche, Report on A/D Converter and Filter, France Telrcom, 1999。
[21] Cadence, Dracula Reference, 1997。