分组密码芯片功耗攻击与防御问题研究
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摘要
随着密码算法设计的进步,传统意义的暴力破解方法已经很难获得密钥,日常使用的密码芯片系统(如加密智能卡),其密码安全性不仅与算法本身有关,同时也与密码算法的硬件实现相关。随着旁路攻击这一新的密钥攻击方式出现,学者们重新开始研究密码算法的实现安全。旁路攻击利用密码芯片运算过程中泄漏的各种物理信息(如功耗、电磁等)破解密码系统,相对于暴力破解方法,旁路攻击技术具有密钥搜索空间较小,同时攻击效率相对较高；其中,功耗攻击是旁路攻击中最有效和目前研究最多的一种旁路攻击方法,也是最具威胁的一种旁路攻击方法；对功耗攻击技术进行深入研究,并以此为基础提出抗功耗攻击的安全密码算法是非常必要的。
本文研究分组加密算法功耗攻击与防护理论与方法,建立高效功耗攻击模型；引入新的理论和技术,对分组加密算法进行抗功耗攻击设计,并对其改进使之适应于低功耗小面积智能卡,同时进行相应实验分析对比；开发设计有自主知识产权的功耗攻击仿真验证平台。研究内容涉及四个方面：高效功耗攻击模型与实验方法、密码芯片抗功耗攻击能力量化评估方法、功耗攻击与防御方法、抗功耗攻击的SMS4密码算法原型实现。论文主要工作如下：
高效功耗攻击模型与实验方法：提出了一种高效的功耗攻击模型,并以此模型为基础,设计开发了相应的功耗攻击软件仿真实验系统；在此基础上,设计并实现了基于FPGA的加密芯片物理原型功耗攻击实验平台；同时也设计并实现了基于AT89C51单片机的物理加密芯片功耗攻击验证系统。
密码芯片抗功耗攻击能力量化评估技术：形式化分析各加密算法的抗功耗攻击能力,依据加密芯片运算时的信噪比,以及成功实施功耗攻击所需的样本数来确定密码算法抗攻击性能,建立了功耗攻击信噪比的理论分析模型,以及根据信噪比获得功耗攻击样本数的计算方法。定量分析结果也相当于给出了密码算法对于功耗攻击的防护能力,并且对密码算法采取何种防护技术以及必须达到何种强度以改善安全性提供了指导信息。
攻击方法：提出了一种SMS4密码算法的差分功耗攻击方法；研究了SMS4密码算法的最佳攻击点,以及针对SMS4加密系统进行差分功耗攻击的设计与具体实现,实验表明未加防护的SMS4加密算法不能抵抗功耗攻击。然后从系统层面对功耗攻击进行研究,以加密芯片为整体对象提出了五级功耗信息泄漏攻击模型,在此基础上,以密码芯片进行密钥运算时产生的中间变量与密钥有关,提出了基于中间变量的攻击树模型,并对攻击过程进行了算法实现与最小攻击代价分析。
防御方法：深入研究了适合资源受限的简单固定值掩码技术,针对简单固定值掩码方法的不足,提出了改进的固定值掩码算法,以AES算法为例,实验证明改进的固定值掩码算法可以抗二阶差分功耗攻击。提出了一种伪随机固定值掩码算法(PFM),并以SMS4算法为例进行了理论和实验验证算法的有效性,同时,该方法也适应于小面积低功耗的智能卡加密应用。
原型系统：智能卡芯片类设备均要求进行硬件实现,因为硬件实现速度快,占用资源较少,能够满足资源受限的嵌入式设备运算速度和吞吐量的要求,硬件实现可以节省CPU和存储器的开销,同时加解密速度也相对比用软件实现快。对加入固定值掩码的SMS4算法进行了IP核设计,并在FPGA上进行了原型系统实现。
With the advancement of cipher algorithms, it is almost impossible to obtain the encryption and decryption keys by brute force attacks. However, for a real cryptosystem (such as smartcard cryptosystem), its security depends not only on the cipher algorithms, but also the hardware implementation. With the emergence of Side Channel Attacks (SCA), the safety of cipher algorithm implementation has to reinvestigated. SCA is a new way of cryptanalysis. It breaks the cryptosystem using physical information (power consumption, electromagnetic radiation, etc.) leaked from cryptographic chips during the execution of cipher algorithms. Compared with traditional brute force attacks, SCA has smaller key search space and thus better analytical performance. Power analysis attacks, one of the most efficient and menacing SCA, has been used extensively. Therefore it is necessary to investigate power analysis attack techniques in depth and propose new cipher algorithms together with its hardware implementation to defend against power analysis attacks.
In this dissertation, we study the theory, methodology, and defenses of power analysis attacks for block cipher algorithms. Our research mainly focuses on four parts: efficient power analysis attack models and experiment methodologies; quantitative evaluation of the resilience of cipher chip to power analysis attacks; power analysis attacks and defenses; and the hardware implementation of SMS4with power analysis attack resistance. The major contributions of this dissertation are:
Efficient power analysis attacks model and its experiments:First, an efficient power analysis attacks model was proposed. Based on the model, we developed a simulator for power analysis attacks. Furthermore, we designed and implemented an FPGA based prototype of a power analysis attack experimental platform for encryption chips and a power analysis attacks verification system based on the microcontroller AT89C51.
Quantitative evaluation of the resilience of cipher chip to power analysis attack: The cipher algorithm's ability to resist power analysis attacks is quantitative analyzed. The signal to noise ratio of the cipher chip and the number of power samples required to perform power analysis attacks successfully are used to characterize the resilience of cipher chips to power analysis attack. With these two parameters, we established a theoretical analysis model for power analysis attacks. The quantitative evaluation results can provide guidelines for designing high-resilient cipher algorithms.
Attack method:In this part, we first proposed a differential power analysis attack on the SMS4cipher algorithm and studied the optimal attack point of SMS4. We also designed and implemented a differential power analysis attack system targeting the SMS4cipher algorithm. Experimental results show that the unprotected SMS4cipher algorithm is vulnerable to differential power analysis attacks. The power analysis attacks are studied systematically and a five-level leakage power analysis attack model is proposed.
Defense methods:Two methods are proposed to defend against differential analysis attacks. The first one is a modified fixed-value masking method (MFVM). The fixed-value masking method is first studied for resource-constrained cryptographic chips. To overcome the disadvantages of fixed-value masking method, MFVM was proposed. We conducted experiments of modified fixed-value masking method on AES. Experimental results showed that the MFVM algorithm can be used to resist second-order differential power analysis attacks. The second method, pseudo-random fixed-value masking algorithm (PFM), was proposed in order to defend against power analysis attacks. We conducted experiments of PFM on SMS4. The experimental results show that the SMS4algorithm with PFM has the ability to effectively resist second high-order differential power analysis attacks without increasing much power and hardware resources.
Prototype system:Cipher algorithms are typically implemented in hardware. There are several reasons for this:hardware implementation is faster, consumes less computing resources, and reduces CPU and memory overhead. Thus, in this dissertation, an IP core of SMS4with fixed-value masking is designed and its prototype system is implemented in FPGA.
本文研究分组加密算法功耗攻击与防护理论与方法,建立高效功耗攻击模型；引入新的理论和技术,对分组加密算法进行抗功耗攻击设计,并对其改进使之适应于低功耗小面积智能卡,同时进行相应实验分析对比；开发设计有自主知识产权的功耗攻击仿真验证平台。研究内容涉及四个方面：高效功耗攻击模型与实验方法、密码芯片抗功耗攻击能力量化评估方法、功耗攻击与防御方法、抗功耗攻击的SMS4密码算法原型实现。论文主要工作如下：
高效功耗攻击模型与实验方法：提出了一种高效的功耗攻击模型,并以此模型为基础,设计开发了相应的功耗攻击软件仿真实验系统；在此基础上,设计并实现了基于FPGA的加密芯片物理原型功耗攻击实验平台；同时也设计并实现了基于AT89C51单片机的物理加密芯片功耗攻击验证系统。
密码芯片抗功耗攻击能力量化评估技术：形式化分析各加密算法的抗功耗攻击能力,依据加密芯片运算时的信噪比,以及成功实施功耗攻击所需的样本数来确定密码算法抗攻击性能,建立了功耗攻击信噪比的理论分析模型,以及根据信噪比获得功耗攻击样本数的计算方法。定量分析结果也相当于给出了密码算法对于功耗攻击的防护能力,并且对密码算法采取何种防护技术以及必须达到何种强度以改善安全性提供了指导信息。
攻击方法：提出了一种SMS4密码算法的差分功耗攻击方法；研究了SMS4密码算法的最佳攻击点,以及针对SMS4加密系统进行差分功耗攻击的设计与具体实现,实验表明未加防护的SMS4加密算法不能抵抗功耗攻击。然后从系统层面对功耗攻击进行研究,以加密芯片为整体对象提出了五级功耗信息泄漏攻击模型,在此基础上,以密码芯片进行密钥运算时产生的中间变量与密钥有关,提出了基于中间变量的攻击树模型,并对攻击过程进行了算法实现与最小攻击代价分析。
防御方法：深入研究了适合资源受限的简单固定值掩码技术,针对简单固定值掩码方法的不足,提出了改进的固定值掩码算法,以AES算法为例,实验证明改进的固定值掩码算法可以抗二阶差分功耗攻击。提出了一种伪随机固定值掩码算法(PFM),并以SMS4算法为例进行了理论和实验验证算法的有效性,同时,该方法也适应于小面积低功耗的智能卡加密应用。
原型系统：智能卡芯片类设备均要求进行硬件实现,因为硬件实现速度快,占用资源较少,能够满足资源受限的嵌入式设备运算速度和吞吐量的要求,硬件实现可以节省CPU和存储器的开销,同时加解密速度也相对比用软件实现快。对加入固定值掩码的SMS4算法进行了IP核设计,并在FPGA上进行了原型系统实现。
With the advancement of cipher algorithms, it is almost impossible to obtain the encryption and decryption keys by brute force attacks. However, for a real cryptosystem (such as smartcard cryptosystem), its security depends not only on the cipher algorithms, but also the hardware implementation. With the emergence of Side Channel Attacks (SCA), the safety of cipher algorithm implementation has to reinvestigated. SCA is a new way of cryptanalysis. It breaks the cryptosystem using physical information (power consumption, electromagnetic radiation, etc.) leaked from cryptographic chips during the execution of cipher algorithms. Compared with traditional brute force attacks, SCA has smaller key search space and thus better analytical performance. Power analysis attacks, one of the most efficient and menacing SCA, has been used extensively. Therefore it is necessary to investigate power analysis attack techniques in depth and propose new cipher algorithms together with its hardware implementation to defend against power analysis attacks.
In this dissertation, we study the theory, methodology, and defenses of power analysis attacks for block cipher algorithms. Our research mainly focuses on four parts: efficient power analysis attack models and experiment methodologies; quantitative evaluation of the resilience of cipher chip to power analysis attacks; power analysis attacks and defenses; and the hardware implementation of SMS4with power analysis attack resistance. The major contributions of this dissertation are:
Efficient power analysis attacks model and its experiments:First, an efficient power analysis attacks model was proposed. Based on the model, we developed a simulator for power analysis attacks. Furthermore, we designed and implemented an FPGA based prototype of a power analysis attack experimental platform for encryption chips and a power analysis attacks verification system based on the microcontroller AT89C51.
Quantitative evaluation of the resilience of cipher chip to power analysis attack: The cipher algorithm's ability to resist power analysis attacks is quantitative analyzed. The signal to noise ratio of the cipher chip and the number of power samples required to perform power analysis attacks successfully are used to characterize the resilience of cipher chips to power analysis attack. With these two parameters, we established a theoretical analysis model for power analysis attacks. The quantitative evaluation results can provide guidelines for designing high-resilient cipher algorithms.
Attack method:In this part, we first proposed a differential power analysis attack on the SMS4cipher algorithm and studied the optimal attack point of SMS4. We also designed and implemented a differential power analysis attack system targeting the SMS4cipher algorithm. Experimental results show that the unprotected SMS4cipher algorithm is vulnerable to differential power analysis attacks. The power analysis attacks are studied systematically and a five-level leakage power analysis attack model is proposed.
Defense methods:Two methods are proposed to defend against differential analysis attacks. The first one is a modified fixed-value masking method (MFVM). The fixed-value masking method is first studied for resource-constrained cryptographic chips. To overcome the disadvantages of fixed-value masking method, MFVM was proposed. We conducted experiments of modified fixed-value masking method on AES. Experimental results showed that the MFVM algorithm can be used to resist second-order differential power analysis attacks. The second method, pseudo-random fixed-value masking algorithm (PFM), was proposed in order to defend against power analysis attacks. We conducted experiments of PFM on SMS4. The experimental results show that the SMS4algorithm with PFM has the ability to effectively resist second high-order differential power analysis attacks without increasing much power and hardware resources.
Prototype system:Cipher algorithms are typically implemented in hardware. There are several reasons for this:hardware implementation is faster, consumes less computing resources, and reduces CPU and memory overhead. Thus, in this dissertation, an IP core of SMS4with fixed-value masking is designed and its prototype system is implemented in FPGA.
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