半导体晶圆制造系统（SWFS）炉管区组批派工策略研究
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摘要
作为当今世界上最复杂的制造系统之一,半导体晶圆制造系统(Semiconductor Wafer Fabrication System, SWFS)存在着生产周期长,生产工艺复杂,多重入性设备,生产环境高度不稳定以及多产品同时在线生产等特点,其调度问题的求解非常困难。
晶圆制造系统炉管区批处理机调度问题(scheduling of batch processor,SBP)是半导体晶圆制造系统调动与控制的一个代表性问题。批处理机的加工时间一般都大于非批处理机的加工时间且批处理机价格昂贵,半导体生产系统的瓶颈机一般为批处理机,它制约着半导体制造系统的绩效。因此,批处理加工的合理调度对改善半导体生产线的性能具有重要意义,针对炉管区批处理机问题本文所做的工作主要为:
1.通过对工厂的调研,找出晶圆生产加工过程的实际生产瓶颈,并针对瓶颈问题进行了工艺分析、设备分析和流程分析,找到炉管区批处理机调度过程中的几个主要矛盾,明确了整个研究思路。
2.对所研究的调度问题进行数学抽象和定义,使问题更具一般性和普遍性,通过对问题的分析过程,将复杂调度问题分解成为若干子问题进行求解,并确立了调度目标。针对半导体炉管区瓶颈设备的批处理调度问题,提出满足工艺约束和设备限制的组批调度算法。在考虑产品动态到达的基础上,根据半导体制造系统大规模、多重入、混合型生产等特征,针对Lot平均等待时间进行优化,实现多产品、多机台的实时组合派工。
3.根据工厂实际设计了虚拟的晶圆制造系统(SWFS)和产品组合,并对ReS2动态调度仿真平台进行了调整和修改,使其更加符合生产实际。通过与生产过程中常用的组批方法(MaxMin)进行实验比较,验证了本文所提算法的正确性和有效性。
As one of the most complex manufacturing system today, a semiconductor wafer manufacturing system (SWFS) is characterized by re-entrant process flows, complex production processes and unpredictable equipment downtime, which make the schedule of a SWFS very difficult.
The scheduling of batch processor (SBP) in the furnace area has the common features of SWFS. Batch processing facilities are generally bottlenecks in manufacturing systems for a variety of reasons: They are often expensive to purchase so that the utilization of such equipment is usually very high. Furthermore, parts (jobs) usually require long and non-preemptive processing times, so that the facility is unavailable for other parts (jobs) for relatively long period. Thus, rendering an effective scheduling approach of batch processors of SWFS is an important management concern. The major contributions to SBP of this paper are as follows:
1) The bottleneck of the SWFS is found in the process of observation on the real semiconductor plant, and through the analysis on process and equipment of the bottleneck, the main scheduling conflicts are found which suggests the idea and direction of the entire research.
2) A mathematical model is built for this problem, and through the analysis of the scheduling problem, the complex problem can be broken down to several sub-problem, and the goals of scheduling is established. To solve the scheduling problem of batch processing machine in the furnace district of SWFS, this paper proposes a scheduling algorithm which satisfies the process constraint and equipment limitations. Considering the dynamic arrival of lots and the SWFS’s features of large scale and multiple re-entrant processes, the algorism may realize the real-time combinatory dispatching of multi-product and multi-machine by optimizing average waiting time of lots.
3) The simulation based experiments are made on a virtual SWFS fab simulation platform (ReS2), which has been modified to match the real production process, and the result shows that the algorithm can significantly improve the fill rate and the utilization of the bottleneck machine and thus shorten the cycle time in real-time dispatching.
晶圆制造系统炉管区批处理机调度问题(scheduling of batch processor,SBP)是半导体晶圆制造系统调动与控制的一个代表性问题。批处理机的加工时间一般都大于非批处理机的加工时间且批处理机价格昂贵,半导体生产系统的瓶颈机一般为批处理机,它制约着半导体制造系统的绩效。因此,批处理加工的合理调度对改善半导体生产线的性能具有重要意义,针对炉管区批处理机问题本文所做的工作主要为:
1.通过对工厂的调研,找出晶圆生产加工过程的实际生产瓶颈,并针对瓶颈问题进行了工艺分析、设备分析和流程分析,找到炉管区批处理机调度过程中的几个主要矛盾,明确了整个研究思路。
2.对所研究的调度问题进行数学抽象和定义,使问题更具一般性和普遍性,通过对问题的分析过程,将复杂调度问题分解成为若干子问题进行求解,并确立了调度目标。针对半导体炉管区瓶颈设备的批处理调度问题,提出满足工艺约束和设备限制的组批调度算法。在考虑产品动态到达的基础上,根据半导体制造系统大规模、多重入、混合型生产等特征,针对Lot平均等待时间进行优化,实现多产品、多机台的实时组合派工。
3.根据工厂实际设计了虚拟的晶圆制造系统(SWFS)和产品组合,并对ReS2动态调度仿真平台进行了调整和修改,使其更加符合生产实际。通过与生产过程中常用的组批方法(MaxMin)进行实验比较,验证了本文所提算法的正确性和有效性。
As one of the most complex manufacturing system today, a semiconductor wafer manufacturing system (SWFS) is characterized by re-entrant process flows, complex production processes and unpredictable equipment downtime, which make the schedule of a SWFS very difficult.
The scheduling of batch processor (SBP) in the furnace area has the common features of SWFS. Batch processing facilities are generally bottlenecks in manufacturing systems for a variety of reasons: They are often expensive to purchase so that the utilization of such equipment is usually very high. Furthermore, parts (jobs) usually require long and non-preemptive processing times, so that the facility is unavailable for other parts (jobs) for relatively long period. Thus, rendering an effective scheduling approach of batch processors of SWFS is an important management concern. The major contributions to SBP of this paper are as follows:
1) The bottleneck of the SWFS is found in the process of observation on the real semiconductor plant, and through the analysis on process and equipment of the bottleneck, the main scheduling conflicts are found which suggests the idea and direction of the entire research.
2) A mathematical model is built for this problem, and through the analysis of the scheduling problem, the complex problem can be broken down to several sub-problem, and the goals of scheduling is established. To solve the scheduling problem of batch processing machine in the furnace district of SWFS, this paper proposes a scheduling algorithm which satisfies the process constraint and equipment limitations. Considering the dynamic arrival of lots and the SWFS’s features of large scale and multiple re-entrant processes, the algorism may realize the real-time combinatory dispatching of multi-product and multi-machine by optimizing average waiting time of lots.
3) The simulation based experiments are made on a virtual SWFS fab simulation platform (ReS2), which has been modified to match the real production process, and the result shows that the algorithm can significantly improve the fill rate and the utilization of the bottleneck machine and thus shorten the cycle time in real-time dispatching.
引文
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[2]Michael Quirk编著,韩郑生译,“半导体制造技术”,电子工业出版社,2004.1
[3]Narahari,Y., and Khan,L.M.,“Performance analysis of scheduling polices in re-entrant manufacturing system”, Computer Operations Research, 23(1),1996, p:37-51
[4]李衍飞,“半导体生产管理介绍”,Technical Report of Dept.of IE&M, SJTU, 2003
[5]Fowler,J. Issues in Semiconductor MFG scheduling, present at Workshop on Hierarchical Control for Real-Time Scheduling and Manufacturing System. Lincoln, NH, October, 1992
[6]张亚非等编着,“半导体集成电路制造技术”,高等教育出版社,2006.6
[7]严德隆,“ISO 14644-1洁净室空气洁净度等级标准的特点”,洁净与空调技术,Vol. 2,2003,pp: 8-11
[8]李衍飞,“半导体生产管理介绍”.Technical Report of Dept. of IE&M, SJTU, 2003
[9]张劲燕,“半导体制造设备”,台湾,五南图书出版公司
[10]江志斌,“Petri网及其在制造系统建模与控制中的应用”,机械工业出版社, 2004, 5
[11]Liu,H.R., Fung,R.Y.K., and Jiang,Z.B.,“Modeling of Semiconductor Wafer Fabrication Systems By Extended Object-oriented Petri Nets”, International Journal of Production Research, Vol.43, No.3, 2005, pp: 471-495
[12]周煜智,晶圆制造目标导向型生产活动控制系统之设计,台湾交通大学工业工程与管理系,硕士论文. 1998
[13]Potts CN, Van Wassenhove (1992) Integrating scheduling with batching and lot-sizing: A review of algorithms and complexity. J Oper Res Soc 43(5):395–406
[14]Albers S, Brucker P (1993) The complexity of one-machine batching problem. Discret Appl Math 47:87–107
[15]Webster S, Baker KR (1995) Scheduling groups of jobs on a single machine. Oper Res 43(4):692–703
[16]Brucker P, Gladky A, Hoogeveen H, Kovalyov MV, Potts CN, TautenhahnT, Van De Velde SL (1998) Scheduling a batching machine. J Schedul 1:31–54
[17]Potts CN, Kovalyov MY (2000) Scheduling with batching: A review.Eur J Oper Res 120:228–249
[18]Baptiste P (2000) Batching identical jobs. Math Methods Oper Res52:355–367
[19]Balasubramanian H, Monch L, Fowler J, Pfund M (2004) Genetic algorithm based scheduling of parallel batch machines with incompatible job families to minimize total weighted tardiness. Int J Prod Res 42(8):1621–1638
[20]Bar-Noy A, Guha S, Katz Y, Naor J, Schieber B, Shachnai H (2002) Throughput maximization of real-time scheduling with batching.Proc 13th Annual ACM-SIAM Symposium on Discrete Algorithms,pp742–751
[21]Devpura A, Fowler JW, Carlyle MW, Perez I (2000) Minimizing total weighted tardiness on a single batch process machine with incompatible job families. Proc symposium on Operations Research, Dresden,Germany, pp 366–371
[22]Dobson G, Nambimadom RS (2001) The batch loading and scheduling problem. Oper Res 49 (1):52–65
[23]Huang S-C, Lin JT (1998) An interactive scheduler for a wafer probe centre in semiconductor manufacturing. Int J Prod Res 36(7): 1883–1900
[24]Hung Y-F (1998) Scheduling of mask shop E-beam writers. IEEE Trans Semicond Manuf 11(1):165–172.
[25]Jolai GF (2005) Minimizing number of tardy jobs on a batch processing machine with incompatible job families. Eur J Oper Res 162(1):184–190
[26]Kim H-U, Kim Y-D, Kim J-G (2000) Batching and scheduling at a batch processing workstation in a semiconductor fabrication facility producing multiple product types with distinct due dates. Proc International Conference on Modeling and Analysis of Semiconductor Manuf, pp 151–156
[27]Mehta SV, Uzsoy R (1998) Minimizing total tardiness on a batch processing machine with incompatible job families. IIE Trans 30:165–178
[28]Morad N, Zalzala AMS (1996) A gentic-based approach to the formation of manaufacturing cells and batch scheduling. Proc IEEE International Conference on Evolutionary Computation, pp485–490, Nagoya, Japan
[29]Perez IC, Fowler JW, Carlyle WM (2005) Minimizing total weighted tardiness on a single batch process machine with incompatible job families. Comput Oper Res 32(2):327–341
[30]Qi X, Tu F (1999) Earliness and tardiness scheduling problems on a batch processor. Discret Appl Math pp 131–145
[31]Skinner G, Mason SJ (2002) A genetic algorithm for scheduling parallel batch processing machines. Proc International Conference on Modeling and Analysis of Semiconductor Manuf, pp 270–275
[32]Akcali E, Uzsoy R, Hiscock DG, Moser AL, Teyner T (2000) Alternative loading and dispatching policies for furnace operations in semiconductor manufacturing: Acomparison by simulation. Proc 2000 Winter Simulation Conference
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