新型ROADM电压智能控制模块研究
摘要
具有动态配置能力的可重构光分插复用器(ROADM)是实现全光智能网络的重要器件,如何提高其调谐速度以适应高速的光网络数据传输是当前研究的热点和难点。基于电光调谐的ROADM是一种新型的设计方案,它通过改变加在其电光光栅上的电压偏置而实现指定波长的偏振转换,进而实现载波信号的快速上载和下载,其调谐速度可高达纳秒量级。
本论文专为电光调谐型ROADM的偏振转换部分设计了一个电压智能控制模块。它采用FPGA作为模块控制单元,通过控制25路双通道超高速数模转换器(DAC),可同时实现50路变化幅度为±5V、变化精度为0.1V的稳定电压输出。待转换数据预先初始化到25个FPGA内部定制的RAM中,转换时通过多路并行方式读取到DAC中,进而实现50路电压的并行输出,并将整个模块的响应时间严格控制在纳秒量级。上位机的控制信息可通过RS-232接口传到FPGA中,以根据实际上载/下载波长需求动态配置模块输出电压值。
本论文将智能控制模块设计细分为控制电路、数模转换(DAC)电路、接口电路和电源模块四部分进行详细的介绍。论文中相继完成了智能控制模块的方案设计及论证、元器件选型、原理图设计、PCB设计、系统信号完整性分析等工作。最后,还设计制作了测试文件对模块实际性能进行测试,验证了ROADM智能控制模块设计的正确性和可行性。
The Reconfigurable Optical Add/Drop Multiplexer (ROADM), which can be distributed channels dynamically, is indispensable for All Optical Intelligent Networks. Researchers are trying their best to improve the tuning speed in order to adapt the fast optical data transmission. The electro-optical tunable ROADM is a novel design. It can convert the specified wave’s polarization by controlling the bias voltages on the electro-optical grating, making it upload and download carriers speedily, and the tuning time is limited to nanoseconds.
This thesis presents a voltage intelligent control module, which is design for the tunable polarization convert part of the electro-optical ROADM specially. It uses the FPGA as a control unit, after controlling the 25 dual-channel ultra-high-speed Digital-to-Analog Conversion by FPGA, the module can output 50 different voltages at the same time. These voltages can change between +5V and -5V in the accuracy of 0.1V. Data have been stored in 25 internal RAMs of FPGA before conversion, so voltages are output in multi-channel and the response time of the module can be strictly limited in nanosecond grade. Control commands from PC can be received through RS-232 interface, making the output voltages can be configured dynamically as needed.
In this thesis, the intelligent control module is divided into control circuit, Digital-to-Analog Conversion (DAC) circuit, interface circuit and power supply circuit for detailed introduction. And much work have been completed, such as the program design and verification of the module, component selection, schematic design, printed circuit board design, signal integrity analysis, etc. Finally, a testing program is produced to test the module’s actual performance.
本论文专为电光调谐型ROADM的偏振转换部分设计了一个电压智能控制模块。它采用FPGA作为模块控制单元,通过控制25路双通道超高速数模转换器(DAC),可同时实现50路变化幅度为±5V、变化精度为0.1V的稳定电压输出。待转换数据预先初始化到25个FPGA内部定制的RAM中,转换时通过多路并行方式读取到DAC中,进而实现50路电压的并行输出,并将整个模块的响应时间严格控制在纳秒量级。上位机的控制信息可通过RS-232接口传到FPGA中,以根据实际上载/下载波长需求动态配置模块输出电压值。
本论文将智能控制模块设计细分为控制电路、数模转换(DAC)电路、接口电路和电源模块四部分进行详细的介绍。论文中相继完成了智能控制模块的方案设计及论证、元器件选型、原理图设计、PCB设计、系统信号完整性分析等工作。最后,还设计制作了测试文件对模块实际性能进行测试,验证了ROADM智能控制模块设计的正确性和可行性。
The Reconfigurable Optical Add/Drop Multiplexer (ROADM), which can be distributed channels dynamically, is indispensable for All Optical Intelligent Networks. Researchers are trying their best to improve the tuning speed in order to adapt the fast optical data transmission. The electro-optical tunable ROADM is a novel design. It can convert the specified wave’s polarization by controlling the bias voltages on the electro-optical grating, making it upload and download carriers speedily, and the tuning time is limited to nanoseconds.
This thesis presents a voltage intelligent control module, which is design for the tunable polarization convert part of the electro-optical ROADM specially. It uses the FPGA as a control unit, after controlling the 25 dual-channel ultra-high-speed Digital-to-Analog Conversion by FPGA, the module can output 50 different voltages at the same time. These voltages can change between +5V and -5V in the accuracy of 0.1V. Data have been stored in 25 internal RAMs of FPGA before conversion, so voltages are output in multi-channel and the response time of the module can be strictly limited in nanosecond grade. Control commands from PC can be received through RS-232 interface, making the output voltages can be configured dynamically as needed.
In this thesis, the intelligent control module is divided into control circuit, Digital-to-Analog Conversion (DAC) circuit, interface circuit and power supply circuit for detailed introduction. And much work have been completed, such as the program design and verification of the module, component selection, schematic design, printed circuit board design, signal integrity analysis, etc. Finally, a testing program is produced to test the module’s actual performance.
引文
[1]李晓东,郝素君,智能全光网络中的分插复用器件-OADM,飞通光电子技术,2002,2(4):205-214
[2]张新全,杨铸,ROADM技术及其实现的研究,光通信技术,2007,31(1):32-34
[3]曹茂虹,刘礼,光纤通信技术的现状及发展趋势,电信交换,2007,(2):44~46
[4]刘文,毛谦,简化的ROADM模块及其在网络升级改造中的应用,光通信研究,2005,(2):1-4
[5]黄照祥,张阳安等,可重构光分插复用器(ROADM)的技术实现与性能评估,光通信技术,2004,28(12):4-9
[6]刘晓枫,ROADM技术简介及演进方向,邮电设计技术,2008,(2):40-43
[7] Li Kejia, Jin Jie, Zhang Ruifeng et al, Reconfigurable optical add/drop multiplexer based on electrooptic effect in two directions, SPIE, Bellingham WA, 2008:683810
[8]李可佳,基于铌酸锂波导的电光调谐ROADM设计:[硕士学位论文],天津;天津大学,2008
[9]张祯,新型OADM的电压智能控制模块研究:[硕士学位论文],天津;天津大学,2008
[10]刘炎,刘鑫,高精度多通道可程控电荷信源的设计,传感器与仪器仪表,2007,23(3):149-151
[11]王庆,刘涤尘,基于CPLD的高精度可程控多路信号源,仪表技术与传感器,2005,(3):36-38
[12]郝迎吉,王洪波,智能多路信号源的设计与实现,国外电子元器件,2007,(5):3-5
[13]Fujitsu Microelectronics Paul Madd,选择DAC需要关注频率和其它参数,电子产品世界,2005,(1):85-86
[14]黄雷,李云鹏,黄建国,基于双12位DAC的高精度直流电压/电流源设计,电子设计应用,2006,(12):107-109
[15]王超,高梅国等,基于FPGA和Flash任意波形发生器的设计和实现,仪器仪表学报,2006,27(6):2355-2357
[16]AD5428 Datasheet, Analog Devices, Inc. Rev A, 2005.7
[17]Cyclone II Device Handbook, Altera Corporation, 2007.2
[18]陈畅,游宇,基于FPGA的逻辑信号源的设计与实现,电子测量技术,2007,30(11):47-50
[19]李正生,马文彦,单极性DAC双极性输出的规范连接与调试,测控技术,2007,26(7):70-72
[20]马俊,雷航,基于SOPC的通用型JTAG调试器的设计,单片机与嵌入式系统应用,2008,(7):25-27
[21]张晔,泰开宇等,基于FPGA的UART设计,中国高新技术企业,2008,(19):135-136
[22]何慧珠,秦丽等,基于FPGA的UART IP核设计与实现,微计算机信息,2008,(2):223-224
[23]廖科,张松等,Protel DXP电路图及电路板设计实用教程,北京:清华大学出版社,2004.90-95
[24]李秀霞,郑春厚等,Protel DXP 2004电路设计与仿真教程,北京:北京航空航天大学出版社,2008.181-220
[25]彭燕虹,在Protel DXP中进行信号完整性问题分析,山西电子技术,2008,(3):13-14
[26]黄春行,超高速数据采集系统的时序设计与信号完整性分析:[硕士学位论文],南京;南京理工大学,2004
[27]刘坤,Protel电路分析习题精解,北京:国防工业出版社,2005.286-302
[28]StePhen. H, Garrett. W, James. A, High-speed Digital System Design.1nd ed. Newyork: John Wiley&Sons, 2000
[29]黄娟,朱红,高速电路的印制板(PCB)仿真,今日电子,2003,(9):49-52
[30]潘松,黄继业等,SOPC技术实用教程,北京:清华大学出版社,2005.11-48
[31]石玮,基于FPGA和双端口RAM的DDS任意波形发生器的实现,湖北师范学院学报(自然科学版),2008,28(1):41-45
[32]王小曼,王国华等,用双端口RAM实现任意信号发生器,测试技术学报,2002,(16):791-794
[33]张伟,包乌日吐等,FPGA内部块RAM的应用技巧,微处理机,2006,27(6):20-21
[2]张新全,杨铸,ROADM技术及其实现的研究,光通信技术,2007,31(1):32-34
[3]曹茂虹,刘礼,光纤通信技术的现状及发展趋势,电信交换,2007,(2):44~46
[4]刘文,毛谦,简化的ROADM模块及其在网络升级改造中的应用,光通信研究,2005,(2):1-4
[5]黄照祥,张阳安等,可重构光分插复用器(ROADM)的技术实现与性能评估,光通信技术,2004,28(12):4-9
[6]刘晓枫,ROADM技术简介及演进方向,邮电设计技术,2008,(2):40-43
[7] Li Kejia, Jin Jie, Zhang Ruifeng et al, Reconfigurable optical add/drop multiplexer based on electrooptic effect in two directions, SPIE, Bellingham WA, 2008:683810
[8]李可佳,基于铌酸锂波导的电光调谐ROADM设计:[硕士学位论文],天津;天津大学,2008
[9]张祯,新型OADM的电压智能控制模块研究:[硕士学位论文],天津;天津大学,2008
[10]刘炎,刘鑫,高精度多通道可程控电荷信源的设计,传感器与仪器仪表,2007,23(3):149-151
[11]王庆,刘涤尘,基于CPLD的高精度可程控多路信号源,仪表技术与传感器,2005,(3):36-38
[12]郝迎吉,王洪波,智能多路信号源的设计与实现,国外电子元器件,2007,(5):3-5
[13]Fujitsu Microelectronics Paul Madd,选择DAC需要关注频率和其它参数,电子产品世界,2005,(1):85-86
[14]黄雷,李云鹏,黄建国,基于双12位DAC的高精度直流电压/电流源设计,电子设计应用,2006,(12):107-109
[15]王超,高梅国等,基于FPGA和Flash任意波形发生器的设计和实现,仪器仪表学报,2006,27(6):2355-2357
[16]AD5428 Datasheet, Analog Devices, Inc. Rev A, 2005.7
[17]Cyclone II Device Handbook, Altera Corporation, 2007.2
[18]陈畅,游宇,基于FPGA的逻辑信号源的设计与实现,电子测量技术,2007,30(11):47-50
[19]李正生,马文彦,单极性DAC双极性输出的规范连接与调试,测控技术,2007,26(7):70-72
[20]马俊,雷航,基于SOPC的通用型JTAG调试器的设计,单片机与嵌入式系统应用,2008,(7):25-27
[21]张晔,泰开宇等,基于FPGA的UART设计,中国高新技术企业,2008,(19):135-136
[22]何慧珠,秦丽等,基于FPGA的UART IP核设计与实现,微计算机信息,2008,(2):223-224
[23]廖科,张松等,Protel DXP电路图及电路板设计实用教程,北京:清华大学出版社,2004.90-95
[24]李秀霞,郑春厚等,Protel DXP 2004电路设计与仿真教程,北京:北京航空航天大学出版社,2008.181-220
[25]彭燕虹,在Protel DXP中进行信号完整性问题分析,山西电子技术,2008,(3):13-14
[26]黄春行,超高速数据采集系统的时序设计与信号完整性分析:[硕士学位论文],南京;南京理工大学,2004
[27]刘坤,Protel电路分析习题精解,北京:国防工业出版社,2005.286-302
[28]StePhen. H, Garrett. W, James. A, High-speed Digital System Design.1nd ed. Newyork: John Wiley&Sons, 2000
[29]黄娟,朱红,高速电路的印制板(PCB)仿真,今日电子,2003,(9):49-52
[30]潘松,黄继业等,SOPC技术实用教程,北京:清华大学出版社,2005.11-48
[31]石玮,基于FPGA和双端口RAM的DDS任意波形发生器的实现,湖北师范学院学报(自然科学版),2008,28(1):41-45
[32]王小曼,王国华等,用双端口RAM实现任意信号发生器,测试技术学报,2002,(16):791-794
[33]张伟,包乌日吐等,FPGA内部块RAM的应用技巧,微处理机,2006,27(6):20-21