基于DSP平台的视频采集系统与MPEG-2视频压缩算法研究
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摘要
近年来,随着DSP技术的高速发展,使得视频处理技术取得了长足的进步,而以DSP为核心的视频处理系统也就得到了广泛的应用。本文在深入研究DSP的技术和理论后,设计了一种基于DSP的视频图像处理系统,该系统的研究主要基于DSP芯片体积小、处理速度快、实时性高、价格低廉等特点。
     目前的图像处理多借助于图像卡和微机系统的高处理速度和大存储容量来完成对图像的相关处理工作,但带来了体积大、成本高、工作稳定性差等缺点。本文在研究了DSP的特性后,选用TI公司高性能的C6000系列DSP,并确定了系统各组成部分的设计方案,对系统各组成模块的功能和特点作了详细的介绍。
     整个系统设计包括硬件设计和软件设计两大部分,在系统硬件设计中给出了视频采集子卡的硬件接口方案;在软件设计部分设计了对应于硬件接口的底层软件并对MPEG-2算法进行了深入研究。TMS320C6711是TI公司推出的一款高性能浮点数字信号处理器,它强大的硬件结构和软件系统,以及高达200MHz的运算速度,使其在本系统中得以采用,它主要完成对图像的处理。视频采集模块采用的是MICRON公司2004年生产的一款300万像素(2048×1536)CMOS彩色图像传感器,它采用Digital Clarity Image Sensor Technology技术,使得它有43dB的信噪比、可广泛应用于视频会议、数码相机、摄象机等众多领域。为了提高系统的集成度和可扩展性,从而达到小型化的目的,本系统采用CPLD器件来完成整个系统的逻辑控制功能。考虑系统所需CPLD器件控制的输入输出管脚数量和内部逻辑资源使用的情况,选用ALTERA公司的CPLD芯片EPM240作为系统的逻辑控制器件。
     本论文的软件部分简述了视频压缩标准的概况和MPEG-2标准的主要部分(系统部分,视频部分)。阐述了视频压缩原理与MPEG视频压缩算法:离散余弦变换(DCT )、量化编码与行程幅度编码。对视频流与系统流的语法构造以及视频的解码过程:可变长解码、反向扫描、反量化、反向离散余弦变换(IDCT)和运动补偿进行了较为详细的分析和阐述。
     本文通过实验研究,设计了一种应用于图像采集的子卡硬件方案,为基于数字信号处理器的MPEG-2视频编解码算法提供了实验依据,具有一定的实用价值。
In recent years, DSP technology with the rapid development, Makes video processing technology has made remarkable progress. DSP core video processing system will be widely used. Based on the in-depth study of DSP technologies and theories, this article designed a DSP-based video image processing system. The system is mainly based on small size, fast processing speed, real-time and low price of DSP’s characteristics .
     The current image processing usually depends on the high processing speed and large storage capacity of image card and PC to complete the image processing, but while brings a large volume, high cost and poor stability. This paper studied the characteristics of DSP, selected TI's high-performance C6000 DSP, and identified the various components of the system design. The components of the system module functions and features are described in detail.
     Design of the entire system, includes hardware and software design. In the hardware design the hardware interface program of Video Capture Daughter Card was made certain. In software design the software corresponding to the hardware interface was designed and the algorithm for MPEG-2 was as well as an in-depth study. TMS320C6711 is a high-performance floating-point digital signal processor produced by TI company. It has powerful hardware and software systems, and the high computational speed of 200MHz , so this chip is used in this article. It mainly completes image processing. Video Capture Module used one of the three million pixels (2048×1536) CMOS color image sensor produced by MICRON company in the year of 2004. It uses Digital Clarity Image Sensor Technology, and makes the signal-to-noise ratio is 43dB. It can be widely used in video conferencing, digital camera, video camera and many other fields. In order to improve the integration and scalability, so as to achieve the objective of the small, the system uses CPLD to accomplish the whole system control logic functions. Consider CPLD system for the control of the number of input and output pins and internal logic of the use of resources, this paper chose Altera EPM240 CPLD logic as a system of control device.
     This paper described the software video compression standard and the main port of MPEG-2 standard (system, Video), and expounded the principle of video compression and MPEG video compression algorithm: Discrete Cosine Transform (DCT), quantify the rate coding. Video on stream flow and the syntax and structure of the video decoding processing is: Variable length decoder, reverse scanning, anti - quantization, inverse discrete cosine transform (IDCT) and Motion Compensation, for a more detailed analysis and exposition.
     By experimental study, a design is applied to the image-acquisition hardware card program. For digital signal processors based on the MPEG-2 video codec algorithm provides experimental evidence, this paper has some practical value.
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