GPS接收机混频器电路设计
摘要
近年来,无线通信迅速发展,作为其关键模块,射频集成电路成为当前的研究热点。随着CMOS工艺的发展,器件性能有很大提高,在射频集成电路中用CMOS工艺代替传统的GaAs、BiCMOS等工艺成为可能。但一些二级效应以及衬底串扰等也会变得更加显著,给电路的设计带来了许多困难,特别是电源电压的降低使得传统的电路拓扑结构不能满足设计的要求。
混频器是GPS接收机射频前端电路的核心模块,其性能直接影响整个系统的性能以及系统对其他功能模块的要求,本文采用三级下变频结构。
基于这种背景,本文提出了一种高性能(低压、低噪声、高变频增益)下变频混频器,但又对它进行了多方面的优化,包括采用交流藕合互补跨导级和以阈值电压为基准的自偏置电路,有效的提高了混频器的各项性能。本文对该混频器进行了详细的分析,并在此基础上,调整电路参数,设计三级下变频混频器,最后给出了需要进一步改进的地方。
设计采用中芯国际0.18μm CMOS RF工艺库,使用Spectre RF工具进行仿真、Virtuoso Layout Editor工具完成版图设计,并完成后仿真。仿真结果显示主要性能如下:第一级电压变频增益为13.3dB,噪声系数为8.9dB:第二级电压变频增益为30.7dB,噪声系数为10.3dB;第三级电压变频增益为58dB,噪声系数为4.3dB。电路都工作在电源电压1.8V下。同时也进行了后仿真。
With the rapid development of wireless communication in recent years, Radio Frequency Integrated Circuit (RFIC), which is a crucial block of it, has become a focus of present study. The development of CMOS technology greatly improves the performance of the devices and makes it possible to substitute CMOS technology for the traditional GaAs and BiCMOS technology in RFICs. However, some second-order effects and substrate crosstalk etc. will also become more obvious, which brings much difficulty to the circuit design, and the most severe consequence is a reduction of the voltage supply, which causes that not all circuit topologies can satisfy the required specifications.
The mixer is an important block in GPS receivers, and its performance has a direct influence upon that of the whole system and upon the demands of the system for other blocks. We use the three-order down-conversion mixers structure.
To solve these problems, this paper presents a high performance, namely low voltage, low noise figure and high conversion gain, CMOS down conversion mixer. Based on the traditional Gilbert mixer, the proposed mixer makes improvements upon it, including the uses of ac-coupled complementary transconductor and threshold reference self-biasing circuit. Consequently, all performances of the mixer are effectively enhanced. This paper gives a detailed analysis of the proposed mixer, and adjusts the circuit parameters upon it to design three mixers. At last, this paper gives some suggestions on how to improve the performance of the mixer.
This design is based on 0.18μm CMOS RF technology of SMIC, employing Spectre RF to accomplish the simulation and using Virtuoso Layout Editor to finish the layout design, and finally, last-simulation were accomplished. The main simulation results show that the first-order circuit's conversion gain of 13.3dB, noise figure of 8.9dB, the second-order circuit's conversion gain of 30.7dB, noise figure of 10.3dB, the third-order circuit's conversion gain of 58dB, noise figure of 4.3dB. All the circuits operate at the voltage supply of 1.8V. Meantime, the post-simulation had been completed.
混频器是GPS接收机射频前端电路的核心模块,其性能直接影响整个系统的性能以及系统对其他功能模块的要求,本文采用三级下变频结构。
基于这种背景,本文提出了一种高性能(低压、低噪声、高变频增益)下变频混频器,但又对它进行了多方面的优化,包括采用交流藕合互补跨导级和以阈值电压为基准的自偏置电路,有效的提高了混频器的各项性能。本文对该混频器进行了详细的分析,并在此基础上,调整电路参数,设计三级下变频混频器,最后给出了需要进一步改进的地方。
设计采用中芯国际0.18μm CMOS RF工艺库,使用Spectre RF工具进行仿真、Virtuoso Layout Editor工具完成版图设计,并完成后仿真。仿真结果显示主要性能如下:第一级电压变频增益为13.3dB,噪声系数为8.9dB:第二级电压变频增益为30.7dB,噪声系数为10.3dB;第三级电压变频增益为58dB,噪声系数为4.3dB。电路都工作在电源电压1.8V下。同时也进行了后仿真。
With the rapid development of wireless communication in recent years, Radio Frequency Integrated Circuit (RFIC), which is a crucial block of it, has become a focus of present study. The development of CMOS technology greatly improves the performance of the devices and makes it possible to substitute CMOS technology for the traditional GaAs and BiCMOS technology in RFICs. However, some second-order effects and substrate crosstalk etc. will also become more obvious, which brings much difficulty to the circuit design, and the most severe consequence is a reduction of the voltage supply, which causes that not all circuit topologies can satisfy the required specifications.
The mixer is an important block in GPS receivers, and its performance has a direct influence upon that of the whole system and upon the demands of the system for other blocks. We use the three-order down-conversion mixers structure.
To solve these problems, this paper presents a high performance, namely low voltage, low noise figure and high conversion gain, CMOS down conversion mixer. Based on the traditional Gilbert mixer, the proposed mixer makes improvements upon it, including the uses of ac-coupled complementary transconductor and threshold reference self-biasing circuit. Consequently, all performances of the mixer are effectively enhanced. This paper gives a detailed analysis of the proposed mixer, and adjusts the circuit parameters upon it to design three mixers. At last, this paper gives some suggestions on how to improve the performance of the mixer.
This design is based on 0.18μm CMOS RF technology of SMIC, employing Spectre RF to accomplish the simulation and using Virtuoso Layout Editor to finish the layout design, and finally, last-simulation were accomplished. The main simulation results show that the first-order circuit's conversion gain of 13.3dB, noise figure of 8.9dB, the second-order circuit's conversion gain of 30.7dB, noise figure of 10.3dB, the third-order circuit's conversion gain of 58dB, noise figure of 4.3dB. All the circuits operate at the voltage supply of 1.8V. Meantime, the post-simulation had been completed.
引文
[1]Bin Zhao,Herbert S.Bennett,Julio E.Cottrell,et al.Future perspective of RF and analog/mixed-signal integrated circuit technology for mobile communications.ICSICT.2006,1518-1521.
[2]Mau-Chung Frank Chang.Impact of CMOS scaling on RF/mixed signal circuit designs.ICSICT.2006,1514-1517.
[3]Q Huang,F Piazza,P Orsatti,et al.The impact of scaling down to deep submicron on CMOS RF circuits.IEEE Journal Solid-State Circuits.1998,33(7),1023-1036.
[4]Dawn Wang,Jack Ou,Xudong Wang.RF design challenges at 90nm RFCMOS technology under low voltage applications.ICSICT.2006,1522-1525.
[5]Herbert S.Bennett,Ralf Brederlow,Julio C.Costa,et al.Device and technology evolution for Si-based RF integrated circuits.IEEE TRANSACTION ON ELECTRON DEVICES.2005,52(7),1235-1257.
[6]张国艳,黄如,张兴等。CMOS射频集成电路的研究进展。微电子学。2004,34(4),377-383转389。
[7]唐守龙,吴建辉。CMOS混频器设计现状与进展。微电子学。2005,35(6),605-611。
[8]Lawrence E.Larson.Integrated circuit technology options of RFICs-present status and future directions.IEEE Journal Solid-State Circuits.1998,33(3),387-399.
[9]Asad A.Abidi.RF CMOS comes of age.IEEE Journal Solid-State Circuits.2004,39(4),549-561.
[10]Behzad Razavi.CMOS technology characterization for Analog and RF design.IEEE Journal Solid-State Circuits.1999,34(3),268-276.
[11]王广运,郭秉义,李洪涛。差分GPS定位技术与应用。第一版,北京,电子工业出版社,1996,103-104。
[12]邓中卫。世界GPS接收机手册。第一版,北京,航空工业出版社,1995,59-85。
[13]R.M.Warner and J.N.Fordemwalt,Eds..Integrated Circuits Design Principle and Fabrication.New York,McGraw-Hill,1965,267.
[14]N.M.Nguyen,R.G.Meyer.Si IC-compatible inductors and LC passive filters.IEEE Journal Solid-State Circuits.1990,25(4),1028-1031.
[15]Markus Grozing,Andreas Pascht,Manfred Berroth.A 2.5V CMOS Differential Active Inductor with Tunable L and Q for Frequencies up to 5GHz.2001 IEEE Radio Frequency Integrated Circuits Symposium,271-274.
[16]S.Ei Khoury.The Design of Active Floating Positive and Negative Inductors in MMIC Tehnology.IEEE Micromave And Guided Wave Letters.1995,5(10),321.
[17]R.Kaunisto,P.Alinikula,K.Stadius,and V Porra.A Low-Power HBT MMIC Filter Based on Tunable Active Inductors.IEEE Microwave And Guided Letters.1997,7(8),209.
[18]王志华,吴恩德。CMOS射频集成电路的现状与进展[J]。电子学报。2001,29(2),233-238。
[19]J.R.Long,M.A.Copeland.The Modeling Characterization and Design of Monolithic Inductors for Silicon RFIC's[J].IEEE Journal of Solid-State Circuits.1997,32(3),357-369.
[20]S.S.Mohan,M.Hershenson,S.Bayd et al.Simple Accurate Expressions for planar spiral Inductances[J].IEEE Journal of Solid-State Circuits.1999,34(10),1419-1424.
[21]C.P.Yue,S.S.Wong.On-Chip Spiral Inductors with patterned Ground shields for Si-Based RFIC's[J].IEEE Journal of Solid-State Circuits,1998,33(5),743-752.
[22]C.C.Enz,Y Cheng.MOS Transistor Modeling for RFIC Design[J].IEEE Journal of Solid-State Circuits.2000,35(2),186-201.
[23]S.F.Tin,A.A.Osman,K.Mayaram.A Simple Subcircuit Extension of the BSIM3v3 Model for CMOS RF Design[J].IEEE Journal of Solid-State Circuits;2000,35(4),612-623.
[24]T.Manku.Microwave CMOS-Device Physics and Design[J].IEEE Journal of Solid-State Circuits.1999,34(3),277-285.
[25]施超,庄奕琪。CMOS射频集成电路中器件模型的研究[J]。微电子学,2002,32(6),404-408。
[26]D.K.Shaeffer,T.H.Lee.A 1.5-V 1.5GHz CMOS Low Noise Amplifier[J].IEEE Journal of Solid-State Circuits.1997,32(5),745-759.
[27]B.Razavi,R-H.Yan,K.F.Lee.Impact of Distributed Gate Resistance on the Performance of MOS Devices[J].IEEE Transactions on Circuits and Systems-Ⅰ:Fundamental Theory and Applications.1994,41(11),750-754.
[28]Thomas H.Lee著,余志平,周润得等译。CMOS射频集成电路设计。第一版,北京,电子工业出版社,2004,26-28。
[29]Thomas H.Lee著,余志平,周润得等译。CMOS射频集成电路设计。第一版,北京,电子工业出版社,2004,223-224。
[30]Manolis T.Terrovitis,Robert G.Meyer.Noise in Currcnt-Commutating CMOS Mixers.IEEE Journal of Solid-State Circuit.1999,34(6),772-783.
[31]Liwei Sheng,Jonathan C.Jensen,Lawrence E.Larson.A Wide-Bandwidth Si/SiGc HBT Direct Conversion Sub-Harmonic Mixer/ Downconverter.IEEE Journal of Solid-State Circuit.2000,35(9),1329-1337.
[32]Vojkan Vidojkovic,Johan van der Tang,Arjan Leeuwenburgh et al.A low-voltage folded-switching mixer in 0.18μm CMOS.IEEE Journal of Solid-State Circuit.2005,40(6),1259-1264.
[33]R.Jacob Baker,Harry W.Li,David E.Boyce著,陈中建,吉利久译。CMOS电路设计·布局与仿真。第一版,北京,机械工业出版社,2006,358-359。
[2]Mau-Chung Frank Chang.Impact of CMOS scaling on RF/mixed signal circuit designs.ICSICT.2006,1514-1517.
[3]Q Huang,F Piazza,P Orsatti,et al.The impact of scaling down to deep submicron on CMOS RF circuits.IEEE Journal Solid-State Circuits.1998,33(7),1023-1036.
[4]Dawn Wang,Jack Ou,Xudong Wang.RF design challenges at 90nm RFCMOS technology under low voltage applications.ICSICT.2006,1522-1525.
[5]Herbert S.Bennett,Ralf Brederlow,Julio C.Costa,et al.Device and technology evolution for Si-based RF integrated circuits.IEEE TRANSACTION ON ELECTRON DEVICES.2005,52(7),1235-1257.
[6]张国艳,黄如,张兴等。CMOS射频集成电路的研究进展。微电子学。2004,34(4),377-383转389。
[7]唐守龙,吴建辉。CMOS混频器设计现状与进展。微电子学。2005,35(6),605-611。
[8]Lawrence E.Larson.Integrated circuit technology options of RFICs-present status and future directions.IEEE Journal Solid-State Circuits.1998,33(3),387-399.
[9]Asad A.Abidi.RF CMOS comes of age.IEEE Journal Solid-State Circuits.2004,39(4),549-561.
[10]Behzad Razavi.CMOS technology characterization for Analog and RF design.IEEE Journal Solid-State Circuits.1999,34(3),268-276.
[11]王广运,郭秉义,李洪涛。差分GPS定位技术与应用。第一版,北京,电子工业出版社,1996,103-104。
[12]邓中卫。世界GPS接收机手册。第一版,北京,航空工业出版社,1995,59-85。
[13]R.M.Warner and J.N.Fordemwalt,Eds..Integrated Circuits Design Principle and Fabrication.New York,McGraw-Hill,1965,267.
[14]N.M.Nguyen,R.G.Meyer.Si IC-compatible inductors and LC passive filters.IEEE Journal Solid-State Circuits.1990,25(4),1028-1031.
[15]Markus Grozing,Andreas Pascht,Manfred Berroth.A 2.5V CMOS Differential Active Inductor with Tunable L and Q for Frequencies up to 5GHz.2001 IEEE Radio Frequency Integrated Circuits Symposium,271-274.
[16]S.Ei Khoury.The Design of Active Floating Positive and Negative Inductors in MMIC Tehnology.IEEE Micromave And Guided Wave Letters.1995,5(10),321.
[17]R.Kaunisto,P.Alinikula,K.Stadius,and V Porra.A Low-Power HBT MMIC Filter Based on Tunable Active Inductors.IEEE Microwave And Guided Letters.1997,7(8),209.
[18]王志华,吴恩德。CMOS射频集成电路的现状与进展[J]。电子学报。2001,29(2),233-238。
[19]J.R.Long,M.A.Copeland.The Modeling Characterization and Design of Monolithic Inductors for Silicon RFIC's[J].IEEE Journal of Solid-State Circuits.1997,32(3),357-369.
[20]S.S.Mohan,M.Hershenson,S.Bayd et al.Simple Accurate Expressions for planar spiral Inductances[J].IEEE Journal of Solid-State Circuits.1999,34(10),1419-1424.
[21]C.P.Yue,S.S.Wong.On-Chip Spiral Inductors with patterned Ground shields for Si-Based RFIC's[J].IEEE Journal of Solid-State Circuits,1998,33(5),743-752.
[22]C.C.Enz,Y Cheng.MOS Transistor Modeling for RFIC Design[J].IEEE Journal of Solid-State Circuits.2000,35(2),186-201.
[23]S.F.Tin,A.A.Osman,K.Mayaram.A Simple Subcircuit Extension of the BSIM3v3 Model for CMOS RF Design[J].IEEE Journal of Solid-State Circuits;2000,35(4),612-623.
[24]T.Manku.Microwave CMOS-Device Physics and Design[J].IEEE Journal of Solid-State Circuits.1999,34(3),277-285.
[25]施超,庄奕琪。CMOS射频集成电路中器件模型的研究[J]。微电子学,2002,32(6),404-408。
[26]D.K.Shaeffer,T.H.Lee.A 1.5-V 1.5GHz CMOS Low Noise Amplifier[J].IEEE Journal of Solid-State Circuits.1997,32(5),745-759.
[27]B.Razavi,R-H.Yan,K.F.Lee.Impact of Distributed Gate Resistance on the Performance of MOS Devices[J].IEEE Transactions on Circuits and Systems-Ⅰ:Fundamental Theory and Applications.1994,41(11),750-754.
[28]Thomas H.Lee著,余志平,周润得等译。CMOS射频集成电路设计。第一版,北京,电子工业出版社,2004,26-28。
[29]Thomas H.Lee著,余志平,周润得等译。CMOS射频集成电路设计。第一版,北京,电子工业出版社,2004,223-224。
[30]Manolis T.Terrovitis,Robert G.Meyer.Noise in Currcnt-Commutating CMOS Mixers.IEEE Journal of Solid-State Circuit.1999,34(6),772-783.
[31]Liwei Sheng,Jonathan C.Jensen,Lawrence E.Larson.A Wide-Bandwidth Si/SiGc HBT Direct Conversion Sub-Harmonic Mixer/ Downconverter.IEEE Journal of Solid-State Circuit.2000,35(9),1329-1337.
[32]Vojkan Vidojkovic,Johan van der Tang,Arjan Leeuwenburgh et al.A low-voltage folded-switching mixer in 0.18μm CMOS.IEEE Journal of Solid-State Circuit.2005,40(6),1259-1264.
[33]R.Jacob Baker,Harry W.Li,David E.Boyce著,陈中建,吉利久译。CMOS电路设计·布局与仿真。第一版,北京,机械工业出版社,2006,358-359。