基于CMOS工艺的低噪声放大器与混频器设计
|
摘要
这篇论文以射频接收机前端关键器件中的低噪声放大器与混频器为研究对象,在系统分析无线局域网中射频接收机几种典型结构及其性能指标的基础上,根据IEEE802.11a标准,应用Agilent公司的ADS2003C电路仿真软件进行电路设计。
首先,在分析、比较低噪声放大器的结构、工作原理与性能指标的基础上,综合多种因素,选用电感源极负反馈以及共源共栅低噪声放大器的电路结构。应用Matlab编程计算出栅宽与噪声系数的关系曲线,供电路设计时参考。应用ADS软件对此电路进行设计、优化与仿真,仿真结果:输入回波反射系数S_(11)和输出回波反射系数S_(22)均小于-30dB;增益S_(21)为13.9dB;反向增益S_(12)为-29dB;在5.2GHz处,噪声系数为1.3dB;1dB压缩点为-11dBm,输入三阶互调点大约为-2dBm。上述结果表明设计的低噪声放大器能够实现很好的输入输出匹配,较高的正向传输增益,反向隔离和线性度均满足设计要求。
其次,在分析、比较几种典型混频器的基本原理和性能指标的基础上,选择Gilbert单元结构混频器设计电路,并进行噪声分析,引入改进的电流注入结构。应用ADS软件对此电路进行设计、优化与仿真,仿真结果:变频增益为16.5dB;噪声系数为15.2dB;1dB压缩点为-15dBm;三阶交调截点为-5dBm;静态工作电流为40mA,功耗为72mW。上述结果表明:设计的混频器各项性能指标均达到设计要求。
最后,将设计仿真完毕的带电感源极负反馈的共源共栅低噪声放大器和Gilbert单元结构混频器电路,采用TSMC 0.18μm CMOS工艺元件库,应用Cadence软件画出这两种电路的版图。上述工作对射频集成电路设计有一定的参考价值。
In this paper, the key devices—low noise amplifier and mixer in the front-end of RF receiver have been studied, on the basis of the systematic analysis several typical structures of WLAN RF receiver and performance indicators. According to IEEE802.11a standards, ADS2003C of Agilent's circuit simulation software is used for the circuit design.
Firstly, on the basis of the analysis and comparison of low noise amplifier's structure, work principle and performance targets, integrating a number of factors the structure of inductor source negative feedback and cascade has been chosen. The curves of gate width and noise factor are obtained by using the Matlab, which are references for the design. By using the simulation tool ADS, the low noise amplifier has been designed, optimized and simulation. The simulation results are: the enter echo reflection coefficient S_(11) and output echo reflection coefficient S_(22) are less than -30dB; the gain S21 is 13.9dB; the reverse gain S_(12) is -29dB; at 5.2GHz, the noise factor is 1.3dB; P_(1dB) is -11dBm, IIP_3 is about -2dBm. These results show that the designed low noise amplifier has achieved good input and output match and the higher positive transmission gain, the reverse isolation and linearity all have met the design requirements.
Secondly, on the basis of the analysis and comparison of several typical mixer structures, fundamental and performance targets, the Gilbert unit mixer has been selected for the circuit design, then the noise analysis and the improved current injection structure has been given. By using the simulation tool ADS, the circuit has been designed, optimized and simulated. The simulation results are: frequency gain isl6.5dB; noise factor is 15.2dB; P_(1dB) is about -15dBm; IIP_3 is about -5dBm; quiescent operating current is 40mA, the power consumption is 72mW. These results show that: the performance indicators of the design of mixer have met the design requirements.
Finally, after the simulation, the layouts of the inductors source negative feedback and cascade low noise amplifier and the Gilbert unit mixer have been designed, using TSMC 0.18μm CMOS technology library and the Cadence software. This paper has certain value for the RFIC design.
首先,在分析、比较低噪声放大器的结构、工作原理与性能指标的基础上,综合多种因素,选用电感源极负反馈以及共源共栅低噪声放大器的电路结构。应用Matlab编程计算出栅宽与噪声系数的关系曲线,供电路设计时参考。应用ADS软件对此电路进行设计、优化与仿真,仿真结果:输入回波反射系数S_(11)和输出回波反射系数S_(22)均小于-30dB;增益S_(21)为13.9dB;反向增益S_(12)为-29dB;在5.2GHz处,噪声系数为1.3dB;1dB压缩点为-11dBm,输入三阶互调点大约为-2dBm。上述结果表明设计的低噪声放大器能够实现很好的输入输出匹配,较高的正向传输增益,反向隔离和线性度均满足设计要求。
其次,在分析、比较几种典型混频器的基本原理和性能指标的基础上,选择Gilbert单元结构混频器设计电路,并进行噪声分析,引入改进的电流注入结构。应用ADS软件对此电路进行设计、优化与仿真,仿真结果:变频增益为16.5dB;噪声系数为15.2dB;1dB压缩点为-15dBm;三阶交调截点为-5dBm;静态工作电流为40mA,功耗为72mW。上述结果表明:设计的混频器各项性能指标均达到设计要求。
最后,将设计仿真完毕的带电感源极负反馈的共源共栅低噪声放大器和Gilbert单元结构混频器电路,采用TSMC 0.18μm CMOS工艺元件库,应用Cadence软件画出这两种电路的版图。上述工作对射频集成电路设计有一定的参考价值。
In this paper, the key devices—low noise amplifier and mixer in the front-end of RF receiver have been studied, on the basis of the systematic analysis several typical structures of WLAN RF receiver and performance indicators. According to IEEE802.11a standards, ADS2003C of Agilent's circuit simulation software is used for the circuit design.
Firstly, on the basis of the analysis and comparison of low noise amplifier's structure, work principle and performance targets, integrating a number of factors the structure of inductor source negative feedback and cascade has been chosen. The curves of gate width and noise factor are obtained by using the Matlab, which are references for the design. By using the simulation tool ADS, the low noise amplifier has been designed, optimized and simulation. The simulation results are: the enter echo reflection coefficient S_(11) and output echo reflection coefficient S_(22) are less than -30dB; the gain S21 is 13.9dB; the reverse gain S_(12) is -29dB; at 5.2GHz, the noise factor is 1.3dB; P_(1dB) is -11dBm, IIP_3 is about -2dBm. These results show that the designed low noise amplifier has achieved good input and output match and the higher positive transmission gain, the reverse isolation and linearity all have met the design requirements.
Secondly, on the basis of the analysis and comparison of several typical mixer structures, fundamental and performance targets, the Gilbert unit mixer has been selected for the circuit design, then the noise analysis and the improved current injection structure has been given. By using the simulation tool ADS, the circuit has been designed, optimized and simulated. The simulation results are: frequency gain isl6.5dB; noise factor is 15.2dB; P_(1dB) is about -15dBm; IIP_3 is about -5dBm; quiescent operating current is 40mA, the power consumption is 72mW. These results show that: the performance indicators of the design of mixer have met the design requirements.
Finally, after the simulation, the layouts of the inductors source negative feedback and cascade low noise amplifier and the Gilbert unit mixer have been designed, using TSMC 0.18μm CMOS technology library and the Cadence software. This paper has certain value for the RFIC design.
引文
1.陈邦媛.射频通信电路[M].第2版.北京:科学出版社,2006
2.毕查德·拉扎维著,陈贵灿,程军,张瑞智译.模拟CMOS集成电路设计[M].西安:西安交通大学出版社,2003
3.池保勇,余志平,石秉学.CMOS射频集成电路分析与设计[M].北京:清华大学出版社,2006
4.王志功,沈永朝.集成电路设计基础[M].北京:电子工业出版社,2005
5.童诗白,华成英.模拟电子技术基础[M].北京:高等教育出版社,2000
6.Guillermo Gonzalez,白晓东译.微波晶体管放大器分析与设计[M].第2版.北京:清华大学出版社,2003
7.Behzad Razavi著,余志平,周润德译.射频微电子[M].北京:清华大学出版社,2006
8.Thomas H.lee著,余志平,周润德译.CMOS射频集成电路设计[M].第2版.北京:电子工业出版社,2006
9.Rdnhold Ludwig,Pavel Bretchko著,王自宇,张肇仪,徐承和等译.射频电路设计-理论与应用[M].北京:电子工业出版社,2005
10.陈金松.模拟集成电路(原理、设计、应用)[M].合肥:中国科学技术大学出版社,1997
11.Christopher Saint,Judy Saint著,李伟华,孙伟峰译.集成电路版图基础:实用指南[M].北京:清华大学出版社.2006
12.曹克.低电压低功耗CMOS射频低噪声放大器设计[D].清华大学博士学位论文.2005.6
13.L.Lee,R.M.Sidek,S.S.Jamuar,S.Khatun.Lower Power Consumption and Wider Bandwidth of a LNA for Wireless Communication Technology at 5 GHz Band[C].2007ICACT2007:1049-1052
14.Kuo-Hua Cheng,Christina F.Jou.A Novel 2.4GHz LNA with Digital Gain Control using 0.18um CMOS[C].APMC2005 Proceedings.
15.Payam Heydari,Denis Lin.A Performance Optimized CMOS Distributed LNA for UWB Receivers[C].IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE:337-340
16.Mikael Cimino,Herve Lapuyade,Magali De Matos,Thierry Taris,Yann Deval,Jean Baptiste Begueret.A Sub 1V CMOS LNA dedicated to 802.11b/g applications with self test & high reliability capabilities[C].2007 IEEE Radio Frequency Integrated Circuits Symposium:343-346
17.Trung Kien Nguyen,Nam-Jin Oh,Yong-Hun Oh,S Gook-JuIhm,Sang Gug Lee,Saman Asgaran.Image-Rejection CMOS Low-Noise Amplifier Design Optimization Techniques[J].IEEE transactions on microwave theory and techniques.2005,53(2):537-548
18.Piljae Park,Cheon Soo Kim,Hyun Kyu Yq.Linearity,Noise Optimization for Two Stage RF CMOS LNA[J].IEEE Catalogue No.01CH37239:756-758
19.IEEE Std 802.11-1999(Supplement to IEEE std 802.11-1999),The Institute of Electrical and Electronics Engineers,Inc.3 Park Avenue,New York,NY 10016-5997,USA.
20.Frank Zhang,Peter R.Kinget.Low Power Programmable Gain CMOS Distributed LNA.IEEE JOURNAL OF SOLID STATE CIRCUITS[J].2006,41(6):1333-1342
21.M.Jamal Deen,Chih-Hung Chen.Design of the Input Matching Network of RF CMOS LNAs for Low-Power Operation.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS[J].2007,54(3):544-554
22.To-Po Wang,Chia-Chi Chang,Ren-Chieh Liu,Ming-Da Tsai.A Low-Power Oscillator Mixer in 0.18μm CMOS Technology.IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES.2006,54(1):88-94
23.Kumar Munusamy,Zubaida Yusoff.A Highly Linear CMOS Down Conversion Double Balanced Mixer[C]..ICSE2006 Proc.2006,Kuala Lumpur,Malaysia:985-990
24.李竹.基于CMOS工艺的一种低功耗高增益低噪声放大器[J].现代电子技术.2006,235(20):30-32
25.李竹,陈志恒,王志功.1.8V 5.2GHz差分结构CMOS低噪声放大器[J].电子器件.2004,27(1):72—74
26.Hong Qi,Chen Junning,Pan Hao,Meng Jian.A 1.2V High Linearity Mixer Design[C].The Eighth International Conference on Electronic Measurement and Instruments,ICEMI'2007:2-74-2-77
27.宋蓓,谢婷婷,陈志恒.深亚微米CMOS低噪声放大器的设计[J].电气电子教学学报.2002,24(6):29—31
28.Ahmed E1 Sanhoury,Yaser Khalaf,Essam Hashish.A Novel Mixer Architecture Applied to CDMA 2000:118-123
29.池懿,文骐,曾令海.2.4 GHz CMOS双平衡混频器的设计[J].上海大学学报(自然科学版).2005,11(5):451-454
30.任怀龙,默立冬,吴思汉.5.8GHz CMOS混频器设计[J].半导体技术,2008,33(3):257—260
31.Jeng-Han Tsai,Wei-Chien Chen,To-Po Wang,Tian-Wei Huang,Huei Wang.A Miniature Q-Band Low Noise Amplifier Using 0.13μm CMOS Technology[J].IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS.2006,16(6):327-329
32.Mou Shouxian,Ma Jian-Guo,Yeo Kiat Seng,Do Manh Anh.A Modified Architecture Used for Input Matching in CMOS Low-Noise Amplifiers[J].IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-Ⅱ:EXPRESS BRIEFS,2005,52(11):784-788
33.Trung Kien Nguyen,Chung-Hwan Kim,Gook Ju Ihm,Moon-Su Yang,Sang-Gug Lee.CMOS Low Noise Amplifier Design Optimization Techniques[J].IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES.2004,52(5):1433-1442
34.David J.Allstot,Xiaoyong Li,Sudip Shekhar.Design Considerations for CMOS Low Noise Amplifiers[C].2004 IEEE Radio Frequency Integrated Circuits Symposium:97-100
35.Brian A.Floyd,Dicle Ozis.Low-Noise Amplifier Comparison at 2GHz in 0.25μm and 0.18μm RFCMOS and SiGe BiCMOS[C].2004 IEEE Radio Frequency Integrated Circuits Symposium:185-188
36.唐守龙,吴建辉.CMOS混频器设计现状与进展[J].微电子学.2005,35(6):605-610
37.Chang C-C,Weng R-M,Huang J-C.A 1.5V high gain CMOS mixer for 2.4GHz applications[C].IEEE IntSymp Circ and Syst.Sydney,Australia,2001:782-785
38.MacEachern L A,Manku T.A charge injection methodfor Gilbert cell biasing[C].Canadian Conf Electrical and Computer Engineering.Canada.1998:365-368
39.W akimoto T,H atano T,Y amaguchi C.Sub 1V 5GHz band up and down conversion mixer cores in 0.35μm CMOS[C].IEEE Syrup VLSIC irc.Honolulu,USA.2000:98-99
40.Lee S,Yoo S,KimW.1GHz CMOS down conversion mixer[C].Int Syrup Consumer Electronics.Singapore.1997:125-127
41.Sandstrom T,Sundstrom L.A 1.8GHz double balanced CMOS receiver front end[C].IEEE Int Symp Circ and Syst.Orlando,USA.1999:834-837
42.Chan P Y,Rofougaran A,Ahmed K A.A highly linear 1GHz CMOS down conversion mixer[C].Europe an Solid State Circuits Conf.Sevilla,Spain,1993:210-213
2.毕查德·拉扎维著,陈贵灿,程军,张瑞智译.模拟CMOS集成电路设计[M].西安:西安交通大学出版社,2003
3.池保勇,余志平,石秉学.CMOS射频集成电路分析与设计[M].北京:清华大学出版社,2006
4.王志功,沈永朝.集成电路设计基础[M].北京:电子工业出版社,2005
5.童诗白,华成英.模拟电子技术基础[M].北京:高等教育出版社,2000
6.Guillermo Gonzalez,白晓东译.微波晶体管放大器分析与设计[M].第2版.北京:清华大学出版社,2003
7.Behzad Razavi著,余志平,周润德译.射频微电子[M].北京:清华大学出版社,2006
8.Thomas H.lee著,余志平,周润德译.CMOS射频集成电路设计[M].第2版.北京:电子工业出版社,2006
9.Rdnhold Ludwig,Pavel Bretchko著,王自宇,张肇仪,徐承和等译.射频电路设计-理论与应用[M].北京:电子工业出版社,2005
10.陈金松.模拟集成电路(原理、设计、应用)[M].合肥:中国科学技术大学出版社,1997
11.Christopher Saint,Judy Saint著,李伟华,孙伟峰译.集成电路版图基础:实用指南[M].北京:清华大学出版社.2006
12.曹克.低电压低功耗CMOS射频低噪声放大器设计[D].清华大学博士学位论文.2005.6
13.L.Lee,R.M.Sidek,S.S.Jamuar,S.Khatun.Lower Power Consumption and Wider Bandwidth of a LNA for Wireless Communication Technology at 5 GHz Band[C].2007ICACT2007:1049-1052
14.Kuo-Hua Cheng,Christina F.Jou.A Novel 2.4GHz LNA with Digital Gain Control using 0.18um CMOS[C].APMC2005 Proceedings.
15.Payam Heydari,Denis Lin.A Performance Optimized CMOS Distributed LNA for UWB Receivers[C].IEEE 2005 CUSTOM INTEGRATED CIRCUITS CONFERENCE:337-340
16.Mikael Cimino,Herve Lapuyade,Magali De Matos,Thierry Taris,Yann Deval,Jean Baptiste Begueret.A Sub 1V CMOS LNA dedicated to 802.11b/g applications with self test & high reliability capabilities[C].2007 IEEE Radio Frequency Integrated Circuits Symposium:343-346
17.Trung Kien Nguyen,Nam-Jin Oh,Yong-Hun Oh,S Gook-JuIhm,Sang Gug Lee,Saman Asgaran.Image-Rejection CMOS Low-Noise Amplifier Design Optimization Techniques[J].IEEE transactions on microwave theory and techniques.2005,53(2):537-548
18.Piljae Park,Cheon Soo Kim,Hyun Kyu Yq.Linearity,Noise Optimization for Two Stage RF CMOS LNA[J].IEEE Catalogue No.01CH37239:756-758
19.IEEE Std 802.11-1999(Supplement to IEEE std 802.11-1999),The Institute of Electrical and Electronics Engineers,Inc.3 Park Avenue,New York,NY 10016-5997,USA.
20.Frank Zhang,Peter R.Kinget.Low Power Programmable Gain CMOS Distributed LNA.IEEE JOURNAL OF SOLID STATE CIRCUITS[J].2006,41(6):1333-1342
21.M.Jamal Deen,Chih-Hung Chen.Design of the Input Matching Network of RF CMOS LNAs for Low-Power Operation.IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS[J].2007,54(3):544-554
22.To-Po Wang,Chia-Chi Chang,Ren-Chieh Liu,Ming-Da Tsai.A Low-Power Oscillator Mixer in 0.18μm CMOS Technology.IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES.2006,54(1):88-94
23.Kumar Munusamy,Zubaida Yusoff.A Highly Linear CMOS Down Conversion Double Balanced Mixer[C]..ICSE2006 Proc.2006,Kuala Lumpur,Malaysia:985-990
24.李竹.基于CMOS工艺的一种低功耗高增益低噪声放大器[J].现代电子技术.2006,235(20):30-32
25.李竹,陈志恒,王志功.1.8V 5.2GHz差分结构CMOS低噪声放大器[J].电子器件.2004,27(1):72—74
26.Hong Qi,Chen Junning,Pan Hao,Meng Jian.A 1.2V High Linearity Mixer Design[C].The Eighth International Conference on Electronic Measurement and Instruments,ICEMI'2007:2-74-2-77
27.宋蓓,谢婷婷,陈志恒.深亚微米CMOS低噪声放大器的设计[J].电气电子教学学报.2002,24(6):29—31
28.Ahmed E1 Sanhoury,Yaser Khalaf,Essam Hashish.A Novel Mixer Architecture Applied to CDMA 2000:118-123
29.池懿,文骐,曾令海.2.4 GHz CMOS双平衡混频器的设计[J].上海大学学报(自然科学版).2005,11(5):451-454
30.任怀龙,默立冬,吴思汉.5.8GHz CMOS混频器设计[J].半导体技术,2008,33(3):257—260
31.Jeng-Han Tsai,Wei-Chien Chen,To-Po Wang,Tian-Wei Huang,Huei Wang.A Miniature Q-Band Low Noise Amplifier Using 0.13μm CMOS Technology[J].IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS.2006,16(6):327-329
32.Mou Shouxian,Ma Jian-Guo,Yeo Kiat Seng,Do Manh Anh.A Modified Architecture Used for Input Matching in CMOS Low-Noise Amplifiers[J].IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS-Ⅱ:EXPRESS BRIEFS,2005,52(11):784-788
33.Trung Kien Nguyen,Chung-Hwan Kim,Gook Ju Ihm,Moon-Su Yang,Sang-Gug Lee.CMOS Low Noise Amplifier Design Optimization Techniques[J].IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES.2004,52(5):1433-1442
34.David J.Allstot,Xiaoyong Li,Sudip Shekhar.Design Considerations for CMOS Low Noise Amplifiers[C].2004 IEEE Radio Frequency Integrated Circuits Symposium:97-100
35.Brian A.Floyd,Dicle Ozis.Low-Noise Amplifier Comparison at 2GHz in 0.25μm and 0.18μm RFCMOS and SiGe BiCMOS[C].2004 IEEE Radio Frequency Integrated Circuits Symposium:185-188
36.唐守龙,吴建辉.CMOS混频器设计现状与进展[J].微电子学.2005,35(6):605-610
37.Chang C-C,Weng R-M,Huang J-C.A 1.5V high gain CMOS mixer for 2.4GHz applications[C].IEEE IntSymp Circ and Syst.Sydney,Australia,2001:782-785
38.MacEachern L A,Manku T.A charge injection methodfor Gilbert cell biasing[C].Canadian Conf Electrical and Computer Engineering.Canada.1998:365-368
39.W akimoto T,H atano T,Y amaguchi C.Sub 1V 5GHz band up and down conversion mixer cores in 0.35μm CMOS[C].IEEE Syrup VLSIC irc.Honolulu,USA.2000:98-99
40.Lee S,Yoo S,KimW.1GHz CMOS down conversion mixer[C].Int Syrup Consumer Electronics.Singapore.1997:125-127
41.Sandstrom T,Sundstrom L.A 1.8GHz double balanced CMOS receiver front end[C].IEEE Int Symp Circ and Syst.Orlando,USA.1999:834-837
42.Chan P Y,Rofougaran A,Ahmed K A.A highly linear 1GHz CMOS down conversion mixer[C].Europe an Solid State Circuits Conf.Sevilla,Spain,1993:210-213