超宽带系统中CMOS直接下变频混频器的设计和研究
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摘要
近年来,无线通信迅速发展,作为其关键模块,射频集成电路成为当前的研究热点。随着CMOS工艺的发展,器件性能有很大提高,在射频集成电路中用CMOS工艺代替传统的GaAs、BiCMOS等工艺成为可能。但一些二级效应以及衬底串扰等也会变得更加显著,给电路的设计带来了许多困难,特别是电源电压的降低使得传统的电路拓扑结构不能满足设计的要求。
     混频器是射频集成电路的核心模块,每个无线通信系统中至少要用到一个以上的混频器,其性能直接影响整个系统的性能以及系统对其它功能模块的要求。
     基于这种背景,本文提出了一种应用于超宽带系统的高性能(低压、高线性度、高变频增益)直接下变频混频器,采用标准的CMOS工艺设计和实现。该混频器基于传统的吉尔伯特混频器,但又对它进行了多方面的优化,包括采用折叠式结构、反相器、自偏置和恒定跨导偏置电路等。同时,利用LC谐振网络中的电感来消除寄生电容的影响,有效地提高了混频器的各项性能。本文对该混频器进行了详细的分析,最后给出了需要进一步改进的地方。
     设计采用中芯国际0.18μm CMOS RF工艺库,使用Spectre RF工具进行仿真、Virtuoso Layout Editor工具完成版图设计,并在中芯国际(上海)流片。仿真结果显示电压变频增益为10dB,1dB压缩点为9.5dBm,输入三阶互调截点IIP3为15.1dBm,在拐点处的双边带噪声系数为11dB,在100MHz处为9dB。该电路工作在电源电压1.8V下,功耗为11mW。
With the rapid development of wireless communication in recent years, Radio Frequency Integrated Circuit (RFIC), which is a crucial block of it, has become a focus of present study. The development of CMOS technology greatly improves the performance of the devices and makes it possible to substitute CMOS technology for the traditional GaAs and BiCMOS technology in RFICs. However, some second-order effects and substrate crosstalk etc. will also become more obvious, which brings much difficulty to the circuit design, and the most severe consequence is a reduction of the voltage supply, which causes that not all circuit topologies can satisfy the required specifications.
     The mixer is an important block in RFICs, as every wireless communication system needs at least one mixer, and its performance has a direct influence upon that of the whole system and upon the demands of the system for other blocks.
     To solve these problems, this paper presents a high performance, namely low voltage, high linearity and high conversion gain, CMOS direct down conversion mixer for UWB (Ultra Wide Band) system. Based on the traditional Gilbert mixer, the proposed mixer makes many improvements upon it, including the uses of folded topology, inverter, self-biasing, constant Gm biasing circuit and so on. Also, inductor in LC resonating network is used to get rid of the negative effect of parasitic capacitor. Consequently, all performances of the mixer are effectively enhanced. This paper gives a detailed analysis of the proposed mixer, and at last, this paper gives some suggestions on how to improve the performance of the mixer.
     This design is based on 0.18μm CMOS RF technology of SMIC, employing Spectre RF to accomplish the simulation and using Virtuoso Layout Editor to finish the layout design, and finally, the layout taped out in SMIC (Shanghai). the simulation results show that the conversion gain of 10dB, the P1dB of 9.5dBm, the IIP3 of 15.1dBm, the DSB(double side-band) Noise Figure at turning point of 11dB and at 100MHz of 9dB. The circuit operates at the voltage supply of 1.8V and dissipates 11mW.
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