基于SOPC的心电检测分析系统的设计与实现
摘要
针对目前心电监护设备微型化、实时性、高采样率、大存储量等实际需求,采用了一种基于SOPC技术的心电检测分析系统的设计。将DSP和MCU的功能集成在一块FPGA上,在FPGA内部实现多路心电信号的并行处理,由SD卡记录较长时间的连续心电信号,并实现心电信号的实时处理和心率异常的预警等扩展功能。
论文首先提出了运用FPGA来实现心电信号数字信号处理算法的设计方法,包括了低通滤波器设计、简单整系数梳状滤波器的设计、检测R波并计算心率的FPGA模块设计。充分利用了FPGA并行数据处理的优点来实现多路心电数据的并行处理分析。
然后给出了基于Avalon总线自定制从设备外设的设计方案,实现了数据采集控制、数据处理以及LCD控制器模块。将多路数据的采集控制和数字信号处理模块集成到一个同步电路模块中,不仅可以提高多路数据的并行处理能力,还增加了控制电路的可靠性。
最后将已经实现的各个功能模块和其他外部接口加到Avalon总线上来,构成一个基于Nios II处理器的嵌入式系统。充分利用Nios II处理器灵活的人机交互功能来完成数据采集、传输、存储、通信和显示等整个系统工作流程的控制。并针对系统与上位机的通信传输,论文提出了基于串口通信的多路心电信号和心率数据的传输协议,并在软件中实现了通信协议的处理流程。
In order to meet the practical requirements such as micromation, real-time processing, high-speed sampling and large memory capacity, this thesis introduces an ECG detection and analysis system based on SOPC. It integrates the functions of DSP and MCU to a single chip of FPGA. Multi-channel ECG signals can be processed by FPGA and long-playing ECG data can be stored to a SD card. Besides, it can provide real-time analysis of ECG signals and timely warning for cardiac arrhythmia.
In the thesis, firstly, we proposed the method using FPGA to realize the digital signal processing algorithm for ECG, which includes these designs of low pass filter, comb filter, and the FPGA module for calculating the heart rate. The algorithm uses the advantage of parallel data processing of the FPGA to complete the parallel processing and analyzing for multi-channel ECG data.
Secondly, we gave the design plan based on Avalon Bus customized from the peripheral equipment, and achieved the control of data acquisition, the processing of data and the module of LCD control instrument. We made the acquisition control for multi-channel data and the module for digital signal processing integrate into a synchronous circuit module, which can not only enhance the ability of parallel processing of multi-channel data, but also increase the reliability of the control circuit.
Finally, we added all the functional modules which have been achieved and other external interfaces to the Avalon Bus, so that they can constitute an embedded system based on Nios II processor. Through it, we can make use of the flexible human and computer interactive function of Nios II processor to complete the whole system workflow control of data acquisition, transmission, storage, communication, display, etc. For the communication transmission between the system and computer, we proposed the transmission protocol based on the multi-channel ECG signal of the serial communication and the heart rate data, and achieved the processing workflow of communication protocols in the software.
论文首先提出了运用FPGA来实现心电信号数字信号处理算法的设计方法,包括了低通滤波器设计、简单整系数梳状滤波器的设计、检测R波并计算心率的FPGA模块设计。充分利用了FPGA并行数据处理的优点来实现多路心电数据的并行处理分析。
然后给出了基于Avalon总线自定制从设备外设的设计方案,实现了数据采集控制、数据处理以及LCD控制器模块。将多路数据的采集控制和数字信号处理模块集成到一个同步电路模块中,不仅可以提高多路数据的并行处理能力,还增加了控制电路的可靠性。
最后将已经实现的各个功能模块和其他外部接口加到Avalon总线上来,构成一个基于Nios II处理器的嵌入式系统。充分利用Nios II处理器灵活的人机交互功能来完成数据采集、传输、存储、通信和显示等整个系统工作流程的控制。并针对系统与上位机的通信传输,论文提出了基于串口通信的多路心电信号和心率数据的传输协议,并在软件中实现了通信协议的处理流程。
In order to meet the practical requirements such as micromation, real-time processing, high-speed sampling and large memory capacity, this thesis introduces an ECG detection and analysis system based on SOPC. It integrates the functions of DSP and MCU to a single chip of FPGA. Multi-channel ECG signals can be processed by FPGA and long-playing ECG data can be stored to a SD card. Besides, it can provide real-time analysis of ECG signals and timely warning for cardiac arrhythmia.
In the thesis, firstly, we proposed the method using FPGA to realize the digital signal processing algorithm for ECG, which includes these designs of low pass filter, comb filter, and the FPGA module for calculating the heart rate. The algorithm uses the advantage of parallel data processing of the FPGA to complete the parallel processing and analyzing for multi-channel ECG data.
Secondly, we gave the design plan based on Avalon Bus customized from the peripheral equipment, and achieved the control of data acquisition, the processing of data and the module of LCD control instrument. We made the acquisition control for multi-channel data and the module for digital signal processing integrate into a synchronous circuit module, which can not only enhance the ability of parallel processing of multi-channel data, but also increase the reliability of the control circuit.
Finally, we added all the functional modules which have been achieved and other external interfaces to the Avalon Bus, so that they can constitute an embedded system based on Nios II processor. Through it, we can make use of the flexible human and computer interactive function of Nios II processor to complete the whole system workflow control of data acquisition, transmission, storage, communication, display, etc. For the communication transmission between the system and computer, we proposed the transmission protocol based on the multi-channel ECG signal of the serial communication and the heart rate data, and achieved the processing workflow of communication protocols in the software.
引文
[1]岳蜀华,王美涵,郭飞.可穿戴式无线心电监测仪的研究现状.生物医学工程与临床,2006,10(4):262-266
[2]彭澄廉等.挑战SOC——基于NIOS的SOPC设计与实现.北京:清华大学出版社,2004,5-7
[3] Carolyn Kuttner. Hardware-Software Codesign Using Processor Synthesis. IEEE Design&Testof Computers, 1996,13(3):43-53
[4]熊光泽,詹瑾瑜.嵌入式系统软/硬件协同设计技术综述.计算机应用,2006, 20(4):757-760
[5] Altera Inc. Nios II Processor Reference Handbook. Altera Inc.,2005
[6]任爱峰,初秀琴,常存,孙肖子.基于FPGA的嵌入式系统设计.西安:西安电子科技大学出版社,2004,192-196
[7] Altera Inc. Altera Embedded Peripherals Handbook.Altera Inc.,2003
[8] Altera Inc. Avalon Bus specification reference manual. Altera Inc.,2003
[9]李英兰.Nios II嵌入式软核SOPC设计原理及应用.北京:北京航空航天大学出版社,2006,30-34
[10] Altera Inc. Quartus II Handbook. Altera Inc.,2005
[11]周立功.Nios II SOPC嵌入式系统开发指南.广州:周立功单片机发展有限公司,2005,8-39
[12]潘松.SOPC技术实用教程.北京:清华大学出版社,2005,2-23
[13]胡广书.数字信号处理理论、算法与实现.北京:清华大学出版社,2003,296-318
[14]陈后金.数字信号处理.北京:高等教育出版社,2004,259-276
[15] Sanjit K.Mitra.Digital Signal Processing――A Computer-based Approach(Second Edition).北京:清华大学出版社,2002,128-256
[16] Emmanuel C. Ifeachor, Barrie W. Jervis著.罗鹏飞等译.数字信号处理实践方法.北京:电子工业出版社,2004,296-313
[17]王宏.MATLAB6.5及其在信号处理中的应用.北京:清华大学出版社,2004,125-256
[18]潘松,黄继业,王国栋.现代DSP技术.西安:西安电子科技大学出版社,2004,163-186
[19]陈家国,俞天智,周先飞.基于FPGA对称型FIR滤波器的设计与实现.北京电子科技学院学报,2007,15(4):57-59
[20]孔令锋,谢锡城.矫正心电信号中基线漂移的数字滤波技术及其实现.中国医疗器械信息,2003,9(6):2-4
[21] Lynn P A. FIR digital filters based on different coefficients: design improvements and software implementation.IEE Proc 1980,127E:253-258
[22]唐渝,赵干青.简单整系数递归数字滤波器及其在生物医学中的应用.中国医疗器械,1989,13(4):35-39.
[23]王旭东,刘渝.FIR的FPGA实现及其Quartus II与MATLAB仿真.电子工程师,2004,30(5):49-51
[24]刘凌,胡永生译.数字信号处理的FPGA实现.北京:清华大学出版社,2003,37-82.
[25] M. J. Burke, A. Boilson. A DIGITAL CARDIOTACHOMETER ASIC. 1996 Proceedings of the Third IEEE International Conference on Vol 2:13-16
[26]方茁,陈泽文,彭澄廉.SOPC设计中的用户自定义逻辑.计算机工程,2004,30(17):42-44
[27]万耀,李小清,周云飞,潘海鸿.基于FPGA多通道数据采集系统设计.微计算机信息, 2007,23(22):199-201
[28] Altera Inc. Avalon Memory-Mapped Interface Specification. Altera Inc.,2006
[29] Altera Inc. SOPC Builder datasheet. Altera Inc.,2003
[30]傅越千.基于数字电位器的程控放大器设计.航空计算技术,2003,33(1):121-123
[31]江明,张辉,刘向宇.基于FPGA的LCD控制器设计与实现.电子元器件应用,2007,9(2):37-39
[32]张洪涛,莫文承,李兵兵.基于SPI协议的SD卡读写机制与实现方法.电子元器件应用, 2008,10(3):42-44
[33] Altera Inc. Nios II Hardware Development Tutorial. Altera Inc.,2007
[34] Altera Inc. Nios II Software Developer’s Handbook. Altera Inc.,2007
[35]龚建伟.Visual C++/Turbo C串口通信编程实践.北京:电子工业出版社,2004,197-216
[36]黄连民,石健,黄德杰.VC++中实现PC机与单片机的串行通讯.山东科技大学学报,2003,22(1):97-99
[37]苏岳龙,李贻斌,宋锐.基于VC++6.0的高速串口通信数据采集系统.微计算机信息,2005, 21(5):147-148
[2]彭澄廉等.挑战SOC——基于NIOS的SOPC设计与实现.北京:清华大学出版社,2004,5-7
[3] Carolyn Kuttner. Hardware-Software Codesign Using Processor Synthesis. IEEE Design&Testof Computers, 1996,13(3):43-53
[4]熊光泽,詹瑾瑜.嵌入式系统软/硬件协同设计技术综述.计算机应用,2006, 20(4):757-760
[5] Altera Inc. Nios II Processor Reference Handbook. Altera Inc.,2005
[6]任爱峰,初秀琴,常存,孙肖子.基于FPGA的嵌入式系统设计.西安:西安电子科技大学出版社,2004,192-196
[7] Altera Inc. Altera Embedded Peripherals Handbook.Altera Inc.,2003
[8] Altera Inc. Avalon Bus specification reference manual. Altera Inc.,2003
[9]李英兰.Nios II嵌入式软核SOPC设计原理及应用.北京:北京航空航天大学出版社,2006,30-34
[10] Altera Inc. Quartus II Handbook. Altera Inc.,2005
[11]周立功.Nios II SOPC嵌入式系统开发指南.广州:周立功单片机发展有限公司,2005,8-39
[12]潘松.SOPC技术实用教程.北京:清华大学出版社,2005,2-23
[13]胡广书.数字信号处理理论、算法与实现.北京:清华大学出版社,2003,296-318
[14]陈后金.数字信号处理.北京:高等教育出版社,2004,259-276
[15] Sanjit K.Mitra.Digital Signal Processing――A Computer-based Approach(Second Edition).北京:清华大学出版社,2002,128-256
[16] Emmanuel C. Ifeachor, Barrie W. Jervis著.罗鹏飞等译.数字信号处理实践方法.北京:电子工业出版社,2004,296-313
[17]王宏.MATLAB6.5及其在信号处理中的应用.北京:清华大学出版社,2004,125-256
[18]潘松,黄继业,王国栋.现代DSP技术.西安:西安电子科技大学出版社,2004,163-186
[19]陈家国,俞天智,周先飞.基于FPGA对称型FIR滤波器的设计与实现.北京电子科技学院学报,2007,15(4):57-59
[20]孔令锋,谢锡城.矫正心电信号中基线漂移的数字滤波技术及其实现.中国医疗器械信息,2003,9(6):2-4
[21] Lynn P A. FIR digital filters based on different coefficients: design improvements and software implementation.IEE Proc 1980,127E:253-258
[22]唐渝,赵干青.简单整系数递归数字滤波器及其在生物医学中的应用.中国医疗器械,1989,13(4):35-39.
[23]王旭东,刘渝.FIR的FPGA实现及其Quartus II与MATLAB仿真.电子工程师,2004,30(5):49-51
[24]刘凌,胡永生译.数字信号处理的FPGA实现.北京:清华大学出版社,2003,37-82.
[25] M. J. Burke, A. Boilson. A DIGITAL CARDIOTACHOMETER ASIC. 1996 Proceedings of the Third IEEE International Conference on Vol 2:13-16
[26]方茁,陈泽文,彭澄廉.SOPC设计中的用户自定义逻辑.计算机工程,2004,30(17):42-44
[27]万耀,李小清,周云飞,潘海鸿.基于FPGA多通道数据采集系统设计.微计算机信息, 2007,23(22):199-201
[28] Altera Inc. Avalon Memory-Mapped Interface Specification. Altera Inc.,2006
[29] Altera Inc. SOPC Builder datasheet. Altera Inc.,2003
[30]傅越千.基于数字电位器的程控放大器设计.航空计算技术,2003,33(1):121-123
[31]江明,张辉,刘向宇.基于FPGA的LCD控制器设计与实现.电子元器件应用,2007,9(2):37-39
[32]张洪涛,莫文承,李兵兵.基于SPI协议的SD卡读写机制与实现方法.电子元器件应用, 2008,10(3):42-44
[33] Altera Inc. Nios II Hardware Development Tutorial. Altera Inc.,2007
[34] Altera Inc. Nios II Software Developer’s Handbook. Altera Inc.,2007
[35]龚建伟.Visual C++/Turbo C串口通信编程实践.北京:电子工业出版社,2004,197-216
[36]黄连民,石健,黄德杰.VC++中实现PC机与单片机的串行通讯.山东科技大学学报,2003,22(1):97-99
[37]苏岳龙,李贻斌,宋锐.基于VC++6.0的高速串口通信数据采集系统.微计算机信息,2005, 21(5):147-148