几种微电子材料的制备、表征与性能研究
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摘要
在对更快、更小和更高性能的电子设备的需求驱动下,微电子工业高速发展。集成电路的特征尺寸以及用于不同电路之间连接的印刷电路板的尺寸都在不断缩小,使得很多传统微电子材料与技术都面临巨大的挑战,需要通过新材料、新技术的研究与应用,从而保证微电子行业的可持续快速发展。
集成电路的互补型金属-氧化物-半导体CMOS技术中,传统的SiO2栅介电材料已经逼近其厚度极限,寻找新型高介电常数的替代材料,是半导体工业迫在眉睫的任务。多种高介电栅介质候选材料得到广泛研究。其中,氧化铪(HfO2)已成为高介电栅介质的最有希望的竞选材料之一,是当前high-k材料研究的热点。然而,单一HfO2存在结晶温度较低、易在界面处形成低介电常数硅酸盐、载流子迁移率低等问题。人们通过在HfO2中掺入N、Si、Al、Ti、Zr等元素来提高其性能。与半导体工艺兼容的原子层沉积(ALD)和化学气相沉积(CVD)方法已成为制备high-k薄膜最主要的两种技术,有机前驱体带来的碳污染问题是限制ALD和CVD薄膜性能提高的重要因素。本文选取Hf-Al-O和Hf-Zr-O复合薄膜,以无水硝酸盐为前驱体,采用ALD和CVD方法制备了这两种复合薄膜,对其生长特性、薄膜成分与结构、热稳定性和电学性能等,进行了较为深入的研究。
快闪存储器是目前非挥发性存储器的主流器件。但随着器件尺寸的不断缩小,基于传统浮栅结构的快闪存储器在继续等比例缩小方面受阻,新型电荷俘获存储器成为下一代快闪存储器的有力竞争者。传统的电荷俘获型存储器以SONOS (Si/SiO2/Si3N4/SiO2/Si)结构为代表,但其较差的保持性能是制约其进一步发展的关键。因此,很多半导体公司和研究机构致力于对传统SONOS结构中的隧穿层、电荷俘获层、阻挡层等进行改进,以获得新型电荷俘获型存储器,使得其在具有较好的保持性能下,能有更快的编程／擦除速度和更低的操作电压。本文采用分子原子沉积(MAD)技术制备Al2O3薄膜,作为隧穿层和阻挡层,获得MANAS (Metal/Al2O3/SiNx/Al2O3/Si)新型电荷俘获型存储器,对存储器的存储与保持性能以及Al2O3薄膜的结构与电学性能进行了深入的分析研究。
随着微电子工业的不断发展,用于电路之间连接的印刷电路板也不断向高密度和小型化的方向发展。与微通孔技术相结合的积层多层板技术中,用于连接层间线路的通孔也变得越来越小,深径比越来越大,对填充于微通孔中电镀铜的性能要求也越来越高。由于微观结构对宏观性能的影响巨大,所以对电镀铜微观结构的研究也成为微电子工业关注的热点。此外,电镀铜在电镀完成后,于室温下会发生所谓“自退火”现象,对电镀铜的结构、取向以及宏观性能等产生了很大的影响,因此对电镀铜自退火现象的研究也深受关注。本文采用多种分析表征手段,对印刷电路板微通孔中的电镀铜微观结构进行了表征研究,同时追踪了电镀铜的自退火过程,并对此过程中晶粒取向的变化进行分析讨论。
本论文主要成果如下：
1.成功合成了具有良好挥发性且不含碳的无水硝酸铪和铪锆复合硝酸盐,以无水硝酸铪作为Hf源,以TMA为Al源、H20为氧源,用ALD方法制备了Hf-Al-O复合薄膜。改变薄膜中Hf的含量,薄膜的等效氧化物厚度、平带电压、电压回滞、漏电流等电学性能指标也随之线性变化。无水铪锆复合硝酸盐中的硝酸铪和硝酸锆主要以固溶体的形式存在,Hf/Zr组分比为1.72：1。采用此复合前驱体,分别用ALD和CVD方法成功沉积了Hf-Zr-O复合薄膜,并研究了薄膜的各项性能。其中,ALD方法制备的薄膜中Hf/Zr组分比约为1：4,与复合前驱体中的组分比差别较大;而CVD薄膜中Hf/Zr组分比与前驱体中的非常吻合。我们认为同一复合前驱体在不同沉积方法中的不同表现可能源于两种沉积技术不同的沉积原理以及对反应前驱体的不同要求。CVD方法制备Hf-Zr-O复合薄膜的结果表明无水铪锆复合硝酸盐是一种有效的沉积双金属氧化物的无机前驱体,其蒸气可以同时稳定地输运两种金属元素。
2.采用MAD方法生长trap-less的Al2O3 (MAD_Al2O3),取代SONOS结构中的隧穿层和阻挡层SiO2,制备出MANAS型电荷俘获存储器结构单元。MAD_Al2O3薄膜的电学和结构成分测试表明,薄膜与Si衬底之间具有平整的界面和低的界面态密度,以及相对较高的导带偏移量(3.9eV)和较低的价带偏移量(2.1eV),并且薄膜的J-V曲线与温度无关,几乎没有电场应力诱导漏电流的存在,可认为薄膜中没有电荷陷阱,电荷传输符合FN隧穿机制。由于隧穿层和阻挡层的优异性能,MANAS型存储器实现了FN隧穿机制的编程/擦除操作,经过+12V/100μs的编程脉冲即实现5.6V的编程窗口,-12V/10ms的擦除脉冲获得6V的擦除窗口,且没有擦除饱和现象。MANAS型存储器仅用±11V的操作电压就可以实现目前最先进SONOS型非挥发存储单元需要士17V才可以达到的编程/擦除窗口;并且经过105个编程/擦除循环后,存储窗口几乎没有什么变化,具有很好的耐久性能。此外,MANAS型存储器对数据具有优异的保持性能,在从室温到2500C的高温下,分别经过+10V/100μs的编程脉冲和-10V/10ms的擦除脉冲后,在1-104sec的时间范围内其衰退速率分别仅为-0.24V/dec和+0.11V/dec,并且在10-4_1 sec的短时间内也具有很好的保持特性。
3.采用背散射电子衍射(EBSD)和聚焦离子束(FIB)等方法,对用于微通孔的电镀铜进行了微观结构的表征,比较了使用不同添加剂A、B、C电镀的铜样品在经过浮焊测试后的不同表现：采用添加剂A和B的电镀铜样品在通孔拐角处出现了细小裂纹,且只在互连铜内延伸一小段即终止,表现出良好的抗高温性能;而采用添加剂C电镀的铜样品通孔中的化学镀铜和电镀铜出现很大的裂缝,贯穿整个电镀层,使镀层几乎被割裂开,表明其承受高温的能力较弱。采用X射线衍射(XRD)技术,追踪了一定条件下制备的电镀铜样品的自退火过程,并结合EBSD技术,对此过程中电镀铜的结构变化进行了表征。发现电镀铜样品经过自退火,发生了从<110>织构到<311>织构的转变。对这一转变的机制进行了仔细研究,并将此变化过程解释为：电镀液中的添加剂、电镀参数和<110>晶向为主的多晶衬底铜等因素综合作用,使得刚电镀完的多晶铜样品以<110>晶向为主；经过“自恢复”阶段后,电镀铜的晶粒长大,同时多晶样品中的<110>晶向先通过孪晶变化关系而转变为<411>晶向,接着在减小表面能的驱动下,再转过6°变为<311>晶向,从而实现电镀铜样品从<110>织构到<311>织构的转变。
集成电路作为信息产业的基础和核心,已成为当前国际竞争的焦点和衡量一个国家综合国力的重要标志。国家科技重大专项《极大规模集成电路制造装备及成套工艺》于2009年启动,目前,在这一领域我国拥有的自主知识产权的材料与技术严重不足。本论文的工作集中研究的几种微电子材料的制备、表征与性能,对探索新型微电子材料在下一代集成电路中的应用,促进我国集成电路的发展,具有重要参考价值。
Driven by the need for faster and smaller electronic devices with higher performance, microelectronic industry is developing aggressively. The feature size of integrated circuit (IC) and the size of printed circuit board (PCB) used for interconnection of different circuits are scaling down, which makes a lot of traditional microelectronic materials and technologies face large challenges. Therefore, study and application of new materials and technologies are necessary to ensure the sustainable development of microelectronic industry.
Conventional gate dielectric of thermal SiO2 has reached the physical thickness limitation in the technology of complementary metal-oxide-semiconductor (CMOS). High dielectric constant (high-k) materials have been investigated intensively as a replacement for SiO2. Hafnium oxide (HfO2) has been attracted greatest attention among these high-k materials. However, HfO2 suffers from low crystallization temperature, mobility degradation, fixed charge and threshold voltage instability, etc., and the properties of HfO2 can be improved by adding different elements such as N, Si, Al, Ti, Zr, etc. Atomic layer deposition (ALD) and chemical vapor deposition (CVD), which are compatible with semiconductor industry, have become the most important techniques for high-k materials deposition. The carbon contaminations of metal organic precursors limit the further improvement of ALD and CVD films. In this thesis, Hf-Al-O and Hf-Zr-O mixed-metal oxides have been deposited by ALD and CVD techniques using carbon-free anhydrous nitrates precursors. The growth behavior, film composition and structure, thermal stability and electrical properties of the mixed-metal oxides have been studied systemically.
Flash memories are the dominant devices in current non-volatile memory (NVM) market. However, with the further development of microelectronic devices, flash memories, which are based on the traditional floating gate structure, have encountered serious challenge in scaling. As a result, novel charge trapping memories have been one of the candidates for next generation of flash memories. Conventional charge trapping memories, which are based on SONOS (silicon-oxide-nitride-oxide-silicon) structure, have the disadvantage of poor retention characteristics. Therefore, many semiconductor companies and institutes focus on novel charge trapping memories with improved structure to obtain faster programming/erasing speed, lower operation voltage and better retention property. In this thesis, we report the properties of a MANAS (Metal/Al2O3/SiNx/Al2O3/Si) charge trapping memory cell structure, in which both the tunnel and blocking layers are made of the high-quality Al2O3 deposited by the molecular atomic deposition (MAD) technique.
Recently, high density interconnection (HDI) and miniaturization have been major trends for PCB, in which via-holes are used to connect conductive layers. Build-up process has been a key technology for the fabrication of PCBs, and is toward more layers with smaller through-hole and higher aspect ratio of depth-diameter. Both the interlayer connection and the filling of via-holes are accomplished by copper electroplating, with increasing demands on performance. Therefore, understanding the microstructure of electroplated copper has drawn great attention, because of its tremendous impact on the reliability of PCBs. Furthermore, electroplated copper is demonstrated to undergo "self-annealing", which has a substantial effect on the microstructure, texture and the associated physical properties of electroplated copper. In this thesis, the microstructure of electroplated copper used in via-holes of PCBs was studied by several kinds of characterization methods. Self-annealing process was also investigated and the texture change during this process was discussed.
The main achievements made in this thesis are summarized as follows:
1. Volatile anhydrous hafnium nitrate (Hf(NO3)4) and mixed-metal nitrate of Hf/Zr (HfxZr1-x(NO3)4) precursors were synthesized successfully. Hf-Al-O films were deposited by ALD using Hf(NO3)4 and Al(CH3)3 (trimethyl aluminum, TMA) as metal precursors and H2O as oxidant. The film composition as well as electrical properties such as effective oxide thickness (EOT), flatband voltage, hysteresis and leakage current were changed linearly according to the different ratio of hafnia and alumina ALD cycles. The Hf/Zr composite nitrate can be taken as a solid solution of the individual Hf and Zr nitrates, and the Hf/Zr molar ratio in this precursor is 1.72:1. Hf-Zr-O films were deposited from Hf/Zr composite nitrate as a single-source precursor by ALD and CVD techniques, respectively. The Hf/Zr ratio in ALD deposited Hf-Zr-O films is 1:4, which is quite different from that in the precursor. Whereas, the Hf/Zr ratio in CVD deposited Hf-Zr-O films is nicely consistent with that in the precursor. It is supposed that different results of the films deposited from the same precursor by different techniques may be due to the different deposition principles and requirements of precursors for different techniques. Hf-Zr-O films deposited from by CVD indicate precise composition transfer from the precursor to deposited films. Therefore, Hf/Zr composite nitrate is one of the promising candidate precursors to deposit dual-metal oxide.
2. MANAS charge trapping memory cell was fabricated, in which both the tunnel and blocking layers were made of the nearly trap-less Al2O3 deposited by MAD technique (MAD_Al2O3). MAD_Al2O3 forms a good interface on Si with low density of interface traps, and has relatively high conduction band offset (3.9eV) and low valence band offset (2.1eV) on Si. MAD_Al2O3 also proves to have low density of bulk traps, which is evidenced by the little temperature dependence of J-V curves and their fit to the FN (Fowler-Nordheim) tunneling model, as well as hardly any noticeable SILC (stress induced leakage current). Due to these outstanding performances of MAD_Al2O3 tunnel and blocking layers, MANAS charge trapping memory cell achieves programming/erasing (P/E) using FN tunneling mechanism. A 6V erase window and a 5.6V programming window are obtained with a-12V/10ms erase pulse and a+12V/100μs programming pulse, respectively. With such a MANAS cell structure, we are able to reduce the operating voltages down to±11V to achieve P/E windows that would require more than±17V for state- of-the-art SONOS-type of NVM cells. The endurance characteristics of MANAS transistor cells show that the memory window remains wide open after 105 P/E cycles. The retention characteristics between 1 and 104 sec at room temperature up to 250℃indicate low decay rates, which are -0.24V/dec for programming after +10V/100μs pulse and +0.11V/dec for erasing after -10V/10ms pulse. Furthermore, a close-up view of the retention behavior between 10-4 and 1 sec after P/E operations shows very little initial charge loss.
3. Microstructure of electroplated copper in via-holes was characterized by EBSD (electron backscatter diffraction) and FIB (focused ion beam) techniques. Different behaviors of copper electroplated using different additives (labeled as A, B and C) after solder float test were compared as follows. Thin cracks appear at the corner of the hole for electroplated copper using additives A and B. The cracks propagate and end inside the copper, showing good resistance to thermal cycling. However, for electroplated copper using additive C, thick cracks propagate across the whole copper layer, indicating poor resistance to thermal cycling. Structure and texture change of electroplated copper during self-annealing process were tracked and characterized by X-ray diffraction (XRD) and EBSD techniques. Texture transformation from<110> to<311> was observed and could be illustrated as follows:The proprietary additives incorporated in the electroplating solution, the electroplating conditions and the substrate with relatively strong<110> orientation, led to the formation of a deposit in which the majority of grains were<110> oriented in the as-deposited copper foils; after "recovery" stage, grain growth occurred and<110> orientation firstly underwent a first order twinning to<411>, followed by a tilt of about 6°to reach <311>, driven by a reduction in surface energy.
As the basis and core of information industry, IC has become the focus of international competition and the measurement of a country's comprehensive national strength. National science and technology major project "ultra large scale integrated circuit manufacturing equipment and complete sets of process" has been launched in 2009. Currently, materials and technology with intellectual property rights are seriously scarce. Our work focuses on fabrication, characterization and properties for several kinds of microelectronic materials, which explores new materials in the next generation of IC microelectronics applications, and promotes the development of IC industry in China
集成电路的互补型金属-氧化物-半导体CMOS技术中,传统的SiO2栅介电材料已经逼近其厚度极限,寻找新型高介电常数的替代材料,是半导体工业迫在眉睫的任务。多种高介电栅介质候选材料得到广泛研究。其中,氧化铪(HfO2)已成为高介电栅介质的最有希望的竞选材料之一,是当前high-k材料研究的热点。然而,单一HfO2存在结晶温度较低、易在界面处形成低介电常数硅酸盐、载流子迁移率低等问题。人们通过在HfO2中掺入N、Si、Al、Ti、Zr等元素来提高其性能。与半导体工艺兼容的原子层沉积(ALD)和化学气相沉积(CVD)方法已成为制备high-k薄膜最主要的两种技术,有机前驱体带来的碳污染问题是限制ALD和CVD薄膜性能提高的重要因素。本文选取Hf-Al-O和Hf-Zr-O复合薄膜,以无水硝酸盐为前驱体,采用ALD和CVD方法制备了这两种复合薄膜,对其生长特性、薄膜成分与结构、热稳定性和电学性能等,进行了较为深入的研究。
快闪存储器是目前非挥发性存储器的主流器件。但随着器件尺寸的不断缩小,基于传统浮栅结构的快闪存储器在继续等比例缩小方面受阻,新型电荷俘获存储器成为下一代快闪存储器的有力竞争者。传统的电荷俘获型存储器以SONOS (Si/SiO2/Si3N4/SiO2/Si)结构为代表,但其较差的保持性能是制约其进一步发展的关键。因此,很多半导体公司和研究机构致力于对传统SONOS结构中的隧穿层、电荷俘获层、阻挡层等进行改进,以获得新型电荷俘获型存储器,使得其在具有较好的保持性能下,能有更快的编程／擦除速度和更低的操作电压。本文采用分子原子沉积(MAD)技术制备Al2O3薄膜,作为隧穿层和阻挡层,获得MANAS (Metal/Al2O3/SiNx/Al2O3/Si)新型电荷俘获型存储器,对存储器的存储与保持性能以及Al2O3薄膜的结构与电学性能进行了深入的分析研究。
随着微电子工业的不断发展,用于电路之间连接的印刷电路板也不断向高密度和小型化的方向发展。与微通孔技术相结合的积层多层板技术中,用于连接层间线路的通孔也变得越来越小,深径比越来越大,对填充于微通孔中电镀铜的性能要求也越来越高。由于微观结构对宏观性能的影响巨大,所以对电镀铜微观结构的研究也成为微电子工业关注的热点。此外,电镀铜在电镀完成后,于室温下会发生所谓“自退火”现象,对电镀铜的结构、取向以及宏观性能等产生了很大的影响,因此对电镀铜自退火现象的研究也深受关注。本文采用多种分析表征手段,对印刷电路板微通孔中的电镀铜微观结构进行了表征研究,同时追踪了电镀铜的自退火过程,并对此过程中晶粒取向的变化进行分析讨论。
本论文主要成果如下：
1.成功合成了具有良好挥发性且不含碳的无水硝酸铪和铪锆复合硝酸盐,以无水硝酸铪作为Hf源,以TMA为Al源、H20为氧源,用ALD方法制备了Hf-Al-O复合薄膜。改变薄膜中Hf的含量,薄膜的等效氧化物厚度、平带电压、电压回滞、漏电流等电学性能指标也随之线性变化。无水铪锆复合硝酸盐中的硝酸铪和硝酸锆主要以固溶体的形式存在,Hf/Zr组分比为1.72：1。采用此复合前驱体,分别用ALD和CVD方法成功沉积了Hf-Zr-O复合薄膜,并研究了薄膜的各项性能。其中,ALD方法制备的薄膜中Hf/Zr组分比约为1：4,与复合前驱体中的组分比差别较大;而CVD薄膜中Hf/Zr组分比与前驱体中的非常吻合。我们认为同一复合前驱体在不同沉积方法中的不同表现可能源于两种沉积技术不同的沉积原理以及对反应前驱体的不同要求。CVD方法制备Hf-Zr-O复合薄膜的结果表明无水铪锆复合硝酸盐是一种有效的沉积双金属氧化物的无机前驱体,其蒸气可以同时稳定地输运两种金属元素。
2.采用MAD方法生长trap-less的Al2O3 (MAD_Al2O3),取代SONOS结构中的隧穿层和阻挡层SiO2,制备出MANAS型电荷俘获存储器结构单元。MAD_Al2O3薄膜的电学和结构成分测试表明,薄膜与Si衬底之间具有平整的界面和低的界面态密度,以及相对较高的导带偏移量(3.9eV)和较低的价带偏移量(2.1eV),并且薄膜的J-V曲线与温度无关,几乎没有电场应力诱导漏电流的存在,可认为薄膜中没有电荷陷阱,电荷传输符合FN隧穿机制。由于隧穿层和阻挡层的优异性能,MANAS型存储器实现了FN隧穿机制的编程/擦除操作,经过+12V/100μs的编程脉冲即实现5.6V的编程窗口,-12V/10ms的擦除脉冲获得6V的擦除窗口,且没有擦除饱和现象。MANAS型存储器仅用±11V的操作电压就可以实现目前最先进SONOS型非挥发存储单元需要士17V才可以达到的编程/擦除窗口;并且经过105个编程/擦除循环后,存储窗口几乎没有什么变化,具有很好的耐久性能。此外,MANAS型存储器对数据具有优异的保持性能,在从室温到2500C的高温下,分别经过+10V/100μs的编程脉冲和-10V/10ms的擦除脉冲后,在1-104sec的时间范围内其衰退速率分别仅为-0.24V/dec和+0.11V/dec,并且在10-4_1 sec的短时间内也具有很好的保持特性。
3.采用背散射电子衍射(EBSD)和聚焦离子束(FIB)等方法,对用于微通孔的电镀铜进行了微观结构的表征,比较了使用不同添加剂A、B、C电镀的铜样品在经过浮焊测试后的不同表现：采用添加剂A和B的电镀铜样品在通孔拐角处出现了细小裂纹,且只在互连铜内延伸一小段即终止,表现出良好的抗高温性能;而采用添加剂C电镀的铜样品通孔中的化学镀铜和电镀铜出现很大的裂缝,贯穿整个电镀层,使镀层几乎被割裂开,表明其承受高温的能力较弱。采用X射线衍射(XRD)技术,追踪了一定条件下制备的电镀铜样品的自退火过程,并结合EBSD技术,对此过程中电镀铜的结构变化进行了表征。发现电镀铜样品经过自退火,发生了从<110>织构到<311>织构的转变。对这一转变的机制进行了仔细研究,并将此变化过程解释为：电镀液中的添加剂、电镀参数和<110>晶向为主的多晶衬底铜等因素综合作用,使得刚电镀完的多晶铜样品以<110>晶向为主；经过“自恢复”阶段后,电镀铜的晶粒长大,同时多晶样品中的<110>晶向先通过孪晶变化关系而转变为<411>晶向,接着在减小表面能的驱动下,再转过6°变为<311>晶向,从而实现电镀铜样品从<110>织构到<311>织构的转变。
集成电路作为信息产业的基础和核心,已成为当前国际竞争的焦点和衡量一个国家综合国力的重要标志。国家科技重大专项《极大规模集成电路制造装备及成套工艺》于2009年启动,目前,在这一领域我国拥有的自主知识产权的材料与技术严重不足。本论文的工作集中研究的几种微电子材料的制备、表征与性能,对探索新型微电子材料在下一代集成电路中的应用,促进我国集成电路的发展,具有重要参考价值。
Driven by the need for faster and smaller electronic devices with higher performance, microelectronic industry is developing aggressively. The feature size of integrated circuit (IC) and the size of printed circuit board (PCB) used for interconnection of different circuits are scaling down, which makes a lot of traditional microelectronic materials and technologies face large challenges. Therefore, study and application of new materials and technologies are necessary to ensure the sustainable development of microelectronic industry.
Conventional gate dielectric of thermal SiO2 has reached the physical thickness limitation in the technology of complementary metal-oxide-semiconductor (CMOS). High dielectric constant (high-k) materials have been investigated intensively as a replacement for SiO2. Hafnium oxide (HfO2) has been attracted greatest attention among these high-k materials. However, HfO2 suffers from low crystallization temperature, mobility degradation, fixed charge and threshold voltage instability, etc., and the properties of HfO2 can be improved by adding different elements such as N, Si, Al, Ti, Zr, etc. Atomic layer deposition (ALD) and chemical vapor deposition (CVD), which are compatible with semiconductor industry, have become the most important techniques for high-k materials deposition. The carbon contaminations of metal organic precursors limit the further improvement of ALD and CVD films. In this thesis, Hf-Al-O and Hf-Zr-O mixed-metal oxides have been deposited by ALD and CVD techniques using carbon-free anhydrous nitrates precursors. The growth behavior, film composition and structure, thermal stability and electrical properties of the mixed-metal oxides have been studied systemically.
Flash memories are the dominant devices in current non-volatile memory (NVM) market. However, with the further development of microelectronic devices, flash memories, which are based on the traditional floating gate structure, have encountered serious challenge in scaling. As a result, novel charge trapping memories have been one of the candidates for next generation of flash memories. Conventional charge trapping memories, which are based on SONOS (silicon-oxide-nitride-oxide-silicon) structure, have the disadvantage of poor retention characteristics. Therefore, many semiconductor companies and institutes focus on novel charge trapping memories with improved structure to obtain faster programming/erasing speed, lower operation voltage and better retention property. In this thesis, we report the properties of a MANAS (Metal/Al2O3/SiNx/Al2O3/Si) charge trapping memory cell structure, in which both the tunnel and blocking layers are made of the high-quality Al2O3 deposited by the molecular atomic deposition (MAD) technique.
Recently, high density interconnection (HDI) and miniaturization have been major trends for PCB, in which via-holes are used to connect conductive layers. Build-up process has been a key technology for the fabrication of PCBs, and is toward more layers with smaller through-hole and higher aspect ratio of depth-diameter. Both the interlayer connection and the filling of via-holes are accomplished by copper electroplating, with increasing demands on performance. Therefore, understanding the microstructure of electroplated copper has drawn great attention, because of its tremendous impact on the reliability of PCBs. Furthermore, electroplated copper is demonstrated to undergo "self-annealing", which has a substantial effect on the microstructure, texture and the associated physical properties of electroplated copper. In this thesis, the microstructure of electroplated copper used in via-holes of PCBs was studied by several kinds of characterization methods. Self-annealing process was also investigated and the texture change during this process was discussed.
The main achievements made in this thesis are summarized as follows:
1. Volatile anhydrous hafnium nitrate (Hf(NO3)4) and mixed-metal nitrate of Hf/Zr (HfxZr1-x(NO3)4) precursors were synthesized successfully. Hf-Al-O films were deposited by ALD using Hf(NO3)4 and Al(CH3)3 (trimethyl aluminum, TMA) as metal precursors and H2O as oxidant. The film composition as well as electrical properties such as effective oxide thickness (EOT), flatband voltage, hysteresis and leakage current were changed linearly according to the different ratio of hafnia and alumina ALD cycles. The Hf/Zr composite nitrate can be taken as a solid solution of the individual Hf and Zr nitrates, and the Hf/Zr molar ratio in this precursor is 1.72:1. Hf-Zr-O films were deposited from Hf/Zr composite nitrate as a single-source precursor by ALD and CVD techniques, respectively. The Hf/Zr ratio in ALD deposited Hf-Zr-O films is 1:4, which is quite different from that in the precursor. Whereas, the Hf/Zr ratio in CVD deposited Hf-Zr-O films is nicely consistent with that in the precursor. It is supposed that different results of the films deposited from the same precursor by different techniques may be due to the different deposition principles and requirements of precursors for different techniques. Hf-Zr-O films deposited from by CVD indicate precise composition transfer from the precursor to deposited films. Therefore, Hf/Zr composite nitrate is one of the promising candidate precursors to deposit dual-metal oxide.
2. MANAS charge trapping memory cell was fabricated, in which both the tunnel and blocking layers were made of the nearly trap-less Al2O3 deposited by MAD technique (MAD_Al2O3). MAD_Al2O3 forms a good interface on Si with low density of interface traps, and has relatively high conduction band offset (3.9eV) and low valence band offset (2.1eV) on Si. MAD_Al2O3 also proves to have low density of bulk traps, which is evidenced by the little temperature dependence of J-V curves and their fit to the FN (Fowler-Nordheim) tunneling model, as well as hardly any noticeable SILC (stress induced leakage current). Due to these outstanding performances of MAD_Al2O3 tunnel and blocking layers, MANAS charge trapping memory cell achieves programming/erasing (P/E) using FN tunneling mechanism. A 6V erase window and a 5.6V programming window are obtained with a-12V/10ms erase pulse and a+12V/100μs programming pulse, respectively. With such a MANAS cell structure, we are able to reduce the operating voltages down to±11V to achieve P/E windows that would require more than±17V for state- of-the-art SONOS-type of NVM cells. The endurance characteristics of MANAS transistor cells show that the memory window remains wide open after 105 P/E cycles. The retention characteristics between 1 and 104 sec at room temperature up to 250℃indicate low decay rates, which are -0.24V/dec for programming after +10V/100μs pulse and +0.11V/dec for erasing after -10V/10ms pulse. Furthermore, a close-up view of the retention behavior between 10-4 and 1 sec after P/E operations shows very little initial charge loss.
3. Microstructure of electroplated copper in via-holes was characterized by EBSD (electron backscatter diffraction) and FIB (focused ion beam) techniques. Different behaviors of copper electroplated using different additives (labeled as A, B and C) after solder float test were compared as follows. Thin cracks appear at the corner of the hole for electroplated copper using additives A and B. The cracks propagate and end inside the copper, showing good resistance to thermal cycling. However, for electroplated copper using additive C, thick cracks propagate across the whole copper layer, indicating poor resistance to thermal cycling. Structure and texture change of electroplated copper during self-annealing process were tracked and characterized by X-ray diffraction (XRD) and EBSD techniques. Texture transformation from<110> to<311> was observed and could be illustrated as follows:The proprietary additives incorporated in the electroplating solution, the electroplating conditions and the substrate with relatively strong<110> orientation, led to the formation of a deposit in which the majority of grains were<110> oriented in the as-deposited copper foils; after "recovery" stage, grain growth occurred and<110> orientation firstly underwent a first order twinning to<411>, followed by a tilt of about 6°to reach <311>, driven by a reduction in surface energy.
As the basis and core of information industry, IC has become the focus of international competition and the measurement of a country's comprehensive national strength. National science and technology major project "ultra large scale integrated circuit manufacturing equipment and complete sets of process" has been launched in 2009. Currently, materials and technology with intellectual property rights are seriously scarce. Our work focuses on fabrication, characterization and properties for several kinds of microelectronic materials, which explores new materials in the next generation of IC microelectronics applications, and promotes the development of IC industry in China
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