高介电薄膜材料的原子层沉积技术制备、表征及其在微电子领域的应用研究
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摘要
随着微电子行业的发展,集成度不断提高、器件尺寸持续减小,使得许多传统微电子材料与技术面临巨大挑战。
     原子层沉积(Atomic layer deposition, ALD)技术可以对膜厚进行精确控制,在深亚微米集成电路和纳米结构的制备上显示出巨大的应用前景。原子层沉积使用的反应前驱体需要满足特定的要求,目前ALD的前驱体还是相当缺乏的,因此发展适合微电子工业应用的金属有机源前驱体及其相关材料的生长工艺是当前ALD技术发展的一个重要方向。
     随着金属-氧化物-半导体场效应晶体管器件尺寸的按比例缩小,栅氧化介质层越来越薄,从而导致大隧穿电流与器件失效等问题,用高介电材料(high-K)替代传统的Si02栅介质成为最新微电子技术发展的亮点。为了突破器件微型化引起的性能下降,采用具有高迁移率的半导体材料替代Si成为制备高性能金属-氧化物-半导体场效应晶体管器件的又一个富有吸引力的解决方案。
     在非挥发性存储器中,浮栅型器件由于其具有快的操作速度、长的保持时间、低功耗、高可靠性等优势越来越受到关注。自1995年提出纳米晶存储器概念以来,纳米晶电荷俘获型存储器以其在器件缩小方面的优势成为研究热点。
     因此,本文关注于高介电薄膜材料的原子层沉积(ALD)技术制备、表征及其在微电子领域的应用,首先验证了南京大学国家“863"计划新材料MO源研究开发中心等合成的多种ALD金属有机前驱体的生长特性,研究了新型半导体材料GaAsi的表面预处理方法及ALD在其上沉积high-K材料的界面与电学特性,对采用ALD制备的HfO2/Hf-La-O (HLO)/Al2O3/Si的纳米晶存储器的结构和存储性能进行了表征。主要成果如下:
     1、采用南京大学MO源中心等合成的金属有机胺源前驱体Hf(NMeEt)4(或Hf(NMe2)4、 Zr(NMeEt)4、 La[N(SiMe3)2]3和Gd[N(SiMe3)2]3LD系统上分别沉积了Hf02、Zr02、La203和Gd203薄膜,验证了这些自制的金属有机源作为ALD前驱体的可行性。其中Hf(NMe2)4、 Hf(NMeEt)4和Zr(NMeEt)4源的工作温度较低,分别为75℃、120℃和110℃,ALD-工-作窗口分别为200-250℃,250-300℃和200-250℃,沉积速率约为0.9-l A/cycle,薄膜厚度与循环次数呈线性关系,薄膜在Si、GaAs和Ge上有优异的平整性,厚度-3-10nm的薄膜,粗糙度RMS值在0.2-0.5nm之间。在4英寸Si片上沉积的HfiO2薄膜,有较好的均匀性,标准偏差仅为1.4%。Gd[N(SiMe3)2]3和La[N(SiMe3)2]3源的工作温度较高,分别为175℃、173℃,沉积薄膜表面粗糙度相对较大,Gd203薄膜RMS为1.08nm,La203薄膜的RMS为1.45nm。后者与La源较高的沉积速率(2.6A/cycle)有关。
     2、采用化学溶液法-H28O4溶液、HCl溶液、HBr溶液和NH40H溶液对GaAs衬底进行表面清洗再S-钝化,通过比较不同预处理后的表面平整性、界面结构、电学性质可知:HBr溶液预处理方法得到的GaAs表面最为平整,RMS值为0.5nm,Al2O3/GaAs界面上含有较少的Ga和As的本征氧化物,显示明显改进的界面质量,生长的栅介质层具有最佳的综合电学性能:较高的积累态电容,较小的电容回滞,较小的漏电流密度。即用HBr溶液联合(NH4)2S溶液对GaAs衬底进行表面预处理是较好的选择。
     3、比较了S-钝化GaAs衬底不同ALD脉冲处理情况(未经前驱体脉冲处理、TMA脉冲处理、TMA+TDMAH脉冲处理)对GaAs/Al2O3/HfO2纳米叠层界面结构、组成和电学性质的影响。实验表明,TMA+TDMAH联合脉冲比单独的TMA脉冲处理,可以更有效地除去GaAs表面的本征氧化物,降低界面层厚度(仅为0.2nm),改善电学性能,这可以用配位体交换作用机制予以解释。在优化的TMA+TDMAH脉冲预处理工艺后,GaAs/lnm-Al2O3/2.8nm-HfO2/Pt样品展示出较好的电学性能,积累态电容为2.29μF/cm2,电容等效厚度(CET)为1.5nm。
     4,用ALD方法制备了以high-κ纳米晶作为存储介质的纳米晶存储器Hf02/HLO/Al2O3/Si,此堆垛结构700℃、800℃退火后中间HLO层形成了纳米晶颗粒,尺寸约为3nm,同时作为阻挡层的Hf02也已结晶。电学测试表明:存储窗口与所加电压成线性关系,不随频率变化。同700℃退火相比,800℃退火的样品展示了较大的存储窗口(±11V间扫描时存储窗口为9V)和相对较好的保持特性,这与高温退火产生了较多的体缺陷陷阱和较少的界面陷阱有关。存储在纳米晶中的电荷密度大约为2.5×1013/cm2。
With the aggressive development of the microelectronics industry, the feature size of integrated circuits (ICs) are scaling down constantly, which makes a lot of traditional microelectronic materials and technologies face enormous challenges.
     Atomic layer deposition (ALD) is a kind of modified chemical vapor deposition (CVD) technique suitable for manufacturing inorganic material layers with precision and simple thickness control down to a fraction of a monolayer for potential applications in fabrication of deep sub-micron ICs and nano-structures. The precursors which meet ALD requirements are very scarce at present, so the development of metalorganic precursors and related materials growth processing suitable for microelectronic industry is an important and urgent task in ALD technology.
     With continuous shrinking of metal-oxide-semiconductor field-effect transistor (MOSFET) devices, gate dielectric oxide gets more and more thinner, resulting in larger tunneling current and degraded performance. High dielectric constant (high-K) materials have been investigated intensively and extensively as a replacement of Sio2in Si-based ICs, is an attractive solution to breakthrough the performance limits caused by devices miniaturization. It is another promising approach to replace conventional Si with the high mobility semiconductor channel materials in order to obtain high performance MOSFET devices.
     Floating gate devices, as a kind of non-volatile memory, have drawn more and more attention because of its fast operation speed, long retention time, low cost, and high reliability. Since the concept of nanocrystal memory was proposed in1995, it has triggered tremendous research efforts due to its advantages in scaling down.
     This thesis focuses on the fabrication and characterization of ALD high-K materials for microelectronic field applications. Using home-made metal-organic precursors from Nanjing University "863" project MO source center etc., several kinds of high-K thin films have been prepared by ALD. GaAs surface passivation, interface structure, and electrical properties of ALD high-K materials were characterized deeply. The structure and storage performance of the Hfo2HLO/Alo3/Si stacking structure deposited by ALD were investigated. Main results are summarized as follows:
     1. Using Hf(NMeEt)4(or Hf (NMe2)4), Zr(NMeEt)4, La[N(SiMe3)2]3, and Gd[N (SiMe3)2]3as precursors from Nanjing University "863" project MO source center etc., HfO2, ZrO2, La2O3, and Gd2O3films were successfully deposited by ALD, verifying the feasibility of home-made ALD precursors. Hf(NMe2)4, Hf(NMeEt)4, and Zr(NMeEt)4sources have lower bubbler temperature of75°C,120°C and110°C with corresponding ALD window of200-250,250-300°C and200-250°C, respectively. Their deposition rate is about0.9-1A/cycle, and the film thickness is linear with the number of cycles. The films on Si, GaAs, and Ge substrates are extremely smooth with smaller surface roughness ranging from0.2-0.5nm (RMS) depending on the film thickness of3-10nm. HfO2films deposited on4-inch Si wafer show good thickness uniformity with standard deviation (1-o) of only1.4%. Gd[N(SiMe3)2J3and La[N(SiMe3)2]3have higher source temperature of175°C and173°C, respectively. They exhibit relatively larger surface roughness. The RMS value of Gd2O3and La2O3films are1.08nm and1.45nm, respectively. The larger roughness of La2O3is related to the high deposition rate (2.6A/cycle) of La source.
     2. The impact of chemical solution passivation on GaAs surface, interface structure, and electrical properties was studied carefully. Four kinds of H2SO4solution, HC1solution, HBr solution, and NH4OH solution were used to remove native oxides of GaAs and (NH4)2S solution as passivation agent. The experimental results reveal that the pretreatment of HBr+(NH4)2S solution can obtain smoothest surface of RMS value of0.5nm with less Ga and As native oxides at GaAs/Al2O3interface. The corresponding GaAs/Al2O3/Pt MOS structures exhibit the most excellent electrical properties such as higher accumulation capacitance, less capacitance hysteresis, and smaller leakage current density. The pretreatment of HBr combined with (NH4)2S solution is a better choice for GaAs surface passivation.
     3. The effect of various ALD pulses of TMA pulse and TMA+TDMAH pulse on S-passivated GaAs substrates, interface structure, composition, and electrical properties of GaAs/Al3/HfO2stacking films were compared carefully. The results indicate that the TMA+TDMAH pulse can more effectively remove the native oxide of GaAs surface than TMA pulse, reduce the interfacial layer thickness (only0.2nm), and improve the electrical properties. The mechanism can be explained by the ligand exchange interaction. With optimal TMA+TDMAH pulse pretreatment, sample GaAs/Inm-Al2O3/2.8nm-HfO2/Pt shows larger accumulation capacitance of2.29uF/cm2with the capacitance equivalent thickness (CET) of1.5nm.
     4. The stacking structure of HfO2/Hf-La-O(HLO)/Al2O3/Si as nanocrystal memory has been prepared by ALD. After700°C and800°C annealing, separated nanocrystals are formed in trapping layer of HLO with a size of about3nm, and the pure HfO2barrier layer is also crystallized. Electrical measurements show that the memory window is linear with applied voltage, and doesn't change with frequency. Compared with700°C annealed samples, the800°C annealed samples have larger memory window (9V when sweeping between±11V) and relatively better retention characteristics. It can be ascribed to more body defect traps and fewer interface traps in Hfo2/HLO/Alo3/Si after higher temperature annealing. The charge density of nanocrystals for800oC annealed samples is about2.5x1013/cm2.
引文
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