典型电子封装结构的热动力学分析与寿命预测
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摘要
随着电子封装技术向着高密度、高性能、小型化和低成本的方向发展,振动与热引起的可靠性问题日益成为人们研究的重点。本文以二级陶瓷柱状阵列封装组件为研究对象,研究了典型电子封装结构在振动与热循环载荷作用下的可靠性问题。
     主要工作包括:1)建立了振动与热传导的三维有限元模型,分析了结构在正弦激励与热循环载荷作用下的应力应变分布情况;2)根据高周疲劳损伤原理,结合本文正弦激励得到的模拟结果,拟合得到基于应力的寿命预测方程;3)基于累积损伤理论,预测了扫频振动载荷作用下的疲劳寿命,并同时验证了上述方程具有可行性与适用性;4)根据Coffin-Manson疲劳损伤原理和裂纹扩展理论,结合本文热循环载荷得到的模拟结果,拟合得到了基于应变能密度的疲劳寿命预测方程,并通过与诸多试验结果比较,证实了该热疲劳寿命预测模型的有效性。
     研究结果表明,电子封装结构中最危险的部位始终位于离电路板中心最远的焊点上;振动载荷作用时,最薄弱的环节位于危险焊点上离电路板较近的体积平均层上,且焊点内的应力与电路板的边界约束条件有关,靠近约束边界的焊点应力明显偏大,电路板的弯曲挠度与焊点内的应力存在一定的同步性质;在热循环载荷作用时,裂纹最早产生于危险焊点上离基板较近的体积平均层上;与电路板的厚度相比,基板的厚度及盖板的存在情况对焊点的热疲劳寿命影响较大。
     本文所得结论可为电子封装结构的设计工作提供重要理论参考。
With the more density, higher performance, downsizing and lower cost of the electronic packaging, the reliabilities of electronic packages induced by vibration and thermal conditions become the focus of people. This dissertation takes the board level packages of ceramic column grid array as study object and investigates the reliabilities of typical electronic packages under vibration and thermal cycle conditions.
     The work in the subject mainly include: 1) Built three dimensional finite element models of vibration and thermal cycle conditions, and analyzed the stress as well as strain distribution of structures under harmonic excitation and thermal cycle conditions individually; 2) Combined with the modeling results, the fatigue life prediction equation was developed by the principle of high cycle damage; 3) On the basis of accumulative damage theory, the fatigue life prediction of sweep frequency loading was predicted, which meanwhile validated the fatigue life equation fitted before; 4) Based the Coffin-Manson fatigue damage principle and crack growing theory, using the modeling results of the thermal cycle conditions, the thermal fatigue life prediction model was also predicted, and it was validated by comparing with several test data.
     The results show that the most dangerous location is always on the furthest solder joint from the center of the printed circuit board; When analyzing the vibration conditions, the weakest link is on the volume averaged layer beside the printed circuit board, and the stress in the solder is related to the boundary constraint conditions; The stresses in the solders near the constraint boundary are significantly larger and synchronous with the bending deflection; While dealing with the case of the thermal conditions, the weakest link tends into the volume averaged layer on the substrate side, which is differently from the conclusion from the vibration analysis; Besides, compared with the thickness of the printed circuit board, the thickness of the substrate and the presence of lid have more influence on the thermodynamics distribution, which then seriously affect on the thermal cycle fatigue life. The results from the finite element simulation have been validated to be applicable and reliable by comparing with the test data.
     The conclusions obtained may provide theoretical guidance for the designation of electronic packages.
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