摘要
CDMA终端芯片设计是CDMA技术应用领域中一个具有重要实际应用价值和广阔应用前景的研究课题。随着微电子技术的发展,集成电路设计进入了片上系统时代,这为CDMA移动通信系统设计提供了一个全新的技术手段。本文将基于CDMA技术,用大规模可编程逻辑器件对第三代移动通信CDMA2000 1X的扩频调制片上系统设计做了进一步的探讨和研究,并取得了一定的成果。
本文的研究分为以下几个部分。
本文的第一部分介绍了国际CDMA2000组织3GPP2规定的第三代移动通信系统CDMA2000 1X反向链路的协议标准,对CDMA通信系统进行了深入的了解。并用通信系统仿真软件Systemview进行了仿真。,
本文的第二部分认真的研究了CDMA2000 1X的反向链路的特点,设计反向链路的扩频调制片上系统方案。用硬件语言Verilog设计CDMA2000 1X的扩频调制片上系统的IP软核。其中包括扩频调制部分和一个8位的CPU设计。
接着本文给出了扩频调制片上系统的测试设计方案,并且给出了仿真波形。
根据片上系统的测试仿真结果表明,本文设计的片上系统设计方案是可行的。
The design of CDMA terminal chip is a very actual value and extensive application problem in the field of CDMA technology application.with the development of micro-electronics technology,the design of integrated circuit has stepped into the age of SOC( system on chip),which provide a brand-new method for CDMA communication system project.In this paper, A design of CDMA2000 1x spread modulation SOC has be researched with large scale Field Programmle Gate Array device,and make a certain results.
According to the structure of the paper,the research can be divided into three parts as follows.
The first part introduces the physical layer standard for CDMA 2000 1X reverse link spread spectrum systems,and presents the design and implementation of a simulation model for the CDMA2000 1x reverse link with the software systemview of the communications system simulation.
The second part studies the characteristics of CDMA2000 1x reverse link, and implements a softcore design of the cdma20001x RTL SOC with HDL(Hardwire Desciptionin Language) verilog in accordance with the IS-2000 specifications.the model include the softcore of a spread spectrum modulation and a simple 8-bit processor.as the same time simulate all the parts of the SOC softcore with software modesim.
The third part presents the design and implementation of the SOC test model with large scale FPGA device APEX20K100E ,and gives the whole SOC simulation waves .the results show the design of the SOC softcore is very effective and practicable.
引文
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