基于FPGA的相控阵波束形成设计与实现
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摘要
多普勒测速系统通过向水下发射和接收声波来测定舰船相对于海底或者水层的运动速度,相控阵技术的应用解决了多普勒测速系统设计中存在的声速补偿问题,提高了系统的测速精度,当设计中采用宽带发射信号时,系统能够具有更高的频率分辨率,但是宽带信号的采用也对系统的相控接收波束形成设计也提出了更高的要求。
     论文完成的主要工作有:完成了系统的硬件电路设计,对宽带信号相控接收波束形成的实现方法做了仿真并在FPGA上实现。硬件电路设计主要包含电源芯片选取,数据采集,数据存储,串行数据传输电路设计,以及主片DSP的程序加密设计。
     在相控阵信号接收波束形成算法实现的过程中,需要对接收信号做90度相移处理,以往采用模拟器件实现的方法只合适于处理单频信号的情况,当系统使用宽带信号测速时,论文提出使用希尔伯特滤波器实现移相操作,并给出了适合在FPGA上实现的相控接收波束形成框图。
     论文通过对希尔伯特滤波器不同阶数下移相特性的仿真,设计出合适的希尔伯特滤波器阶数,并对滤波器的移相效果做了分析,然后对所设计的波束形成过程做了仿真。根据设计的实现框图和系统数据吞吐量的要求,论文对在算法实现过程中将要涉及到的数字滤波模块和相关检测模块的程序结构、寻址方式设计做了详细的介绍。
     最后,论文在不同输入信号方式下,对所设计的FPGA程序进行片上测试,验证了程序的正确性。
The Doppler Velocity Measuring System measures the moving speed of the ship relative to the seabed or the water layer by sending or receiving sound wave in the water. The application of phased array technique has solved the problem of sound velocity compensation in the system design, which improves the system precision of velocity measurement. When broadband signal is used, the system could have a better frequency resolution, but this will also bring higher requirements for the design of received signal beam forming.
     This paper focuses on the following tasks:the system hardware circuit design, the simulation and implementation on the FPGA for the phased array beam forming of the received broadband signal. The hardware circuit design comprises the choosing of the power chip, the circuit design for the signal sampling, serial data transmission and data storage, and the encryption design for the master DSP.
     A ninety degrees'phase shift need to be added to the received signals for the phased array beam forming. Originally analog devices are used to shift the phase of the single frequency signals, when broadband signal is adopted in the system, Hilbert filter is used to shift the signal phase, and the framework of phased array beam forming is designed which can be easily implemented on the FPGA.
     The paper designs the appropriate rank of the Hilbert filter by simulating the phase shifting characteristic of filters with different ranks. The phase shifting precision is analyzed, and the whole beam forming process is also simulated. According to the system framework and the data throughput requirements, detailed introduction is given to the program structure and the addressing method of the filtering and correlation module.
     Finally, the designed FPGA program is tested on board using different input signals to verify the correctness of the program.
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