π/4-DQPSK基带差分解调技术研究及数据传输实现
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摘要
本课题对π/4-DQPSK的全数字调制解调技术进行研究,利用π/4-DQPSK数字调制和基带差分解调技术实现数字信号的传输,实现传输码率500kbps,调制中频2MHz。
π/4-DQPSK是QPSK改进方式,它是一种线性窄带数字调制技术,被广泛应用于移动通信和卫星通信中,其突出特点是频带利用率高、频谱特性好、抗衰落性能强、可进行非相干解调。
本文中介绍了π/4-DQPSK的调制解调原理,着重介绍了成形滤波器,位同步实现,并对调制解调的全过程进行Matlab仿真并用Verilog硬件描述语言设计实现各个模块。为验证模块的正确性,不但通过Quartus和ModelSim进行软件仿真,还设计制作了基于FPGA的PCB板,并完成了电路调试。通过对FPGA芯片下载运行编制的程序,验证了本π/4-DQPSK调制解调系统能正确工作,完成了预定的目标。
This project study the all-digital modulation and demodulation ofπ/4 offset differentially encoded quadrature phase shift keying (π/4-DQPSK). Then useπ/4-DQPSK digital modulation and baseband differential demodulation technology to implement digital signal transmission. The bite rate is 500Kb/s and the intermediate frequency is 2MHz.
π/4-DQPSK which is a modification of QPSK modulation. It is a linear narrowband technology which has been widely employed in mobile communication system, satellite communication system. It possesses features of high spectrum utilization ratio, better spectrum specification, stronger anti-fading performance and applicability to non-coherent detection.
The paper introduces the modulation and demodulation theory ofπ/4-DQPSK. Recommended pulse shaping filter and bit synchronization detailed. Then author use Matlab software to simulate the whole process of modulation and demodulation and use Verilog Hardware Description Language to design the module. To validate the correctness of each module, author use Quartus and ModelSim software to implement software simulation , designed the PCB board based on FPGA chip and finished circuit debug. Through download designed program to FPGA chip and run it ,the modulation and demodulation system ofπ/4-DQPSK proved to be run correctly and the target goal is completed.
π/4-DQPSK是QPSK改进方式,它是一种线性窄带数字调制技术,被广泛应用于移动通信和卫星通信中,其突出特点是频带利用率高、频谱特性好、抗衰落性能强、可进行非相干解调。
本文中介绍了π/4-DQPSK的调制解调原理,着重介绍了成形滤波器,位同步实现,并对调制解调的全过程进行Matlab仿真并用Verilog硬件描述语言设计实现各个模块。为验证模块的正确性,不但通过Quartus和ModelSim进行软件仿真,还设计制作了基于FPGA的PCB板,并完成了电路调试。通过对FPGA芯片下载运行编制的程序,验证了本π/4-DQPSK调制解调系统能正确工作,完成了预定的目标。
This project study the all-digital modulation and demodulation ofπ/4 offset differentially encoded quadrature phase shift keying (π/4-DQPSK). Then useπ/4-DQPSK digital modulation and baseband differential demodulation technology to implement digital signal transmission. The bite rate is 500Kb/s and the intermediate frequency is 2MHz.
π/4-DQPSK which is a modification of QPSK modulation. It is a linear narrowband technology which has been widely employed in mobile communication system, satellite communication system. It possesses features of high spectrum utilization ratio, better spectrum specification, stronger anti-fading performance and applicability to non-coherent detection.
The paper introduces the modulation and demodulation theory ofπ/4-DQPSK. Recommended pulse shaping filter and bit synchronization detailed. Then author use Matlab software to simulate the whole process of modulation and demodulation and use Verilog Hardware Description Language to design the module. To validate the correctness of each module, author use Quartus and ModelSim software to implement software simulation , designed the PCB board based on FPGA chip and finished circuit debug. Through download designed program to FPGA chip and run it ,the modulation and demodulation system ofπ/4-DQPSK proved to be run correctly and the target goal is completed.
引文
[1] 杨小牛,楼才义,徐建良.软件无线电原理与应用.电子工业出版社.2001
[2] 祁玉生.数字移动通信中的π/4-DQPSK 的基带差分解调.电信科学.1994 年第 10 卷第 8期.pp41-46
[3] 王秉钧,孙学军,王少勇,田宝玉 编著.现代通信系统原理.天津出版社,1999.208~247
[4] Hyuck M.Kwon,Ali Haghnegahdar. π/4-DQPSK SIGNALING WITH BASEBAND ZERO-CROSSING DEMODULATOR.IEEE.1997.pp.353-357
[5] 郑祖辉.数字集群移动通信系统.北京:电子工业出版社,2002.159~167
[6] 张俊业.数字集群中的π/4-DQPSK 调制技术.警察技术.2001 年第五期. pp.3-6
[7] 廖长清,卢建川,曾利.基于 TMS320C54x 实现π/4-DQPSK 调制.电讯技术.2002 年第 1期.pp.1-4
[8] Sandeep Chennakeshu,G.J.Saulnier. Differential detection of π/4-shifted-DQPSK for digital cellular radio. IEEE .1991.pp.186-191
[9] Leonard E.Miller, Jhong S.Lee.BER Expressions for Differentially Detected π/4-DQPSK Modulation.IEEE Transactions on communication,Vol.46, No.1,January 1998,pp.71-81
[10] Leonard E.Miller,Jhong S.Lee.New Closed-Form Expressions for Differentially Detected π/4-DQPSK System Performance in AWGN and Rayleigh Fading.IEEE,1994.pp.89
[11] 王军梅.无线语音通信系统中的 QPSK 调制解调:[硕士学位论文].四川:电子科技大学.2003
[12] 蒋娜.数字式π/4-DQPSK 调制解调研究与 FPGA 实现:[硕士学位论文].四川:电子科技大学.2005
[13] 廖红舒. π/4-DQPSK 调制解调算法设计及 DSP 实现:[硕士学位论文].四川:电子科技大学.2004
[14] 郭悌云.数字移动通信.北京:人民邮电出版社.1995,pp.197-211
[15] 丁龙,薛继红,邬国扬.一种数字化的π/4-DQPSK 差分检测方案.微波与卫星通信.1995 年第 3期.pp25-31
[16] J.Webber,N.Dahnoun.Implementing a π/4 shift D-QPSK baseband modem using the TMS320C50.ESIEE,Paris,September 1996.
[17] 张辉.现代通信原理与技术.西安电子科技大学出版社.2002
[18] 黄文梅,熊桂林,扬勇.信号分析与处理:MATLAB 语言及应用.国防科技大学出版社.2000.2
[19] F. M. Gardner, Interpolation in digital modems - Part-I: Fundamental. IEEE Trans. on Comm.1993.41(3), 502-508.
[20] Lars Erup, F.M. Gardner, Robert A. Harris, Interpolation in digital modems - Part-II: Implementation and Performance, IEEE Trans. on com. 1993.41(6). 998 - 1008.
[21] 刘莉琛.DVB-C 全数字 QAM 接收机定时同步模块设计及 Verilog 实现:[硕士学位论文].四川:电子科技大学.2004
[22] 张厥盛, 郑机禹 万方平,锁相技术[M]. 西安:西安电子科技大学出版社,1998
[23] Tho Le-Ngoc, Kamilo Feher, A Digital Approcah to Symbol Timing Recovery Systems, IEEE Trans. on Comm. 1980.12(28), 1993-1999.
[24] Kurt H.Mueller, Markus Muller, Timing Recovery in Digital Synchronous Data Receivers. IEEE Trans. on Comm. 1976.5(24), 516-531.
[25] F. M. Gardner, A BPSK/QPSK timing-error detector for sampled receivers. IEEE Trans. on Comm. 1986.COM-34 (3), 423 - 429.
[26] Moe Rahnema, Symbol TimingRecovery Algorithms and Their Evaluation for Burst Communication. International Journal of Wireless Information Network Vol. 5, No.4, 1998, 341 – 350.
[27] Oscar Agazzi, Chin-Pyng Jeremy Tzeng, David G.Messerschmitt,David A.Hodges, Timing Recovery in Digital Subscriber Loops, IEEE Trans. On Comm. 1985.6(33).558 – 569.
[28] Jeong Eun Lee,Seung Hee Choi,Beomsup Kim.Basedband clock recovery algorithm for π/4-qpsk modulated signals. Vehicular Technology Conference,1997 IEEE. Vol.3,47th ,4-7 May 1997 ,pp. 1729 -1733
[29] 于继洲.集成 A/D 和 D/A 转化器应用技术.北京:国防工业出版社.1989.1~61
[30] 夏路易,石宗义.电路原理图与电路板设计教程—Protel 99SE.北京希望电子出版社.2002
[31] 夏宇闻.Verilog 数字系统设计教程.北京航空航天大学出版社.2003.7
[32] 胡广书.数字信号处理-理论、算法与实现.清华大学出版社.1996
[2] 祁玉生.数字移动通信中的π/4-DQPSK 的基带差分解调.电信科学.1994 年第 10 卷第 8期.pp41-46
[3] 王秉钧,孙学军,王少勇,田宝玉 编著.现代通信系统原理.天津出版社,1999.208~247
[4] Hyuck M.Kwon,Ali Haghnegahdar. π/4-DQPSK SIGNALING WITH BASEBAND ZERO-CROSSING DEMODULATOR.IEEE.1997.pp.353-357
[5] 郑祖辉.数字集群移动通信系统.北京:电子工业出版社,2002.159~167
[6] 张俊业.数字集群中的π/4-DQPSK 调制技术.警察技术.2001 年第五期. pp.3-6
[7] 廖长清,卢建川,曾利.基于 TMS320C54x 实现π/4-DQPSK 调制.电讯技术.2002 年第 1期.pp.1-4
[8] Sandeep Chennakeshu,G.J.Saulnier. Differential detection of π/4-shifted-DQPSK for digital cellular radio. IEEE .1991.pp.186-191
[9] Leonard E.Miller, Jhong S.Lee.BER Expressions for Differentially Detected π/4-DQPSK Modulation.IEEE Transactions on communication,Vol.46, No.1,January 1998,pp.71-81
[10] Leonard E.Miller,Jhong S.Lee.New Closed-Form Expressions for Differentially Detected π/4-DQPSK System Performance in AWGN and Rayleigh Fading.IEEE,1994.pp.89
[11] 王军梅.无线语音通信系统中的 QPSK 调制解调:[硕士学位论文].四川:电子科技大学.2003
[12] 蒋娜.数字式π/4-DQPSK 调制解调研究与 FPGA 实现:[硕士学位论文].四川:电子科技大学.2005
[13] 廖红舒. π/4-DQPSK 调制解调算法设计及 DSP 实现:[硕士学位论文].四川:电子科技大学.2004
[14] 郭悌云.数字移动通信.北京:人民邮电出版社.1995,pp.197-211
[15] 丁龙,薛继红,邬国扬.一种数字化的π/4-DQPSK 差分检测方案.微波与卫星通信.1995 年第 3期.pp25-31
[16] J.Webber,N.Dahnoun.Implementing a π/4 shift D-QPSK baseband modem using the TMS320C50.ESIEE,Paris,September 1996.
[17] 张辉.现代通信原理与技术.西安电子科技大学出版社.2002
[18] 黄文梅,熊桂林,扬勇.信号分析与处理:MATLAB 语言及应用.国防科技大学出版社.2000.2
[19] F. M. Gardner, Interpolation in digital modems - Part-I: Fundamental. IEEE Trans. on Comm.1993.41(3), 502-508.
[20] Lars Erup, F.M. Gardner, Robert A. Harris, Interpolation in digital modems - Part-II: Implementation and Performance, IEEE Trans. on com. 1993.41(6). 998 - 1008.
[21] 刘莉琛.DVB-C 全数字 QAM 接收机定时同步模块设计及 Verilog 实现:[硕士学位论文].四川:电子科技大学.2004
[22] 张厥盛, 郑机禹 万方平,锁相技术[M]. 西安:西安电子科技大学出版社,1998
[23] Tho Le-Ngoc, Kamilo Feher, A Digital Approcah to Symbol Timing Recovery Systems, IEEE Trans. on Comm. 1980.12(28), 1993-1999.
[24] Kurt H.Mueller, Markus Muller, Timing Recovery in Digital Synchronous Data Receivers. IEEE Trans. on Comm. 1976.5(24), 516-531.
[25] F. M. Gardner, A BPSK/QPSK timing-error detector for sampled receivers. IEEE Trans. on Comm. 1986.COM-34 (3), 423 - 429.
[26] Moe Rahnema, Symbol TimingRecovery Algorithms and Their Evaluation for Burst Communication. International Journal of Wireless Information Network Vol. 5, No.4, 1998, 341 – 350.
[27] Oscar Agazzi, Chin-Pyng Jeremy Tzeng, David G.Messerschmitt,David A.Hodges, Timing Recovery in Digital Subscriber Loops, IEEE Trans. On Comm. 1985.6(33).558 – 569.
[28] Jeong Eun Lee,Seung Hee Choi,Beomsup Kim.Basedband clock recovery algorithm for π/4-qpsk modulated signals. Vehicular Technology Conference,1997 IEEE. Vol.3,47th ,4-7 May 1997 ,pp. 1729 -1733
[29] 于继洲.集成 A/D 和 D/A 转化器应用技术.北京:国防工业出版社.1989.1~61
[30] 夏路易,石宗义.电路原理图与电路板设计教程—Protel 99SE.北京希望电子出版社.2002
[31] 夏宇闻.Verilog 数字系统设计教程.北京航空航天大学出版社.2003.7
[32] 胡广书.数字信号处理-理论、算法与实现.清华大学出版社.1996