基于CMOS 0.18μm工艺的一种流水线模数转换器的设计
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摘要
随着技术的进步,大量的数字和模拟电路集成在一个芯片上,面积和功耗越来越受关注,因此设计一种基于标准CMOS工艺的高性能低功耗模数转换器(ADC)成为本论文的目标。
ADC在无线通信、图像处理、音频技术和工业控制的广泛运用,如集成传感感器系统,传感器产生较宽的信号电平范围。本文设计了一个9-bit浮点流水线模数转换,可应用于高性能大动态范围CMOS传感器。浮点的方法加大ADC的输入动态范围,从而节省了面积和功耗,本设计的动态范围达78dB。
本文对浮点流水线ADC的原理和电路进行了深入的研究,设计并实现了由可变增益放大器(实现3-bit指数位)和6-bit流水线ADC(实现6-bit尾数位)两个主要模块构成的9-bit的浮点流水线ADC。本文的研究意义在于该ADC在输出较少比特的情况下提高了它的动态范围。
本文详细的设计了9-bit浮点流水线ADC的每个组成部分。第二章中,在讨论了几种ADCs后详细的介绍了浮点流水线ADC的原理。第三章中,对运放、可变增益放大器、减法器、比较器等模拟电路单元进行了详细的设计。第四章中对各类基本数字电路、触发器、译码器、时钟产生器等进行了详细的设计。第五章中,详细的设计了用于可变增益放大器级和流水线级的子级3-bit闪速ADC、DAC。最后在第六章对整个电路进行了整合与仿真。
本设计是在CMOS 0.18μm工艺基础上设计实现的。
As the technology advances, large volume of circuitry including analogcircuits and digital circuits is included in one chip and it is more and more important ofareas and power consuming. So it is very critical to design a high performance Analogto Digital Converter (ADC) based on standard CMOS technology which is aim of thispaper.
ADCs are wide used in wireless communication, imaging process, audio, videotechnology and industrial control, such as integrated sensor systems. Also sensorsproduced a wide range of signal levels. This paper describes a 9-bit floating-pointpipelined ADC. It can be one block of high performance and favorable dynamic-rangeCMOS Sensor. The named ADC was designed to meet a large dynamic range of 78dBand the areas and power consuming are lesser.
This paper introduces the principle of floating-point pipelined ADC and provides adesign of 9-bit floating-point pipelined ADC composed of two main blocks which arevariable gain amplifier (VGA) block reaching 3-bit exponent and 6-bit pipelined ADCblock reaching 6-bit mantissa.
About this design, every necessary circuit was designed in detail. In chapter 2, aftercomparing several kinds of ADCs, the principle of floating-point pipelined ADC isintroduced. In chapter 3, analogy circuit analogy circuits such as high frequencyOp-Amp, low frequency Op-Amp, VGA, switched capacitor subtracter and comparatorare discussed and designed. In chapter 4, digital circuits such as every basic digitalcircuits, D flip-flop, encoder and clock generator are discussed and designed. In chapter5, 3-bit flash ADC and DAC circuits used in VGA block and pipeline block arediscussed and designed. Finally, in chapter 6, entire floating-point ADC was combinedand tested.
The ADC circuit was designed in 0.18μm COMS technology.
ADC在无线通信、图像处理、音频技术和工业控制的广泛运用,如集成传感感器系统,传感器产生较宽的信号电平范围。本文设计了一个9-bit浮点流水线模数转换,可应用于高性能大动态范围CMOS传感器。浮点的方法加大ADC的输入动态范围,从而节省了面积和功耗,本设计的动态范围达78dB。
本文对浮点流水线ADC的原理和电路进行了深入的研究,设计并实现了由可变增益放大器(实现3-bit指数位)和6-bit流水线ADC(实现6-bit尾数位)两个主要模块构成的9-bit的浮点流水线ADC。本文的研究意义在于该ADC在输出较少比特的情况下提高了它的动态范围。
本文详细的设计了9-bit浮点流水线ADC的每个组成部分。第二章中,在讨论了几种ADCs后详细的介绍了浮点流水线ADC的原理。第三章中,对运放、可变增益放大器、减法器、比较器等模拟电路单元进行了详细的设计。第四章中对各类基本数字电路、触发器、译码器、时钟产生器等进行了详细的设计。第五章中,详细的设计了用于可变增益放大器级和流水线级的子级3-bit闪速ADC、DAC。最后在第六章对整个电路进行了整合与仿真。
本设计是在CMOS 0.18μm工艺基础上设计实现的。
As the technology advances, large volume of circuitry including analogcircuits and digital circuits is included in one chip and it is more and more important ofareas and power consuming. So it is very critical to design a high performance Analogto Digital Converter (ADC) based on standard CMOS technology which is aim of thispaper.
ADCs are wide used in wireless communication, imaging process, audio, videotechnology and industrial control, such as integrated sensor systems. Also sensorsproduced a wide range of signal levels. This paper describes a 9-bit floating-pointpipelined ADC. It can be one block of high performance and favorable dynamic-rangeCMOS Sensor. The named ADC was designed to meet a large dynamic range of 78dBand the areas and power consuming are lesser.
This paper introduces the principle of floating-point pipelined ADC and provides adesign of 9-bit floating-point pipelined ADC composed of two main blocks which arevariable gain amplifier (VGA) block reaching 3-bit exponent and 6-bit pipelined ADCblock reaching 6-bit mantissa.
About this design, every necessary circuit was designed in detail. In chapter 2, aftercomparing several kinds of ADCs, the principle of floating-point pipelined ADC isintroduced. In chapter 3, analogy circuit analogy circuits such as high frequencyOp-Amp, low frequency Op-Amp, VGA, switched capacitor subtracter and comparatorare discussed and designed. In chapter 4, digital circuits such as every basic digitalcircuits, D flip-flop, encoder and clock generator are discussed and designed. In chapter5, 3-bit flash ADC and DAC circuits used in VGA block and pipeline block arediscussed and designed. Finally, in chapter 6, entire floating-point ADC was combinedand tested.
The ADC circuit was designed in 0.18μm COMS technology.
引文
[1]Walden,R.H.,"Analog-to-Digital Converter Survey and Analysis," Selected Areas in Communications,IEEE Journal,Apr.1999,Vol.17,pp.539-550
[2]K.M.Dougherty,"Analog to Digital Conversion,A practical Approach",New York,McGraw-Hill,1994
[3]B.Razavi著,陈贵灿,陈军,张睿智等译,《模拟CMOS集成电路设计》,西安:西安交通大学出版社,2003,pp.517-552
[4]F.Francesconi,F.Maloberti,"A Low Power Logarithmic A/D Converter",ISCAS'96,'Connecting the World',12-15 May 1996,Vol.1,pp.473-486
[5]D.Thompson,B.Wooley,"A 15-b Pipelined COMS Floating-Point A/D Converter",IEEE Journal of Solid-State Circuits,Feb.2001,Vol.36,No.2,pp.299-303
[6]C.Toumazou,J.B.Hughes,N.C.Battersby著,姚玉洁等译,《开关电流-数字工艺的模拟技术》,北京:高等教育出版社,1997
[7]P.E.Allen,D.R.Holberg著,冯军等译,《CMOS模拟电路设计》,北京:电子工业出版社,2005,pp.198-230;392-396;402-432;501-538
[8]Tapani,Eero Pajarre,Seppo Ingalsuo,Timo Husu,Ville Eerola,and Tapio Saramaki,"A Stereo Audio Sigma-Delta A/D-Converter," IEEE J.Solid-State Circuits,Dec.1994,vol.29,no.12,pp.1514-1523
[9]Conmac S.G.Conroy,"A High-Speed Parallel Pipeline A/D Converter Technique in CMOS," Memorandum No.UCB/ERL M94/9,Electronics Research Laboratory,U.C.Berkeley,February 1994,pp.119-132
[10]Yoshii Y,Asano K,Nakamura M,etal."An 8b 100MS/s flash ADC," ISSCC Dig.of Tech.Papers,San Francisco,CA:IEEE Solid-State Circuits Society,1984,pp.58-59
[11]K.J.McCall,M.J.Demler,and M.W.Plante,"A 6-bit 125 MHz CMOS A/D Converter,"in Proc.CICC,May 1992,pp.16.8.1-16.8.4
[12]Yiannos Manoli,"A Self-Calibration Method for Fast High-Resolution A/D and D/A converters," June 1989,vol.24,no.3,pp.603-608
[13]F.Chen and C.S.Chen,"A 20-b Dynamic Range Floating-Point Data Acquisition System",IEEE Trans.Ind.Electron.,Feb.1991,vol.38,pp.10-14
[14]D.F.Hoeschele,"Analog to Digital and Digital to Analog Conversion Techniques",New York,J.Wiley,Second Edition,1994
[15]M.Syrzycki,L.Carr,V.Ward,"CMOS Temperature Sensor with Frequency Output for Sensor Arrays",CCVLSI'93,Bannf,AB,Nov.14-16,1993
[16]Paavo J.Kosonen,"A Floating-point ADC with Variable Gain Pipeline Stages" Analog Integrated Circuits and Signal Processing,2003.vol.36.pp.259-261
[17]Bang-Sup Song,Seung-Hoon Lee,and Michael F.Tompsett,"A 10-b 15-MHz CMOS Recycling Two-Step A/D Converter," IEEE J.Solid-State Circuits,Dec.1990,vol.25,pp.1328-1338
[18]Andrew G.E Dingwall and Victor Zazzu,"An 8-MHz CMOS Subranging 8-Bit A/D Converter," IEEE J.Solid-State Circuits,Dec.1985,vol.SC-20,pp.1138-1143
[19]J.C.Maxwell,A Treatise on Electricity and Magnetism,London:Oxford University Press,1893;Lowe & Brydone Printers,Ltd.,London,1946
[20]K.Bult and G.J.G.M.Geelen,"A Fast-Settling CMOS Op-Amp for SC Circuits with 90-dB DC Gain," IEEE Journal of Solid State Circuits,December 1990Vol.25,pp.1379-1384
[21]B.Y.Kamath,R.G.Meyer and R R.Gray,"Relationship Between Frequency Response and Settling Time of Operational Amplifiers," IEEE Journal of Solid State Circuits,December 1974,vol.DC-9,pp.347-352
[22]R.J.Baker,Harry W.Li,David E.Boyce 著,陈中建等译,《CMOS电路设计布局与仿真》,北京:电子工业出版社,2006,pp.178-218;517-521;526-548
[23]Das M."Improve Design Criteria of Gain-Boosted CMOS OTA with High-Speed Optimizations," IEEE Transactions on Circuits and System-Ⅱ,2002,49(3):204-207
[24]H.Yoshizawa,Y.Huang,G C.Temes,"Improved SC Amplifiers with Low Sensitivity to OpAmp Imperfections",IEEE Electronics Letters,,Feb.27,1997,Vol.33,No.5,pp.348-349
[25]Sadaqhdar.M.,Iniewski.K.and Syrzycki.M.,"11-bit floating-point pipelined analog to digital converter in 0.18μm CMOS",IEEE Electrical and Computer Engineering.2004.Canadian Conference,May 2004,vol.3,pp1503-1506
[26]李桂宏,谢世健著,《集成电路设计宝典》,北京:电子工业出版社,2006,pp10-40
[27]A.Baschirotto,R.Castello,E Montecchi,"Exact Design of High Frequency SC Circuits with Low-Gain OpAmps",ISCAS'93,May 3-6,1993,Vol.2,pp.1014-1017
[28]N.Sugawa,T.Ikarashi,K.Kuwana,T.Kawakami,A.Kimitsuka,T.Iida,"CMOS Low Distortion Sample and Hold Circuit for Audio D/A Converter",IEEE Custom Integrated Circuits Conference,Proceedings of IEEE 1989,May 15-18,1989,pp.6.5/1-6.5/4
[29]R.Gregorian,K.W.Martin,G.c.Yemes,"Switched-capacitor Circuit Design," Proc,IEEE,Aug.1983,vol.71,no.8,pp.941-966
[30]A.Robertini,W.Guggenbuhl,"Modelling and Setting Times of Amplifiers in SC Circuits",Circuit,Devices and Systems,IEEE Proceedings-G,Feb.1992,vol.139,No.1,pp.131-135
[31]Stevens A.E.,Miller G.A."A high-swing integrator for switched-capacitor circuits,"IEEE J.Solid-State Circuits,1994,29(9):1379-1394
[32]X.Shi,H.Matsumoto.K.Mural,"Gain and offset compensated Non-Inverting SC Circuits",ISCAS 2000,Geneva,Switzerland,May 20-31,2000Vol.2,pp.425-428
[33]Jan M.Rabaey,Anantha Chandrakasan著,周润德等译,《数字集成电路改计》,北京:电子工业出版社,2006,PP.130-224;237-272
[34]Behzad Razavi and Bruce A.Wooley,"A 12-b 5-Msample/s Two-Step CMOS A/D Converter," IEEE J.Solid-State Circuits,no.12,Dec.1992,vol.27,pp.1667-1678
[35]Stephen H.Lewis and Paul R.Gray,"A Pipelined 5-Msample/s 9-bit Analog-to-Digital Converter," IEEE J.Solid-State Circuits,no.6,Dec.1987,vol.SC-22,pp.954-961
[36]T.B.Cho and E R.Gray,"A 10bit,20MAS/s,35roW pipeline A/D converter," in Proc,IEEE Custom Integated Circuits Conf.,May 1994,pp.23.1.2-23.2.4
[2]K.M.Dougherty,"Analog to Digital Conversion,A practical Approach",New York,McGraw-Hill,1994
[3]B.Razavi著,陈贵灿,陈军,张睿智等译,《模拟CMOS集成电路设计》,西安:西安交通大学出版社,2003,pp.517-552
[4]F.Francesconi,F.Maloberti,"A Low Power Logarithmic A/D Converter",ISCAS'96,'Connecting the World',12-15 May 1996,Vol.1,pp.473-486
[5]D.Thompson,B.Wooley,"A 15-b Pipelined COMS Floating-Point A/D Converter",IEEE Journal of Solid-State Circuits,Feb.2001,Vol.36,No.2,pp.299-303
[6]C.Toumazou,J.B.Hughes,N.C.Battersby著,姚玉洁等译,《开关电流-数字工艺的模拟技术》,北京:高等教育出版社,1997
[7]P.E.Allen,D.R.Holberg著,冯军等译,《CMOS模拟电路设计》,北京:电子工业出版社,2005,pp.198-230;392-396;402-432;501-538
[8]Tapani,Eero Pajarre,Seppo Ingalsuo,Timo Husu,Ville Eerola,and Tapio Saramaki,"A Stereo Audio Sigma-Delta A/D-Converter," IEEE J.Solid-State Circuits,Dec.1994,vol.29,no.12,pp.1514-1523
[9]Conmac S.G.Conroy,"A High-Speed Parallel Pipeline A/D Converter Technique in CMOS," Memorandum No.UCB/ERL M94/9,Electronics Research Laboratory,U.C.Berkeley,February 1994,pp.119-132
[10]Yoshii Y,Asano K,Nakamura M,etal."An 8b 100MS/s flash ADC," ISSCC Dig.of Tech.Papers,San Francisco,CA:IEEE Solid-State Circuits Society,1984,pp.58-59
[11]K.J.McCall,M.J.Demler,and M.W.Plante,"A 6-bit 125 MHz CMOS A/D Converter,"in Proc.CICC,May 1992,pp.16.8.1-16.8.4
[12]Yiannos Manoli,"A Self-Calibration Method for Fast High-Resolution A/D and D/A converters," June 1989,vol.24,no.3,pp.603-608
[13]F.Chen and C.S.Chen,"A 20-b Dynamic Range Floating-Point Data Acquisition System",IEEE Trans.Ind.Electron.,Feb.1991,vol.38,pp.10-14
[14]D.F.Hoeschele,"Analog to Digital and Digital to Analog Conversion Techniques",New York,J.Wiley,Second Edition,1994
[15]M.Syrzycki,L.Carr,V.Ward,"CMOS Temperature Sensor with Frequency Output for Sensor Arrays",CCVLSI'93,Bannf,AB,Nov.14-16,1993
[16]Paavo J.Kosonen,"A Floating-point ADC with Variable Gain Pipeline Stages" Analog Integrated Circuits and Signal Processing,2003.vol.36.pp.259-261
[17]Bang-Sup Song,Seung-Hoon Lee,and Michael F.Tompsett,"A 10-b 15-MHz CMOS Recycling Two-Step A/D Converter," IEEE J.Solid-State Circuits,Dec.1990,vol.25,pp.1328-1338
[18]Andrew G.E Dingwall and Victor Zazzu,"An 8-MHz CMOS Subranging 8-Bit A/D Converter," IEEE J.Solid-State Circuits,Dec.1985,vol.SC-20,pp.1138-1143
[19]J.C.Maxwell,A Treatise on Electricity and Magnetism,London:Oxford University Press,1893;Lowe & Brydone Printers,Ltd.,London,1946
[20]K.Bult and G.J.G.M.Geelen,"A Fast-Settling CMOS Op-Amp for SC Circuits with 90-dB DC Gain," IEEE Journal of Solid State Circuits,December 1990Vol.25,pp.1379-1384
[21]B.Y.Kamath,R.G.Meyer and R R.Gray,"Relationship Between Frequency Response and Settling Time of Operational Amplifiers," IEEE Journal of Solid State Circuits,December 1974,vol.DC-9,pp.347-352
[22]R.J.Baker,Harry W.Li,David E.Boyce 著,陈中建等译,《CMOS电路设计布局与仿真》,北京:电子工业出版社,2006,pp.178-218;517-521;526-548
[23]Das M."Improve Design Criteria of Gain-Boosted CMOS OTA with High-Speed Optimizations," IEEE Transactions on Circuits and System-Ⅱ,2002,49(3):204-207
[24]H.Yoshizawa,Y.Huang,G C.Temes,"Improved SC Amplifiers with Low Sensitivity to OpAmp Imperfections",IEEE Electronics Letters,,Feb.27,1997,Vol.33,No.5,pp.348-349
[25]Sadaqhdar.M.,Iniewski.K.and Syrzycki.M.,"11-bit floating-point pipelined analog to digital converter in 0.18μm CMOS",IEEE Electrical and Computer Engineering.2004.Canadian Conference,May 2004,vol.3,pp1503-1506
[26]李桂宏,谢世健著,《集成电路设计宝典》,北京:电子工业出版社,2006,pp10-40
[27]A.Baschirotto,R.Castello,E Montecchi,"Exact Design of High Frequency SC Circuits with Low-Gain OpAmps",ISCAS'93,May 3-6,1993,Vol.2,pp.1014-1017
[28]N.Sugawa,T.Ikarashi,K.Kuwana,T.Kawakami,A.Kimitsuka,T.Iida,"CMOS Low Distortion Sample and Hold Circuit for Audio D/A Converter",IEEE Custom Integrated Circuits Conference,Proceedings of IEEE 1989,May 15-18,1989,pp.6.5/1-6.5/4
[29]R.Gregorian,K.W.Martin,G.c.Yemes,"Switched-capacitor Circuit Design," Proc,IEEE,Aug.1983,vol.71,no.8,pp.941-966
[30]A.Robertini,W.Guggenbuhl,"Modelling and Setting Times of Amplifiers in SC Circuits",Circuit,Devices and Systems,IEEE Proceedings-G,Feb.1992,vol.139,No.1,pp.131-135
[31]Stevens A.E.,Miller G.A."A high-swing integrator for switched-capacitor circuits,"IEEE J.Solid-State Circuits,1994,29(9):1379-1394
[32]X.Shi,H.Matsumoto.K.Mural,"Gain and offset compensated Non-Inverting SC Circuits",ISCAS 2000,Geneva,Switzerland,May 20-31,2000Vol.2,pp.425-428
[33]Jan M.Rabaey,Anantha Chandrakasan著,周润德等译,《数字集成电路改计》,北京:电子工业出版社,2006,PP.130-224;237-272
[34]Behzad Razavi and Bruce A.Wooley,"A 12-b 5-Msample/s Two-Step CMOS A/D Converter," IEEE J.Solid-State Circuits,no.12,Dec.1992,vol.27,pp.1667-1678
[35]Stephen H.Lewis and Paul R.Gray,"A Pipelined 5-Msample/s 9-bit Analog-to-Digital Converter," IEEE J.Solid-State Circuits,no.6,Dec.1987,vol.SC-22,pp.954-961
[36]T.B.Cho and E R.Gray,"A 10bit,20MAS/s,35roW pipeline A/D converter," in Proc,IEEE Custom Integated Circuits Conf.,May 1994,pp.23.1.2-23.2.4