面向可重构系统的资源管理与软/硬件划分研究
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摘要
随着大规模高性能可编程逻辑器件的出现以及电子设计自动化技术的不断完善,可重构计算成为系统结构领域的研究热点之一。作为一种全新的体系结构,可重构计算兼具牛的灵活性和硬件的高性能。然而传统的操作系统并不支持可重构系统的应用需求,如对可重构资源进行抽象和管理以及软硬件任务统一模型表示等功能,因此面向可重构系统的操作系统的研究还面临很多问题亟待解决。
本文重点研究了可重构资源管理、任务的调度与重构配置以及软硬件划分等问题,并给出了相应的解决方案,为可重构操作系统的研究提供理论依据。本文的主要研究内容包括：
1、针对空闲可重构资源的管理问题,提出一种基于图论技术的FPGA资源管理方法。该方法以矩形表示硬件任务形状,以二维区域模型为研究对象,将无向图与FPGA区域模型有机结合起来,分析出二者之间的映射关系,从而利用虚拟无向图计算最大空闲矩形集。该方法将寻找最大空闲矩形问题转化为求解有效回路和通路问题,使空闲区域划分过程大大简化。仿真结果验证了算法的可行性。
2、针对动态部分重构带来的重构延时问题,研究在任务调度时减少重构配置开销方法。由于配置预取策略是加速和隐藏配置过程对应用执行时间影响的有效方法,又考虑到系统中包含多个硬件任务。因此基于预配置思想,以有向无环图的任务模型为研究对象,提出按照任务调度顺序建立任务配置预取队列的解决方案,该方案能够保证合理的配置顺序,达到配置与计算的统一。
3、研究任务调度问题。调度算法是评价软硬件任务划分方案的标准,面向可重构系统的任务调度需要考虑硬件任务的重构延时和并发执行等特性,提出一种采用预配置策略的链式调度算法。该算法给出基于关键路径与任务工作量的调度优先级计算方法,通过合理调度,使得计算与配置尽可能在时间上重叠,达到减少配置开销以及提高系统应用执行时间的目的,仿真结果表明了调度算法的有效性。
4、为了实现将应用映射到可重构系统之中,本文重点研究可重构系统的软硬件划分问题。提出基于混沌优化算法的软硬件划分算法,该算法用DAG图描述应用,并对包括配置时间参数在内的任务信息进行了定义,结合混沌优化理论实现了面向可重构系统的软硬件划分,并对划分结果的评价使用了基于优先级链式调度算法。
针对混沌优化算法存在的局限性,进一步提出基于最大熵原理与混沌优化动态融合的软硬件划分算法,该算法引入时间熵概念并运用最大熵原理,将系统时间熵作为搜索最优解的第二判据,实现对劣解的选择性接受机制。此外,针对二次载波不完整问题,提出位跳变方法,采用对优化变量只改变某一位取值的方法,以扩大算法搜索范围。算法性能对比实验结果表明,与原有算法相比,在算法搜索能力和全局收敛速度方面均有所改善。
As the emergence of large scale high performance programmable logic devices and the improvement of electronic design automation technology, reconfigurable computing has become an active research area of system architecture. Reconfigurable computing(RC) takes advantages of high performance by performing computation on hardware, and flexibility by software solution. However, traditional operating systems rarely support the application demands of reconfigurable computing system; such demands are how to abstract and manage the reconfigurable computation resources and how to provide a unified software/hardware programming model for any tasks. Therefore, research on operating system of RC still faces many problems to be solved.
This dissertation focuses on reconfigurable resource management, task scheduling, reconfiguration, partitioning algorithms of software/hardware, and the other issues. The dissertation mainly consists of the following several parts of contr(?)ution.
(1) A graph-based FPGA resource management method is proposed to solve the problem of free reconfigurable resource. The hardware tasks are expressed as rectangles. Two-dimensional model is applied as research object. Undirected graph and FPGA regional model are combined in and organized way. With the analysis of the mapping relation between undirected graph and FPGA regional model, the maximum set of empty rectangles is computed from the virtual undirected graph. The problem of finding maximum empty rectangles is transform into the problem of finding the available loop and pathway in virtual undirected graph, which simplifies the partitioning process of free region very much. Simulation results showed feasibility of the proposed algorithm.
(2) The method of how to reduce reconfigurable disposition overhead is studied in this dissertation aiming to decrease the time delay introduced by dynamic partial reconfiguration process. Configuration prefetching strategy is an efficient way to accelerate or hide reconfiguration process by overlapping the execution time of configuration and applications. And there are hardware tasks which are running concurrently in a computing system. Considering of the idea of configuration prefetching, a solution that constructs configuration prefetching queue according to the order of tasks scheduling is proposed. The solution, which is oriented the DAG-based task model, makes the configuration tasks execute in optimal order, so that the configuration tasks are taken into account to the demand of computation tasks.
(3) A chained scheduling algorithm with pre-configuration is proposed. Task scheduling algorithm is a standard evaluation of software/hardware task partitioning scheme. Task scheduling algorithm oriented reconfigurable system needs to consider the reconfiguration delay and concurrent execution of tasks. In order to reduce configuration overhead and accelerate system execution, the computation tasks and configuration tasks are overlapped as much as possible by task scheduling based on critical path and computation overhead. Simulation results showed the effectiveness of the proposed scheduling algorithm.
(4) Software/hardware partitioning algorithm is proposed based on Chaos optimization algorithm. In order to map the applications to the reconfigurable system, DAG map is used to describe the applications, and chaotic optimization theory is introduced. The results of partitioning process are evaluated by the priority chained scheduling algorithm.
Software/hardware partitioning algorithm based on dynamic combination of maximum entropy and Chaos optimization is propose to overcome the limitations of the former algorithm. The concept of time entropy is introduced and the maximum entropy theory is applied. Time entropy is regarded as the second criterion in the search process of the optimization solution. The mechanism of selective acceptance of inferior solutions is described. In addition, bit reverse method is proposed for second carrier incomplete. Only one bit of optimized variable is reversed to expand the search space of the algorithm. Simulation results showed that the search capability and global convergence of the proposed algorithm were better than the original algorithm.
本文重点研究了可重构资源管理、任务的调度与重构配置以及软硬件划分等问题,并给出了相应的解决方案,为可重构操作系统的研究提供理论依据。本文的主要研究内容包括：
1、针对空闲可重构资源的管理问题,提出一种基于图论技术的FPGA资源管理方法。该方法以矩形表示硬件任务形状,以二维区域模型为研究对象,将无向图与FPGA区域模型有机结合起来,分析出二者之间的映射关系,从而利用虚拟无向图计算最大空闲矩形集。该方法将寻找最大空闲矩形问题转化为求解有效回路和通路问题,使空闲区域划分过程大大简化。仿真结果验证了算法的可行性。
2、针对动态部分重构带来的重构延时问题,研究在任务调度时减少重构配置开销方法。由于配置预取策略是加速和隐藏配置过程对应用执行时间影响的有效方法,又考虑到系统中包含多个硬件任务。因此基于预配置思想,以有向无环图的任务模型为研究对象,提出按照任务调度顺序建立任务配置预取队列的解决方案,该方案能够保证合理的配置顺序,达到配置与计算的统一。
3、研究任务调度问题。调度算法是评价软硬件任务划分方案的标准,面向可重构系统的任务调度需要考虑硬件任务的重构延时和并发执行等特性,提出一种采用预配置策略的链式调度算法。该算法给出基于关键路径与任务工作量的调度优先级计算方法,通过合理调度,使得计算与配置尽可能在时间上重叠,达到减少配置开销以及提高系统应用执行时间的目的,仿真结果表明了调度算法的有效性。
4、为了实现将应用映射到可重构系统之中,本文重点研究可重构系统的软硬件划分问题。提出基于混沌优化算法的软硬件划分算法,该算法用DAG图描述应用,并对包括配置时间参数在内的任务信息进行了定义,结合混沌优化理论实现了面向可重构系统的软硬件划分,并对划分结果的评价使用了基于优先级链式调度算法。
针对混沌优化算法存在的局限性,进一步提出基于最大熵原理与混沌优化动态融合的软硬件划分算法,该算法引入时间熵概念并运用最大熵原理,将系统时间熵作为搜索最优解的第二判据,实现对劣解的选择性接受机制。此外,针对二次载波不完整问题,提出位跳变方法,采用对优化变量只改变某一位取值的方法,以扩大算法搜索范围。算法性能对比实验结果表明,与原有算法相比,在算法搜索能力和全局收敛速度方面均有所改善。
As the emergence of large scale high performance programmable logic devices and the improvement of electronic design automation technology, reconfigurable computing has become an active research area of system architecture. Reconfigurable computing(RC) takes advantages of high performance by performing computation on hardware, and flexibility by software solution. However, traditional operating systems rarely support the application demands of reconfigurable computing system; such demands are how to abstract and manage the reconfigurable computation resources and how to provide a unified software/hardware programming model for any tasks. Therefore, research on operating system of RC still faces many problems to be solved.
This dissertation focuses on reconfigurable resource management, task scheduling, reconfiguration, partitioning algorithms of software/hardware, and the other issues. The dissertation mainly consists of the following several parts of contr(?)ution.
(1) A graph-based FPGA resource management method is proposed to solve the problem of free reconfigurable resource. The hardware tasks are expressed as rectangles. Two-dimensional model is applied as research object. Undirected graph and FPGA regional model are combined in and organized way. With the analysis of the mapping relation between undirected graph and FPGA regional model, the maximum set of empty rectangles is computed from the virtual undirected graph. The problem of finding maximum empty rectangles is transform into the problem of finding the available loop and pathway in virtual undirected graph, which simplifies the partitioning process of free region very much. Simulation results showed feasibility of the proposed algorithm.
(2) The method of how to reduce reconfigurable disposition overhead is studied in this dissertation aiming to decrease the time delay introduced by dynamic partial reconfiguration process. Configuration prefetching strategy is an efficient way to accelerate or hide reconfiguration process by overlapping the execution time of configuration and applications. And there are hardware tasks which are running concurrently in a computing system. Considering of the idea of configuration prefetching, a solution that constructs configuration prefetching queue according to the order of tasks scheduling is proposed. The solution, which is oriented the DAG-based task model, makes the configuration tasks execute in optimal order, so that the configuration tasks are taken into account to the demand of computation tasks.
(3) A chained scheduling algorithm with pre-configuration is proposed. Task scheduling algorithm is a standard evaluation of software/hardware task partitioning scheme. Task scheduling algorithm oriented reconfigurable system needs to consider the reconfiguration delay and concurrent execution of tasks. In order to reduce configuration overhead and accelerate system execution, the computation tasks and configuration tasks are overlapped as much as possible by task scheduling based on critical path and computation overhead. Simulation results showed the effectiveness of the proposed scheduling algorithm.
(4) Software/hardware partitioning algorithm is proposed based on Chaos optimization algorithm. In order to map the applications to the reconfigurable system, DAG map is used to describe the applications, and chaotic optimization theory is introduced. The results of partitioning process are evaluated by the priority chained scheduling algorithm.
Software/hardware partitioning algorithm based on dynamic combination of maximum entropy and Chaos optimization is propose to overcome the limitations of the former algorithm. The concept of time entropy is introduced and the maximum entropy theory is applied. Time entropy is regarded as the second criterion in the search process of the optimization solution. The mechanism of selective acceptance of inferior solutions is described. In addition, bit reverse method is proposed for second carrier incomplete. Only one bit of optimized variable is reversed to expand the search space of the algorithm. Simulation results showed that the search capability and global convergence of the proposed algorithm were better than the original algorithm.
引文
[1]Compton K. Reconfigurable Computing:A Survey of Systems and Software. ACM Computing Surveys.2002,34(2):171-210P
[2]J.Villasenor, W.H.Mangione-Smith.Configurable ComPuting. Scientific American. 1997, (11):23-27P
[3]K.Bondalapati, V.K. Prasanna. Reconfigurable Computing Systems. Proc. of the IEEE.2002,90(7):1201-1217P
[4]R.Moseley. Transcending static deployment of circuits:Dynamic run-time systems and mobile hardware processors for FPGAs:[Ph D dissertation]. Canterbury, Kent,United Kingdom:University of Kent at Canterbury.2002:56-88P
[5]G.Brebner. Applying hardware/software co-design to systems-on-a-chip. WESCON/98, Anaheim, CA, USA,1998:22-28P
[6]G.Brebner. The swappable logic unit:a paradigm for virtual hardware. FPGAs for Custom Computing Machines,1997.Proceedings, The 5th Annual IEEE Symposium on, Napa Valley, CA,USA,1997:77-86P
[7]N.Shirazi, W.Luk and P.Y.K. Cheung. Automating production of run-time reconfigurable designs. FPGAs for Custom Computing Machines, 1998.Proceedings.IEEE Symposium on, Napa Valley, CA, USA,1998:147-156P
[8]D.Davis, M.Barr, T.Bennett, et al. A Java Development and Runtime Environment for Reconfigurable Computing. In Workshop on Parallel and Distributed Proeessing, Orlando, Florida,1998:34-45P
[9]M.Ullmann, M.Huebner, B.Grimm and J.Becker. An FPGA run-time system for dynamical on-demand reconfiguration. Parallel and distributed Processing Symposium,2004.Proceedings.18th International,Anaheim,CA,USA,2004:135P
[10]D.Andrews, D.Niehaus, R Jidin, et al. Programming models for hybrid FPGA-CPU computational components:a missing link. IEEE Micro.2004,24(4):42-53P
[11]H.Walder, M.Platzner. Reconfigurable hardware operating systems:from design concepts to realizations. Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Architectures, Anaheim,CA,USA,2003: 284-287P
[12]Vuletic M, Pozzi L, Ienne P.Seamless hardware-software integration in Reconfigurable computing systems. IEEE Design&Test of Computers.2005,22(2):102-113P
[13]Wigley G, Kearne D. The first real operating system for reconfigurable computers. In 6th A.In:Proceedings of the Australiasian Computer Science Week(ACSAC), Gold Coast,Qld.,Australia,2001:130-137P
[14]Nollet V, Coene P, Verkest D et al. Designing an operating system for a heterogeneous reconfigurable. SoC//Proceedings of the 17th International Parallel and Distributed Processing Symposium. New York:IEEE Press,2003:174P
[15]T.Marescuax, A.Bartic, D.Verkest, et al. Interconnection Networks Enbale Fine-Grain Dynamic Multi-Tasking on FPGAs. In:Proceedings of the Proc.Int'l Conf.Field-Programmable Logic and Applications(FPL), New York,2002:795—805P
[16]J.Y.Mignolet, S.Vernalde, et al. Enabling Hardware-Software multitasking on a Reconfigurable Computing Platform for Networked Portable Multimedia Appliances. In:Proceedings of the Proc.Int'l Conf.Eng.of Reconfigurable Systems and Algorithms(ERSA), New York,2002:116-122P
[17]周博,王石记,邱卫东等SHUM-UCOS:基于统一多任务模型可重构系统的实时操作系统.计算机学报.2006,29(2)：208-218页
[18]乔磊,齐骥,龚育昌.一种支持可重构混成系统的操作系统设计与实现.计算机学报.2009,32(5)：1046-1054页
[19]D.Micheli,K.Gupta. Hardware/Software Co-Design. Proc.of the IEEE.1997, 85(3):349-365P
[20]W.Wolf. A Decade of Hardware/Software Codesign.EEEE Computer Society,2003,36(4):38-43P
[21]J.Noguera,R.M.Badia. Run-time HW/SW codesign for discrete event systems using dynamically reconfigurable architectures.ISSS'OO.Washiton,DC,USA,2000:124-126P
[22]J.Noguera,R.M.Badia.Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures.CODES'02,Washiton,DC,USA,2002:205-21 OP
[23]J.T.Sousa,J.M.Silva,M.Abramovici.A configware/software approach to SAT solving. Proc.of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines(FCCM'01),Anaheim,CA,USA,2001:16-19P
[24]K.B.Chehida,M.Auguin.A software/configware codesign methodology for control dominated applications.Proc.of the 16th International Conf.On Application-Specific Systems,Architecture and Processors.Washiton,DC,USA,2005:25-28P
[25]张鲁峰,李思昆,刘功杰.嵌入式系统软硬件划分方法研究.计算机应 用.2000,20(12)：221-223页
[26]M.Kaul,R.Vemuri.Temporal partitioning combined with design space exploration for latency minimization of run-time reconfigured designs.Proc.of the Design,Automation and Test in Europe and Exhibition 1999,New York,DC,USA,1999:202-209P
[27]K.S.Chatha,R.Vemuri.An iterative algorithm for hardware-software partitioning, hardware design space exploration and scheduling.Design Automation for Embedded Systems.2000,5(3-4):281-293P
[28]J.Henkel,T.Benner,R.Ernst. COSYMA:a software-oriented approach to hardware/software codesign. Journal of computer&software engineering.1994,2(3): 293-314P
[29]B.Miramond,J.M.Delosme. Design space exploration for dynamically reconfigurable architectures.DATE'05,Washiton,DC,USA,2005,366-371P
[30]H.Liu,D.F.Wong.Circuit partitioning for dynamically reconfigurable FPGAs. FPGA'99, Monterey,C A,US A,1999,187-194P
[31]陈国良,王煦法,庄镇泉等.遗传算法及其应用.北京：人民邮电出版社,1996：32-54页
[32]邹谊,庄镇泉,杨俊安.基于遗传算法的嵌入式系统软硬件划分算法.中国科学技术大学学报.2004,34(6)：724-731页
[33]J.Resano, D.Mozos, et al. A Reconfiguration Manager for Dynamically Reconfigurable Hardware. IEEE Design&Test,2005,22(5):452-460P
[34]Li Zhiyuan, Scott H.Configuration prefetching technigues for partial reconfigurable coprocessor with relocation and defragmentation//IEEE/ACM Int'1 Symp on FPGA, California,2002:187-195P
[35]梁樑,周学功,王颖等.采用预配置策略的可重构混合任务调度算法.计算机辅助设计与图形学学报.2007,19(5)：635-641页
[36]齐骥,李曦等.基于硬件任务顶点的可重构系统资源管理算法.电子学报.2006,34(11)：2094-2098页
[37]K.Bazargan,M.Sarrafzadeh.Fast online placement for reconfigurable computing systems.IEEE Symposium of Field Programmable Custom Computing Machines,Napa valley,CA,USA,1999:300-302P
[38]K.Bazargan,R.Kastner,M.Sarrafzadeh.Fast template placement for reconfigurable computing systems.IEEE Design and Test of Computers.2000,17(1):68-83P
[39]M.Koester,M.Porrmann,H.Kalte.Task placement for heterogeneous reconfigurable architectures.ICFPT,Singapore,2005:43-50P
[40]H.Kalte,D.Langen,E-Vonnahme,et al.Dynamically reconfigurable system-on-programmable-chip.Proc.of the 10th Euromicro Workshop on Parallel,Distributed and Network-based Processing(PDP'02),Canary Islands,Spain,2002:235-242P
[41]H.Kalte,M.Porrmann,U.Ruckert.Systme-on-programmable-chip approach enabling online fine-grained 1D-placement.Proc.of the 11st Reconfigurable Architectures Workshop(RAW 2004),Santa Fe,New Mexio,USA,2004:120-124P
[42]黄万伟,汪斌强等.面向区分服务的可重构任务在线调度算法.计算机辅助设计与图形学学报,2010,22(4)：717-723页
[43]H.Walder,C.Steiger,M.Platzner.Fast Online Task Placement on FPGAs:Free Space Partitioning and 2D hashing.International Parallel and Distributed Processing Symposium(IPDPS'03),US A,2003:120-127P
[44]M.Handa,R.Vemuri.An Efficient Algorithm for Finding Empty Space for Online FPGA Placement.Proceedings of the 41th Design Automation Conference, New York,2004: 960-965P
[45]A.Ahmadinia,C.Bobda,T.Jurgen.A New Approach for On-line Placement on Reconfigurable Devices.Proc.of the International Parallel and Distributed Processing Symposium(IPDPS'04),USA,2004:134P
[46]A.Ahmadinia,C.Bobda,S.P.Fekete,et al.Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices. IEEE Trans. Compute,2007,56(5):673-680P
[47]A.Ahmadinia,C.Bobda.A Dynamic Scheduling and Placement Algorithm for Reconfigurable Hardware.ARCS 2004,68(4):125-139P
[48]齐骥,李曦等.一种面向动态可重构计算的调度算法.计算机研究与发展,2007,44(8)：1439～1447页
[49]Wigley G, Kearney D. The management of applications for reconfigurable computing using an operating system. In:Proceedings of the Seventh Asia-Pacific Conference on Computer Systems Architecture, Australia,2002:73-81P
[50]H. Walder and M. Platzner. Non-Preemptive Multitasking on FPGAs:Task Placement and Footprint Transform.Proceedings of the International Conference Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, NV, USA,2002:24-30P
[51]Handa M, Vemuri R. Area fragmentation in reconfigurable operating systems. In: Engineering of Reconfigurable Systems and Algorithms,USA,2004:77-83P
[52]Walder H, Steiger C, Platzner M, et al. Online scheduling and placement of real-time tasks to partially reconfigurable devices.In:Real-Time Systems Symposium, USA,2003:,224-225P
[53]P. Merino, M. Jacome, and J.C. Lopez. A Methodology for Task Based Partitioning and Scheduling of Dynamically Reconfigurable Systems.Proc of the IEEE Symposium on FPGAs for Custom Computing Machines, Napa Valley, USA,1998:324-325P
[54]Jin Cui, Qingxu Deng, Xiuqiang He and Zonghua Gu. An efficient algorithm for online management of 2D area of partially reconfigurable FPGAs.Proceedings of the conference on Design, automation and test, Nice,France,2007:129-134P
[55]B. Chazelle. The Bottom-Left Bin-packing Heuristic:An Efficient Implementation. IEEE Trans.Computers,1983,32(8):697-707P
[56]A. Ahmadinia, C. Bobda, and J. Teic. Temporal Task Clustering for Online Placement on Reconfigurable Hardware.Proceedings of the IEEE International Conference on Field-Programmable Technology,Tokyo, Japan,2003:359-362P
[57]J. Cui, Z. Gu, W. Liu, and Q. Deng. An Efficient Algorithm for Online Soft Real-Time Task Placement onReconfigurable Hardware Devices.Proceedings of the 10th IEEE International Symposium on Objectand Component-Oriented Real-Time Distributed Computing, Santorini Island, Greece,2007:321-328P
[58]M. Tomono, M. Nakanishi, S. Yamashita, K. Nakajima, and K. Watanabe. A New Approach to OnlineFPGA Placement.Proceeding of 40th Information Science and Systems (CISS), Princeton, NJ, USA,2006:145-150P
[59]Liang Liang, Xuegong Zhou, Ying Wang, Chenglian Peng. Online Hybrid Task Scheduling inReconfigurable Systems.11th International Conference on Computer Supported Cooperative Work inDesign, Melbourne, Australia,2007:1072-1077P
[60]Y. Lu, T. Marconi, G. N. Gaydadjiev, K.L.M. Bertels, R. J. Meeuws. A Self-adaptive on-line Task Placement Algorithm for Partially Reconfigurable Systems.Proceedings of the 22nd Annual International Parallel & Distributed Processing Symposium (IPDPS 2008), Miami, Florida, USA,2008:1-8P
[61]T. Marconi, Y. Lu, K.L.M. Bertels, et al.3D Compaction:a Novel Blocking-aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable Devices.Proceedings of the International Symposium on Applied Reconfigurable Computing (ARC), Bangkok, Thailand,2010:194-206P
[62]M. Sabeghi, V.M. Sima, K.L.M. Bertels. Compiler Assisted Runtime Task Scheduling on a ReconfigurableComputer.19th International Conference on Field Programmable Logic and Applications (FPL09)Prague,2009:44-50P
[63]周学功,梁樑,黄勋章,彭澄廉.可重构系统中的实时任务在线调度与放置算法.计算机学报,2007,30(11)：1901-1909页
[64]Hinkelmann.H, Gunberg.A, Zipf.P, et al.Multitasking Support for Dynamically Reconfigurable Systems.Field Programmable Logic and applications. 2006,38(5):.1-6P
[65]Miaoqing Huang, Harald Simmler, Proshanta Saha, and Tarek El-Ghazawi. Hardware Task Scheduling Optimizations for Reconfigurable Computing.Proceedings of the Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA'08), Austin, Texas,USA,2008:1-10P
[66]Miaoqing Huang, Harald Simmler, Olivier Serres, and Tarek El-Ghazawi. RDMS:A Hardware TaskScheduling Algorithm for Reconfigurable Computing.Proceedings of the 16th ReconfigurableArchitectures Workshop (RAW 2009), Rome, Italy,2009:1-8P
[67]Tabero J, Steptien J, Mecha H., et al. Task placement heuristic based on 3D-adjacency and look-ahead in reconfigurable systems.11th Asia and South Pacific Design Automation Conference 2006, Yokohama, IEEE Circuits and Systems Society ACM SIGDA,2006:169-174P
[68]Tabero, J. Steptien, H. Mecha, et al. A vertex -list approach to 2D HW multitasking management in RTR FPGAs. DCIS 2003, Cludad Real, Spain,2003:110-114P
[69]李涛,杨愚鲁.可重构资源管理及硬件任务布局的算法研究.计算机研究与发展,2008,45(2)：375-382页
[70]张先迪,李正良.图论及其应用.北京：高等教育出版社,2005：46-52页
[71]付志红,俞集辉,苏向丰.引入方向因子的最小回路、最大回路搜索算法.重庆大学学报：自然科学版,2002,25(3)：64-67页
[72]龚育昌,齐骥.一种支持动态可重构系统的布局碎片量化方法.小型微型计算机系统,2007,28(5)：944-947页
[73]Wolf W, Jerraya A A, Martin G. Multiprocessor system-on-chip (MPSoC) technology. IEEE Trans, on Computer Aided Design of Integrated Circuits and Systems,2008, 27(10):1701-1713P
[74]Hartenstein R.A decade of reconfigurable computing:a visionary retrospective. Proceedings Design,Automation and Test in Europe(DATE'01),USA,2001:642-649P
[75]Compton K,Hauck S.Reconfigurable computing:a survey of systems and software.ACM Computing Surveys,2002,34(2):171-210P
[76]李涛,杨愚鲁等.基于遗传算法的可重构系统软硬件划分.计算机工程与应用,2007,43(26)：56-58页
[77]Lavagno L, La Rosa A and Passerone C.A Software Development Tool Chain for a Reconfigurable Processor.In Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, USA,2001:93—98P
[78]Guo Z, Buyukkurt B, Najjar W, et al.Optimized Generation of Data-path from C Codes for FPGAs.In Proceedings of Design, Automation and Test in Europe,USA,2005:112-117P
[79]Li Y, Callallan T, Damell E, et al.Hardware-software co-design of embedded Reconfigurable architectures.Design Automation Conference,NY,USA,2000:507-512P
[80]Amin F,Mehdi K,Sied M F.HW/SW Partitioning Using Discrete Particle Swarm.In:Proc of the 17th ACM Great Lakes symposium,San Francisco, 2007:359-364P
[81]Zou Y,Zhuang Z,Chen H.HW/SW partitioning based on genetic algorithm,In:Proc of Evolutionary Computation,Landon,2004,628-633P
[82]Petru E. System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search.Design Automation for Embedded Systems,1997,2(1):5-32P
[83]Qiang W,Jinian B.Hong X,Applying search space smoothing technique to hardware/software partitioning:Experiments and analysis.In:Proc 5th International Conference,Beijing,2003,85-88P
[84]熊志辉,李恩昆,陈吉华.遗传算法与蚂蚁算法动态融合的软硬件划分.软件学报,2005,16(4)：21-25页
[85]李晖,姚放吾.基于免疫算法的嵌入式系统软硬件划分方法.计算机工程与设计,2006,27(22)：45-50页
[86]Youness H, Hassan M, Sakannshi K, et al. A high performance algorithm for scheduling and hardware-software partitioning on MPSoCs.Proc. of International Conference on Design and Technology of Integrated Systems in Nanoscale Era,Cairo,2009:71-76P
[87]沈英哲,周学海.一种用于可重构计算系统的软硬件划分算法.中国科学技术大学学报,2009,39(2)：182-188页
[88]马宏星,周学海等.可重构计算平台上软硬件任务划分与调度算法.系统工程与电子技术,2010,32(11)：2459-2464页
[89]Wolf W. Middleware architectures for distributed embedded systems.Proc. of International Symposium on Object Oriented Real-Time Distributed Computing, Orlando,FL,2008:377-380P
[90]Mei B,Schaumont P,Vernalde S.A hardware/software partitioning and scheduling algorithm for dynamically reconfigurable embedded systems.Proceedings of ProRISC,US A,2000:110-112P
[91]Miramond B,Delosme J M.Design space exploration for dynamically reconfigurable architectures.Proceedings Design,Automation and Test in Europe(DATE'05),USA, 2005:366-371P
[92]孙迎红,童元满,王志英.基于自适应滤波和模式识别的功耗攻击技术.通讯与计算机,2007,4(2)：47-50页
[93]李树均.数字化混沌密码的分析与设计.西安：西安交通大学博士学位论文,2003：30-39页
[94]丁源源.混沌及其保密通信技术研究.武汉：武汉理工大学硕士学位论文,2004：25-36页
[95]李金屏,何苗,刘明军等.提高BP小波神经网络收敛速度的研究.模式识别与人工智能,2002,15(1)：28-35页
[96]史奎凡,董吉文,李金屏等.正交遗传算法.电子学报,2002,30(10)：1501-1504页
[97]李金屏,李素,杨波.基于小生境算法和聚类分析的快速收敛遗传算法.小型微型计算机系统,2004,25(6)：975-978页
[98]Wang L, Smith K. On chaotic simulated annealing.IEEE Trans on Neural Networks,2004,9(4):716-718P
[99]郭建青,李彦,王洪胜等.利用混沌优化算法确定河流水质模型参数.水利发电学报,2004,23(4)：92-96页
[100]张维,吴强等.搜索空间平滑技术在软硬件划分中的应用.计算机工程与应用,2010,46(12)：72-78页
[101]Dittmann F. Applying single processor algorithms to schedule tasks on reconfigurable devices respecting reconfiguration times.Proceedings of 20th International Parallel and Distributed Processing Symposium,Washington,2006:4P
[102]Danne K, Platzner M. Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware.Proceedings of 20th International Parallel and Distributed Processing Symposium,Washington,2006:8P
[103]Li Zhiyuan, Hauck Scott.Configuration compression for Virtex FPGAs.Proceedings of the 9th Annual IEEE Symposium on Field-Programmable for Custom Computing Machines,Rohnert Park, California,2001:22-36P
[104]Li Zhiyuan, Hauck Scott.Configuration prefetching techniques for partial reconfigurable coprocessor with relocation and defragmentation.Proceedings of IEEE/ACM International Symposium on Field-Programmable Gate Arrays, Monterey,California,2002:187-195P
[105]Ghiasi Soheil, Nahapetian Ani, Sarrafzadeh Majid.An optimal algorithm for minimizing run-time reconfiguration delay.ACM Transactions on Embedded Computing Systems,2004,3(2):237-256P
[106]Gupta R.K.DE, Micheli G.D. System-Level synthesis using re-programmable components. In:Hugo DM, Herman B,eds. Proc. of the European Conf.on Design Automation (EDAC),Brussels,1992:2-7P
[107]Kastner R. Synthesis techniques and optimizations for reconfigurable systems [Ph.D.Thesis]. Los Angeles:University of California,2002:18-24P
[108]Ernst R., Henkel J., Benner T.(Rolf Ernst, Jorg Henkel, Thomas Benner) Hardware-Software co-synthesis for microcontrollers. IEEE Design & Test of Computers,1993,10(4):64-75P
[109]Zhang L.F. Research on techniques of hardware/software co-synthesis and virtual microprocessor [Ph.D.Thesis]. Changsha:National University of Defense Technology, 2002 (in Chinese with English abstract):16-22P
[110]D. Saha, A. Basu, R. S. Mitra.Hardware software partitioning using genetic algorithm. In:Agrawal V, Mahabala HN,eds.Proc.of the 10th Int'l Conf.on VLSI Design, Hyderabad,1997:155-160P
[111]Guo X.D., Liu J.R., Wen H. A method for hardware/software partitioning using genetic algorithm. Journal of Computer-Aided Design&Computer Graphics,2001,13(1): 24-27P
[112]Peng Z., Kuchcinski K. An algorithm for partitioning of application specific systems. In:Courtois B, eds. Proc. of the European Conf.on Design Automation(EDAC), Paris, 1993:316-321P
[113]Else P., Peng Z, Kuchcinski K, Doboli A. System level hardware/software partitioning based on simulated annealing and tabu search. Design Automation of Embedded Systems,1997,2 (1):5-32P
[114]张煜东,吴乐南等.基于自适应蚁群算法的软硬件划分.控制与决策,2009,24(3)：1385—1389页
[115]邵岁锋,张英杰.基于免疫粒子群的嵌入式系统软硬件划分方法.计算机应用,2010,30(2)：479—482页
[116]李亚芳,李章维.一种基于信息熵的自适应遗传算法.浙江工业大学学报,2007,35(6)：666—670页
[117]肖菁,李亮平.基于信息熵调整的自适应蚁群算法.计算机工程与设计,2010,31(22)：4873—4876页
[118]姜毅,乐庆玲.基于信息熵的粒子群优化算法.微型电脑应用,2008,24(5)：31—33页
[119]裴胜玉,周永权等.信息熵协进化粒子群算法.计算机工程与应用,2011,47(3)：225—228页
[120]李鹤龄.信息熵、波尔兹曼熵以及克劳修斯熵之间的关系.大学物理,2004,23(12)：37—40页
[121]Shannon C. The Mathematical Theory of Communication.BSTJ,1948,5(1):5-10P
[122]Jaynes E T. Information theory and statistical mechanics.Physical Review,1957,106(4): 620-630P
[123]崔畅,赵强.改进的混沌优化算法的研究.科学技术与工程,2007,7(3)：307—309页
[2]J.Villasenor, W.H.Mangione-Smith.Configurable ComPuting. Scientific American. 1997, (11):23-27P
[3]K.Bondalapati, V.K. Prasanna. Reconfigurable Computing Systems. Proc. of the IEEE.2002,90(7):1201-1217P
[4]R.Moseley. Transcending static deployment of circuits:Dynamic run-time systems and mobile hardware processors for FPGAs:[Ph D dissertation]. Canterbury, Kent,United Kingdom:University of Kent at Canterbury.2002:56-88P
[5]G.Brebner. Applying hardware/software co-design to systems-on-a-chip. WESCON/98, Anaheim, CA, USA,1998:22-28P
[6]G.Brebner. The swappable logic unit:a paradigm for virtual hardware. FPGAs for Custom Computing Machines,1997.Proceedings, The 5th Annual IEEE Symposium on, Napa Valley, CA,USA,1997:77-86P
[7]N.Shirazi, W.Luk and P.Y.K. Cheung. Automating production of run-time reconfigurable designs. FPGAs for Custom Computing Machines, 1998.Proceedings.IEEE Symposium on, Napa Valley, CA, USA,1998:147-156P
[8]D.Davis, M.Barr, T.Bennett, et al. A Java Development and Runtime Environment for Reconfigurable Computing. In Workshop on Parallel and Distributed Proeessing, Orlando, Florida,1998:34-45P
[9]M.Ullmann, M.Huebner, B.Grimm and J.Becker. An FPGA run-time system for dynamical on-demand reconfiguration. Parallel and distributed Processing Symposium,2004.Proceedings.18th International,Anaheim,CA,USA,2004:135P
[10]D.Andrews, D.Niehaus, R Jidin, et al. Programming models for hybrid FPGA-CPU computational components:a missing link. IEEE Micro.2004,24(4):42-53P
[11]H.Walder, M.Platzner. Reconfigurable hardware operating systems:from design concepts to realizations. Proceedings of the 3rd International Conference on Engineering of Reconfigurable Systems and Architectures, Anaheim,CA,USA,2003: 284-287P
[12]Vuletic M, Pozzi L, Ienne P.Seamless hardware-software integration in Reconfigurable computing systems. IEEE Design&Test of Computers.2005,22(2):102-113P
[13]Wigley G, Kearne D. The first real operating system for reconfigurable computers. In 6th A.In:Proceedings of the Australiasian Computer Science Week(ACSAC), Gold Coast,Qld.,Australia,2001:130-137P
[14]Nollet V, Coene P, Verkest D et al. Designing an operating system for a heterogeneous reconfigurable. SoC//Proceedings of the 17th International Parallel and Distributed Processing Symposium. New York:IEEE Press,2003:174P
[15]T.Marescuax, A.Bartic, D.Verkest, et al. Interconnection Networks Enbale Fine-Grain Dynamic Multi-Tasking on FPGAs. In:Proceedings of the Proc.Int'l Conf.Field-Programmable Logic and Applications(FPL), New York,2002:795—805P
[16]J.Y.Mignolet, S.Vernalde, et al. Enabling Hardware-Software multitasking on a Reconfigurable Computing Platform for Networked Portable Multimedia Appliances. In:Proceedings of the Proc.Int'l Conf.Eng.of Reconfigurable Systems and Algorithms(ERSA), New York,2002:116-122P
[17]周博,王石记,邱卫东等SHUM-UCOS:基于统一多任务模型可重构系统的实时操作系统.计算机学报.2006,29(2)：208-218页
[18]乔磊,齐骥,龚育昌.一种支持可重构混成系统的操作系统设计与实现.计算机学报.2009,32(5)：1046-1054页
[19]D.Micheli,K.Gupta. Hardware/Software Co-Design. Proc.of the IEEE.1997, 85(3):349-365P
[20]W.Wolf. A Decade of Hardware/Software Codesign.EEEE Computer Society,2003,36(4):38-43P
[21]J.Noguera,R.M.Badia. Run-time HW/SW codesign for discrete event systems using dynamically reconfigurable architectures.ISSS'OO.Washiton,DC,USA,2000:124-126P
[22]J.Noguera,R.M.Badia.Dynamic run-time HW/SW scheduling techniques for reconfigurable architectures.CODES'02,Washiton,DC,USA,2002:205-21 OP
[23]J.T.Sousa,J.M.Silva,M.Abramovici.A configware/software approach to SAT solving. Proc.of the 9th Annual IEEE Symposium on Field-Programmable Custom Computing Machines(FCCM'01),Anaheim,CA,USA,2001:16-19P
[24]K.B.Chehida,M.Auguin.A software/configware codesign methodology for control dominated applications.Proc.of the 16th International Conf.On Application-Specific Systems,Architecture and Processors.Washiton,DC,USA,2005:25-28P
[25]张鲁峰,李思昆,刘功杰.嵌入式系统软硬件划分方法研究.计算机应 用.2000,20(12)：221-223页
[26]M.Kaul,R.Vemuri.Temporal partitioning combined with design space exploration for latency minimization of run-time reconfigured designs.Proc.of the Design,Automation and Test in Europe and Exhibition 1999,New York,DC,USA,1999:202-209P
[27]K.S.Chatha,R.Vemuri.An iterative algorithm for hardware-software partitioning, hardware design space exploration and scheduling.Design Automation for Embedded Systems.2000,5(3-4):281-293P
[28]J.Henkel,T.Benner,R.Ernst. COSYMA:a software-oriented approach to hardware/software codesign. Journal of computer&software engineering.1994,2(3): 293-314P
[29]B.Miramond,J.M.Delosme. Design space exploration for dynamically reconfigurable architectures.DATE'05,Washiton,DC,USA,2005,366-371P
[30]H.Liu,D.F.Wong.Circuit partitioning for dynamically reconfigurable FPGAs. FPGA'99, Monterey,C A,US A,1999,187-194P
[31]陈国良,王煦法,庄镇泉等.遗传算法及其应用.北京：人民邮电出版社,1996：32-54页
[32]邹谊,庄镇泉,杨俊安.基于遗传算法的嵌入式系统软硬件划分算法.中国科学技术大学学报.2004,34(6)：724-731页
[33]J.Resano, D.Mozos, et al. A Reconfiguration Manager for Dynamically Reconfigurable Hardware. IEEE Design&Test,2005,22(5):452-460P
[34]Li Zhiyuan, Scott H.Configuration prefetching technigues for partial reconfigurable coprocessor with relocation and defragmentation//IEEE/ACM Int'1 Symp on FPGA, California,2002:187-195P
[35]梁樑,周学功,王颖等.采用预配置策略的可重构混合任务调度算法.计算机辅助设计与图形学学报.2007,19(5)：635-641页
[36]齐骥,李曦等.基于硬件任务顶点的可重构系统资源管理算法.电子学报.2006,34(11)：2094-2098页
[37]K.Bazargan,M.Sarrafzadeh.Fast online placement for reconfigurable computing systems.IEEE Symposium of Field Programmable Custom Computing Machines,Napa valley,CA,USA,1999:300-302P
[38]K.Bazargan,R.Kastner,M.Sarrafzadeh.Fast template placement for reconfigurable computing systems.IEEE Design and Test of Computers.2000,17(1):68-83P
[39]M.Koester,M.Porrmann,H.Kalte.Task placement for heterogeneous reconfigurable architectures.ICFPT,Singapore,2005:43-50P
[40]H.Kalte,D.Langen,E-Vonnahme,et al.Dynamically reconfigurable system-on-programmable-chip.Proc.of the 10th Euromicro Workshop on Parallel,Distributed and Network-based Processing(PDP'02),Canary Islands,Spain,2002:235-242P
[41]H.Kalte,M.Porrmann,U.Ruckert.Systme-on-programmable-chip approach enabling online fine-grained 1D-placement.Proc.of the 11st Reconfigurable Architectures Workshop(RAW 2004),Santa Fe,New Mexio,USA,2004:120-124P
[42]黄万伟,汪斌强等.面向区分服务的可重构任务在线调度算法.计算机辅助设计与图形学学报,2010,22(4)：717-723页
[43]H.Walder,C.Steiger,M.Platzner.Fast Online Task Placement on FPGAs:Free Space Partitioning and 2D hashing.International Parallel and Distributed Processing Symposium(IPDPS'03),US A,2003:120-127P
[44]M.Handa,R.Vemuri.An Efficient Algorithm for Finding Empty Space for Online FPGA Placement.Proceedings of the 41th Design Automation Conference, New York,2004: 960-965P
[45]A.Ahmadinia,C.Bobda,T.Jurgen.A New Approach for On-line Placement on Reconfigurable Devices.Proc.of the International Parallel and Distributed Processing Symposium(IPDPS'04),USA,2004:134P
[46]A.Ahmadinia,C.Bobda,S.P.Fekete,et al.Optimal Free-Space Management and Routing-Conscious Dynamic Placement for Reconfigurable Devices. IEEE Trans. Compute,2007,56(5):673-680P
[47]A.Ahmadinia,C.Bobda.A Dynamic Scheduling and Placement Algorithm for Reconfigurable Hardware.ARCS 2004,68(4):125-139P
[48]齐骥,李曦等.一种面向动态可重构计算的调度算法.计算机研究与发展,2007,44(8)：1439～1447页
[49]Wigley G, Kearney D. The management of applications for reconfigurable computing using an operating system. In:Proceedings of the Seventh Asia-Pacific Conference on Computer Systems Architecture, Australia,2002:73-81P
[50]H. Walder and M. Platzner. Non-Preemptive Multitasking on FPGAs:Task Placement and Footprint Transform.Proceedings of the International Conference Engineering of Reconfigurable Systems and Algorithms (ERSA), Las Vegas, NV, USA,2002:24-30P
[51]Handa M, Vemuri R. Area fragmentation in reconfigurable operating systems. In: Engineering of Reconfigurable Systems and Algorithms,USA,2004:77-83P
[52]Walder H, Steiger C, Platzner M, et al. Online scheduling and placement of real-time tasks to partially reconfigurable devices.In:Real-Time Systems Symposium, USA,2003:,224-225P
[53]P. Merino, M. Jacome, and J.C. Lopez. A Methodology for Task Based Partitioning and Scheduling of Dynamically Reconfigurable Systems.Proc of the IEEE Symposium on FPGAs for Custom Computing Machines, Napa Valley, USA,1998:324-325P
[54]Jin Cui, Qingxu Deng, Xiuqiang He and Zonghua Gu. An efficient algorithm for online management of 2D area of partially reconfigurable FPGAs.Proceedings of the conference on Design, automation and test, Nice,France,2007:129-134P
[55]B. Chazelle. The Bottom-Left Bin-packing Heuristic:An Efficient Implementation. IEEE Trans.Computers,1983,32(8):697-707P
[56]A. Ahmadinia, C. Bobda, and J. Teic. Temporal Task Clustering for Online Placement on Reconfigurable Hardware.Proceedings of the IEEE International Conference on Field-Programmable Technology,Tokyo, Japan,2003:359-362P
[57]J. Cui, Z. Gu, W. Liu, and Q. Deng. An Efficient Algorithm for Online Soft Real-Time Task Placement onReconfigurable Hardware Devices.Proceedings of the 10th IEEE International Symposium on Objectand Component-Oriented Real-Time Distributed Computing, Santorini Island, Greece,2007:321-328P
[58]M. Tomono, M. Nakanishi, S. Yamashita, K. Nakajima, and K. Watanabe. A New Approach to OnlineFPGA Placement.Proceeding of 40th Information Science and Systems (CISS), Princeton, NJ, USA,2006:145-150P
[59]Liang Liang, Xuegong Zhou, Ying Wang, Chenglian Peng. Online Hybrid Task Scheduling inReconfigurable Systems.11th International Conference on Computer Supported Cooperative Work inDesign, Melbourne, Australia,2007:1072-1077P
[60]Y. Lu, T. Marconi, G. N. Gaydadjiev, K.L.M. Bertels, R. J. Meeuws. A Self-adaptive on-line Task Placement Algorithm for Partially Reconfigurable Systems.Proceedings of the 22nd Annual International Parallel & Distributed Processing Symposium (IPDPS 2008), Miami, Florida, USA,2008:1-8P
[61]T. Marconi, Y. Lu, K.L.M. Bertels, et al.3D Compaction:a Novel Blocking-aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable Devices.Proceedings of the International Symposium on Applied Reconfigurable Computing (ARC), Bangkok, Thailand,2010:194-206P
[62]M. Sabeghi, V.M. Sima, K.L.M. Bertels. Compiler Assisted Runtime Task Scheduling on a ReconfigurableComputer.19th International Conference on Field Programmable Logic and Applications (FPL09)Prague,2009:44-50P
[63]周学功,梁樑,黄勋章,彭澄廉.可重构系统中的实时任务在线调度与放置算法.计算机学报,2007,30(11)：1901-1909页
[64]Hinkelmann.H, Gunberg.A, Zipf.P, et al.Multitasking Support for Dynamically Reconfigurable Systems.Field Programmable Logic and applications. 2006,38(5):.1-6P
[65]Miaoqing Huang, Harald Simmler, Proshanta Saha, and Tarek El-Ghazawi. Hardware Task Scheduling Optimizations for Reconfigurable Computing.Proceedings of the Second International Workshop on High-Performance Reconfigurable Computing Technology and Applications (HPRCTA'08), Austin, Texas,USA,2008:1-10P
[66]Miaoqing Huang, Harald Simmler, Olivier Serres, and Tarek El-Ghazawi. RDMS:A Hardware TaskScheduling Algorithm for Reconfigurable Computing.Proceedings of the 16th ReconfigurableArchitectures Workshop (RAW 2009), Rome, Italy,2009:1-8P
[67]Tabero J, Steptien J, Mecha H., et al. Task placement heuristic based on 3D-adjacency and look-ahead in reconfigurable systems.11th Asia and South Pacific Design Automation Conference 2006, Yokohama, IEEE Circuits and Systems Society ACM SIGDA,2006:169-174P
[68]Tabero, J. Steptien, H. Mecha, et al. A vertex -list approach to 2D HW multitasking management in RTR FPGAs. DCIS 2003, Cludad Real, Spain,2003:110-114P
[69]李涛,杨愚鲁.可重构资源管理及硬件任务布局的算法研究.计算机研究与发展,2008,45(2)：375-382页
[70]张先迪,李正良.图论及其应用.北京：高等教育出版社,2005：46-52页
[71]付志红,俞集辉,苏向丰.引入方向因子的最小回路、最大回路搜索算法.重庆大学学报：自然科学版,2002,25(3)：64-67页
[72]龚育昌,齐骥.一种支持动态可重构系统的布局碎片量化方法.小型微型计算机系统,2007,28(5)：944-947页
[73]Wolf W, Jerraya A A, Martin G. Multiprocessor system-on-chip (MPSoC) technology. IEEE Trans, on Computer Aided Design of Integrated Circuits and Systems,2008, 27(10):1701-1713P
[74]Hartenstein R.A decade of reconfigurable computing:a visionary retrospective. Proceedings Design,Automation and Test in Europe(DATE'01),USA,2001:642-649P
[75]Compton K,Hauck S.Reconfigurable computing:a survey of systems and software.ACM Computing Surveys,2002,34(2):171-210P
[76]李涛,杨愚鲁等.基于遗传算法的可重构系统软硬件划分.计算机工程与应用,2007,43(26)：56-58页
[77]Lavagno L, La Rosa A and Passerone C.A Software Development Tool Chain for a Reconfigurable Processor.In Proceedings of the 2001 international conference on Compilers, architecture, and synthesis for embedded systems, USA,2001:93—98P
[78]Guo Z, Buyukkurt B, Najjar W, et al.Optimized Generation of Data-path from C Codes for FPGAs.In Proceedings of Design, Automation and Test in Europe,USA,2005:112-117P
[79]Li Y, Callallan T, Damell E, et al.Hardware-software co-design of embedded Reconfigurable architectures.Design Automation Conference,NY,USA,2000:507-512P
[80]Amin F,Mehdi K,Sied M F.HW/SW Partitioning Using Discrete Particle Swarm.In:Proc of the 17th ACM Great Lakes symposium,San Francisco, 2007:359-364P
[81]Zou Y,Zhuang Z,Chen H.HW/SW partitioning based on genetic algorithm,In:Proc of Evolutionary Computation,Landon,2004,628-633P
[82]Petru E. System Level Hardware/Software Partitioning Based on Simulated Annealing and Tabu Search.Design Automation for Embedded Systems,1997,2(1):5-32P
[83]Qiang W,Jinian B.Hong X,Applying search space smoothing technique to hardware/software partitioning:Experiments and analysis.In:Proc 5th International Conference,Beijing,2003,85-88P
[84]熊志辉,李恩昆,陈吉华.遗传算法与蚂蚁算法动态融合的软硬件划分.软件学报,2005,16(4)：21-25页
[85]李晖,姚放吾.基于免疫算法的嵌入式系统软硬件划分方法.计算机工程与设计,2006,27(22)：45-50页
[86]Youness H, Hassan M, Sakannshi K, et al. A high performance algorithm for scheduling and hardware-software partitioning on MPSoCs.Proc. of International Conference on Design and Technology of Integrated Systems in Nanoscale Era,Cairo,2009:71-76P
[87]沈英哲,周学海.一种用于可重构计算系统的软硬件划分算法.中国科学技术大学学报,2009,39(2)：182-188页
[88]马宏星,周学海等.可重构计算平台上软硬件任务划分与调度算法.系统工程与电子技术,2010,32(11)：2459-2464页
[89]Wolf W. Middleware architectures for distributed embedded systems.Proc. of International Symposium on Object Oriented Real-Time Distributed Computing, Orlando,FL,2008:377-380P
[90]Mei B,Schaumont P,Vernalde S.A hardware/software partitioning and scheduling algorithm for dynamically reconfigurable embedded systems.Proceedings of ProRISC,US A,2000:110-112P
[91]Miramond B,Delosme J M.Design space exploration for dynamically reconfigurable architectures.Proceedings Design,Automation and Test in Europe(DATE'05),USA, 2005:366-371P
[92]孙迎红,童元满,王志英.基于自适应滤波和模式识别的功耗攻击技术.通讯与计算机,2007,4(2)：47-50页
[93]李树均.数字化混沌密码的分析与设计.西安：西安交通大学博士学位论文,2003：30-39页
[94]丁源源.混沌及其保密通信技术研究.武汉：武汉理工大学硕士学位论文,2004：25-36页
[95]李金屏,何苗,刘明军等.提高BP小波神经网络收敛速度的研究.模式识别与人工智能,2002,15(1)：28-35页
[96]史奎凡,董吉文,李金屏等.正交遗传算法.电子学报,2002,30(10)：1501-1504页
[97]李金屏,李素,杨波.基于小生境算法和聚类分析的快速收敛遗传算法.小型微型计算机系统,2004,25(6)：975-978页
[98]Wang L, Smith K. On chaotic simulated annealing.IEEE Trans on Neural Networks,2004,9(4):716-718P
[99]郭建青,李彦,王洪胜等.利用混沌优化算法确定河流水质模型参数.水利发电学报,2004,23(4)：92-96页
[100]张维,吴强等.搜索空间平滑技术在软硬件划分中的应用.计算机工程与应用,2010,46(12)：72-78页
[101]Dittmann F. Applying single processor algorithms to schedule tasks on reconfigurable devices respecting reconfiguration times.Proceedings of 20th International Parallel and Distributed Processing Symposium,Washington,2006:4P
[102]Danne K, Platzner M. Partitioned scheduling of periodic real-time tasks onto reconfigurable hardware.Proceedings of 20th International Parallel and Distributed Processing Symposium,Washington,2006:8P
[103]Li Zhiyuan, Hauck Scott.Configuration compression for Virtex FPGAs.Proceedings of the 9th Annual IEEE Symposium on Field-Programmable for Custom Computing Machines,Rohnert Park, California,2001:22-36P
[104]Li Zhiyuan, Hauck Scott.Configuration prefetching techniques for partial reconfigurable coprocessor with relocation and defragmentation.Proceedings of IEEE/ACM International Symposium on Field-Programmable Gate Arrays, Monterey,California,2002:187-195P
[105]Ghiasi Soheil, Nahapetian Ani, Sarrafzadeh Majid.An optimal algorithm for minimizing run-time reconfiguration delay.ACM Transactions on Embedded Computing Systems,2004,3(2):237-256P
[106]Gupta R.K.DE, Micheli G.D. System-Level synthesis using re-programmable components. In:Hugo DM, Herman B,eds. Proc. of the European Conf.on Design Automation (EDAC),Brussels,1992:2-7P
[107]Kastner R. Synthesis techniques and optimizations for reconfigurable systems [Ph.D.Thesis]. Los Angeles:University of California,2002:18-24P
[108]Ernst R., Henkel J., Benner T.(Rolf Ernst, Jorg Henkel, Thomas Benner) Hardware-Software co-synthesis for microcontrollers. IEEE Design & Test of Computers,1993,10(4):64-75P
[109]Zhang L.F. Research on techniques of hardware/software co-synthesis and virtual microprocessor [Ph.D.Thesis]. Changsha:National University of Defense Technology, 2002 (in Chinese with English abstract):16-22P
[110]D. Saha, A. Basu, R. S. Mitra.Hardware software partitioning using genetic algorithm. In:Agrawal V, Mahabala HN,eds.Proc.of the 10th Int'l Conf.on VLSI Design, Hyderabad,1997:155-160P
[111]Guo X.D., Liu J.R., Wen H. A method for hardware/software partitioning using genetic algorithm. Journal of Computer-Aided Design&Computer Graphics,2001,13(1): 24-27P
[112]Peng Z., Kuchcinski K. An algorithm for partitioning of application specific systems. In:Courtois B, eds. Proc. of the European Conf.on Design Automation(EDAC), Paris, 1993:316-321P
[113]Else P., Peng Z, Kuchcinski K, Doboli A. System level hardware/software partitioning based on simulated annealing and tabu search. Design Automation of Embedded Systems,1997,2 (1):5-32P
[114]张煜东,吴乐南等.基于自适应蚁群算法的软硬件划分.控制与决策,2009,24(3)：1385—1389页
[115]邵岁锋,张英杰.基于免疫粒子群的嵌入式系统软硬件划分方法.计算机应用,2010,30(2)：479—482页
[116]李亚芳,李章维.一种基于信息熵的自适应遗传算法.浙江工业大学学报,2007,35(6)：666—670页
[117]肖菁,李亮平.基于信息熵调整的自适应蚁群算法.计算机工程与设计,2010,31(22)：4873—4876页
[118]姜毅,乐庆玲.基于信息熵的粒子群优化算法.微型电脑应用,2008,24(5)：31—33页
[119]裴胜玉,周永权等.信息熵协进化粒子群算法.计算机工程与应用,2011,47(3)：225—228页
[120]李鹤龄.信息熵、波尔兹曼熵以及克劳修斯熵之间的关系.大学物理,2004,23(12)：37—40页
[121]Shannon C. The Mathematical Theory of Communication.BSTJ,1948,5(1):5-10P
[122]Jaynes E T. Information theory and statistical mechanics.Physical Review,1957,106(4): 620-630P
[123]崔畅,赵强.改进的混沌优化算法的研究.科学技术与工程,2007,7(3)：307—309页