基于矢量量化技术的图像实时压缩芯片的研究
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摘要
图像压缩算法的研究具有重大的经济意义,历来是图像研究领域的热点课题。目前流行的图像压缩标准由于高昂的专利费用和高系统配置要求的限制,不适合于某些低成本、实时性要求强的场合。矢量量化技术是一种有效的数据压缩技术,由于其算法简单,具有较高的压缩率,因而被广泛应用于图像压缩编码领域。
本论文通过对矢量量化技术基本理论进行分析,首先提出了图像块动态划分、码书方向性分类设计和EBNNS快速搜索三种矢量量化改进算法,然后将这三种改进算法结合组成了PDVQ图像编码系统。与普通矢量量化相比,PDVQ图像编码系统在保证重建图像质量前提下,缩短了编码时间并提高了压缩比。在对PDVQ图像编码系统进行VLSI实现时,为保证系统的实时处理速度,采用了分时复用、分布式计算和流水线等设计技术,并基于0.35μm CMOS工艺,设计完成了PDVQ芯片。试制的PDVQ芯片面积为2.08×2.08mm2,经测试该芯片逻辑功能正确。在3.3V的供电电压下,芯片最高工作频率可达100MHz,功耗为343mW。对于分辨率为512×512的中等复杂度标准灰度图像"Airplane"进行测试,PDVQ芯片编码此幅图像的压缩率可达21.51,重建图像的PSNR为26.95,在100MHz的工作频率下,编码此幅图像的时间小于20ms,表明芯片每秒可以处理50帧左右的该类图像。
为进一步提高PDVQ芯片的编码速度和编码质量,论文提出了码书取反旋转压缩、均值与矢量量化分类编码和左相关区间编码三种优化算法,并对这三种算法进行了仿真分析。论文结合这三种优化算法和EBNNS算法一起组成了新的图像编码系统——左相关分类编码系统,该编码系统和PDVQ图像编码系统相比,码书尺寸减少了一半,同时具有更好的重建图像质量。本论文基于Altera公司cycloneⅡ系列EP2C35F672C6芯片对左相关分类编码系统的VLSI结构进行了FPGA验证,实验结果表明,用该FPGA芯片实现的左相关分类编码系统的时钟频率可以达到100MHz,在该时钟频率下对同样一幅分辨率为512×512的中等复杂度标准灰度图像‘'Airplane"进行编码大约需要8.27ms,与PDVQ芯片相比快了约11ms,这一速度足够完成分辨率为1024×1024该类图像的实时传输,同时该系统编码此幅图像的压缩率为18.5,重建图像的PSNR为28.15。因此,论文提出的PDVQ图像编码系统和左相关分类编码系统在VLSI技术实现后,都能够满足图像实时传输的需要。
Because of the immense values of image compression, relevant research has always been the hot topic of image field. But the prevalent image coding standard is limited out of some place requisite of real time and low cost, due to its high patent fee and high system configuration.As an effective technology for data compression, vector quantization (VQ) is widely used in the field of image coding because of its simple algorithm and high compression rate.
According to analyzing the basic technique of VQ, three improved algorithms are presented and simulated in this paper, which are partition dynamically VQ, EBNNS and category codebook based on direction. Integrating the merits of these three algorithms, the PDVQ encoding system is established, and it can improve the compression rate and coding speed in contrast with the common VQ. While implementing the PDVQ encoding system using VLSI technology, the circuit design techniques such as time-sharing, distribution-computing and pipe-line, were used to increase the process speed. According to mainstream ASIC design flow, the PDVQ chip was designed and fabricated with 0.35μm CMOS process.The chip area is 2.08mm×2.08mm, it can operate up to 100MHz at 3.3V power supply, and its power dissipation is 343mW at this operation. To encode medium complexity standard test gray image'Airplane' of 512x512 piexls using PDVQ chip, its compression ratio can achieve 21.51, and PSNR of its reconstructive image is 26.95. Under 100MHz work frequency, it is less than 20ms to encoding this image using PDVQ chip, this processing speed can prove that the PDVQ chip can compress about 50 frame such image within 1 second.
Aim at improving performance of the PDVQ chip, three novel algorithms are presented in this paper, which are 2R codebook compression algorithm, Mean-value and VQ category algorithm, and Left-correlation coding algorithm. And a novel Left-correlation and category VQ (LCCVQ) image coding system is combined with these three algorithms and EBNNS algorithm. This novel system has better image quality than PDVQ encoding system, while its codebook size is only a half of the PDVQ system.The VLSI architecture of the LCCVQ encoding system was designed with the FPGA chip of Altera FPGA cycloneⅡEP2C35F672C6, and the experimental results show that the LCCVQ encoding system implemented by this FPGA chip can operate up to 100MHz. Under this work frequency, only about 8.27ms is needed to encode a same standard test gray image'Airplane'of 512×512 pixels with medium complexity using the LCCVQ encoding system, this encoding time is about 11ms faster than that of PDVQ encoding system, so that it is enough to transmission such image in real time at this speed, and using LCCVQ system to encode this image,its compression ratio is 18.15, PSNR of its reconstructive image is 28.15. Therefore, both of the PDVQ encoding system and LCCVQ encoding system implemented using VLSI technology can meet the requirement of image transmission in real time.
本论文通过对矢量量化技术基本理论进行分析,首先提出了图像块动态划分、码书方向性分类设计和EBNNS快速搜索三种矢量量化改进算法,然后将这三种改进算法结合组成了PDVQ图像编码系统。与普通矢量量化相比,PDVQ图像编码系统在保证重建图像质量前提下,缩短了编码时间并提高了压缩比。在对PDVQ图像编码系统进行VLSI实现时,为保证系统的实时处理速度,采用了分时复用、分布式计算和流水线等设计技术,并基于0.35μm CMOS工艺,设计完成了PDVQ芯片。试制的PDVQ芯片面积为2.08×2.08mm2,经测试该芯片逻辑功能正确。在3.3V的供电电压下,芯片最高工作频率可达100MHz,功耗为343mW。对于分辨率为512×512的中等复杂度标准灰度图像"Airplane"进行测试,PDVQ芯片编码此幅图像的压缩率可达21.51,重建图像的PSNR为26.95,在100MHz的工作频率下,编码此幅图像的时间小于20ms,表明芯片每秒可以处理50帧左右的该类图像。
为进一步提高PDVQ芯片的编码速度和编码质量,论文提出了码书取反旋转压缩、均值与矢量量化分类编码和左相关区间编码三种优化算法,并对这三种算法进行了仿真分析。论文结合这三种优化算法和EBNNS算法一起组成了新的图像编码系统——左相关分类编码系统,该编码系统和PDVQ图像编码系统相比,码书尺寸减少了一半,同时具有更好的重建图像质量。本论文基于Altera公司cycloneⅡ系列EP2C35F672C6芯片对左相关分类编码系统的VLSI结构进行了FPGA验证,实验结果表明,用该FPGA芯片实现的左相关分类编码系统的时钟频率可以达到100MHz,在该时钟频率下对同样一幅分辨率为512×512的中等复杂度标准灰度图像‘'Airplane"进行编码大约需要8.27ms,与PDVQ芯片相比快了约11ms,这一速度足够完成分辨率为1024×1024该类图像的实时传输,同时该系统编码此幅图像的压缩率为18.5,重建图像的PSNR为28.15。因此,论文提出的PDVQ图像编码系统和左相关分类编码系统在VLSI技术实现后,都能够满足图像实时传输的需要。
Because of the immense values of image compression, relevant research has always been the hot topic of image field. But the prevalent image coding standard is limited out of some place requisite of real time and low cost, due to its high patent fee and high system configuration.As an effective technology for data compression, vector quantization (VQ) is widely used in the field of image coding because of its simple algorithm and high compression rate.
According to analyzing the basic technique of VQ, three improved algorithms are presented and simulated in this paper, which are partition dynamically VQ, EBNNS and category codebook based on direction. Integrating the merits of these three algorithms, the PDVQ encoding system is established, and it can improve the compression rate and coding speed in contrast with the common VQ. While implementing the PDVQ encoding system using VLSI technology, the circuit design techniques such as time-sharing, distribution-computing and pipe-line, were used to increase the process speed. According to mainstream ASIC design flow, the PDVQ chip was designed and fabricated with 0.35μm CMOS process.The chip area is 2.08mm×2.08mm, it can operate up to 100MHz at 3.3V power supply, and its power dissipation is 343mW at this operation. To encode medium complexity standard test gray image'Airplane' of 512x512 piexls using PDVQ chip, its compression ratio can achieve 21.51, and PSNR of its reconstructive image is 26.95. Under 100MHz work frequency, it is less than 20ms to encoding this image using PDVQ chip, this processing speed can prove that the PDVQ chip can compress about 50 frame such image within 1 second.
Aim at improving performance of the PDVQ chip, three novel algorithms are presented in this paper, which are 2R codebook compression algorithm, Mean-value and VQ category algorithm, and Left-correlation coding algorithm. And a novel Left-correlation and category VQ (LCCVQ) image coding system is combined with these three algorithms and EBNNS algorithm. This novel system has better image quality than PDVQ encoding system, while its codebook size is only a half of the PDVQ system.The VLSI architecture of the LCCVQ encoding system was designed with the FPGA chip of Altera FPGA cycloneⅡEP2C35F672C6, and the experimental results show that the LCCVQ encoding system implemented by this FPGA chip can operate up to 100MHz. Under this work frequency, only about 8.27ms is needed to encode a same standard test gray image'Airplane'of 512×512 pixels with medium complexity using the LCCVQ encoding system, this encoding time is about 11ms faster than that of PDVQ encoding system, so that it is enough to transmission such image in real time at this speed, and using LCCVQ system to encode this image,its compression ratio is 18.15, PSNR of its reconstructive image is 28.15. Therefore, both of the PDVQ encoding system and LCCVQ encoding system implemented using VLSI technology can meet the requirement of image transmission in real time.
引文
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