基于FPGA的嵌入式图像监控系统设计
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摘要
传统的数字视频监控系统大多基于PC平台,采用的是专用采集卡和存储设备,导致整机价格昂贵,体积庞大,往往局限于特定领域的应用。而嵌入式图像监控系统以其价格低、便携式等特点在普通家居安防、临时性作业等场所得到了越来越广泛的应用。
     本文针对基于FPGA的嵌入式图像监控系统进行研究,重点研究了动体检测和图像存储的开发方法。通过将开运算方法应用于动体检测,并结合人体信号检测,有效降低了检测的误判率。另外还针对FPGA平台研究了将采集数据转换成图像文件并保存到SD卡的方法。
     硬件板载电路采用FPGA作为主控制器,负责系统的调度控制。外接图像传感器、热释电红外传感器、SDRAM、SD卡、环境光亮检测器、RS232等器件,实现了图像的自动采集、检测、配置和存储。FPGA内部逻辑电路采用Verilog语言和原理图混合设计的方法,采用了结构化模块设计,包括图像采集和转换模块、帧缓存模块、动体检测模块、Nios系统模块以及显示模块。最后通过嵌入式C语言实现系统的Nios系统软件控制,并完成SD卡的驱动程序以及图像文件生成程序的设计。本文利用quartusⅡ和modelsim对逻辑电路进行仿真,调试过程中利用在线逻辑分析仪Signaltap系统进行了严格的测试,保证了系统的可靠性。
     本系统采集速度达到60帧/秒,SD存储速度为3.7秒/帧,检测响应的仿真时间为120ms,检测的拒真率小于1%。由于采用FPGA单芯片控制方案,系统具有高集成度、可靠性及灵活性的特点。同时由于体积小、功耗低,可在很多应用场合替代传统基于PC的图像监控方案。
Most of digital surveillance systems are on the basis of on PC platforms,and due to adopting specific acquirisiton card as well as storage device,the whole system has high price and large size. So it is only applied to small district,bank,and supermarket. Compared with PC-based image surveillance system,the embeded image surveillance system has already obtained the more and more widespread application in domains such as common home security,temporary circumstance because of its cheapness and portability.
     This thesis presents a solution of embeded image surveillance system, especially focus on method of motion detection and image saving.The possibility of motion detection misjudgement can be reduced by adopting the body detection and open operation to the method.For the FPGA platform,the method of conversion of data to image and image saving to SD card is developed.
     FPGA is adopted as the main controller in the handware circuit and is responsible for maintaining of the whole system .The board is connected to CIS ,PIR,SD card,RS232,and light detect device.The function is realized of image collecting and conversion,motion detection and image saving.All circuits is designed by in both Verilog language code and schematic diagram.This sytem consists of image acquirisiton module,frame buffer,motion detection,body signal detection,sd card ,Nios system and display module.At last the control of NIOS and the driver of SD card as well as image creating program are realized in c language.The logic circuits can be simulated in quartus II and modelsim, the test is resorted to signaltap to ensure the robustness of the system.
     The rate of acquisition can reach to 60 frames by per second,The rate of SD storage can reach to 3.7 frames by per second,The simulation response time of motion detecion can reach at 120ms.the percent of detection refusal is smaller than 1%.Due to the main circuit being integrated into a FPGA chip, the system is characteristic of high integration, robustness and flexibility .Because of its low power dissipation ans small size,it can replace the conventional PC-baseed surveillance solution in many field.
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