基于FPGA的对象存储控制器SATA接口及关键技术研究
|
摘要
随着存储需求的增加及存储应用日益复杂,以块为基础的存储接口已限制了存储系统的发展,以对象为基础的存储接口应运而生。对象级接口是块级接口和文件级接口的完美结合,具有安全性、跨平台操作性、高性能和智能化的特点,但是对象级接口智能化的管理和复杂存储协议的解析使对象存储控制器的负荷加重,为了提高对象存储系统的性能,进行了对象存储控制器的硬件设计与研究。
基于现场可编程门阵列FPGA(Field Programmable Gate Array),使用交换式的Avalon总线与RISC(Reduced Instruction Set Computer)型的NiosII处理器,设计对象存储控制器的总体架构;基于可编程片上系统技术,用硬件描述语言实现串行高级连接技术SATA(Serial Advanced Technology Attachment)协议与光纤通道底层协议的部分功能;基于IP(Intellectual Property)核,并采用锁相环进行分频倍频,实现了DDR内存控制器及其时钟电路;基于实时操作系统ucLinux,并采用硬件抽象层技术屏蔽硬件细节,在软件层次上实现面向对象存储协议。
进行循环冗余校验CRC(Cyclic Redundancy Check)算法的优化与扰码(Scrambling)算法的优化,通过资源复用提高空间并行度,以更多的组合逻辑资源换取更高的性能;对SATA链路层的大型状态机进行切割,运用流水线原理提高时间并行度,以更多的寄存器资源换取更高的性能。进行功能仿真与时序仿真,确保在功能正确的前提下,硬件的工作频率得到提高,系统的性能得到提升。
With the requirement for storage and the complicate application of storage, the block-based storage interfaces have blocked the development of storage system, the Object-based Storage interfaces come out and feed the needs. The Object-based Storage is the combination of block-based storage and file-based storage and is known as security, scalability, high-performance and intelligence, but the Object-based Storage Controller becomes the bottleneck because of the intelligent management and the complicate protocol decode. In order to overcome this status and improving the performance of the Object-based Storage System, the hardware design of Object-based Storage Controller is studied in detailed.
Based on FPGA (Field Programmable Gate Array), finished the overall design with the Avalon switch fabric and the NiosII processor which is of RISC (Reduced Instruction Set Computer) architecture. Based on SOPC (System on Programble Chip) technology, implement the SATA (Serial Advanced Technology Attachment) protocol and the low-level protocol of FC (Fibre-channel) in HDL language. Based on the IP (Intellectual Property) core and finished the frequency division and muplication with PLL (Phase-locked Loop), implement the DDR memory controller and the timing circuit. Based on the ucLinux RTOS and the HAL (Hardware Abstract Level) technology, implement the Object-Based Storage protocol on the software level.
Taking the optimizing of CRC (Cyclic Redundancy Check) algorithm and scrambling algorithm as an example, describe the method of improving the frequency and performance through resource-replication; taking the division of large state-machine in the link layer of SATA protocol as an example, describe the method of improving the frequency and performance through time-interleaving and pipelining.
基于现场可编程门阵列FPGA(Field Programmable Gate Array),使用交换式的Avalon总线与RISC(Reduced Instruction Set Computer)型的NiosII处理器,设计对象存储控制器的总体架构;基于可编程片上系统技术,用硬件描述语言实现串行高级连接技术SATA(Serial Advanced Technology Attachment)协议与光纤通道底层协议的部分功能;基于IP(Intellectual Property)核,并采用锁相环进行分频倍频,实现了DDR内存控制器及其时钟电路;基于实时操作系统ucLinux,并采用硬件抽象层技术屏蔽硬件细节,在软件层次上实现面向对象存储协议。
进行循环冗余校验CRC(Cyclic Redundancy Check)算法的优化与扰码(Scrambling)算法的优化,通过资源复用提高空间并行度,以更多的组合逻辑资源换取更高的性能;对SATA链路层的大型状态机进行切割,运用流水线原理提高时间并行度,以更多的寄存器资源换取更高的性能。进行功能仿真与时序仿真,确保在功能正确的前提下,硬件的工作频率得到提高,系统的性能得到提升。
With the requirement for storage and the complicate application of storage, the block-based storage interfaces have blocked the development of storage system, the Object-based Storage interfaces come out and feed the needs. The Object-based Storage is the combination of block-based storage and file-based storage and is known as security, scalability, high-performance and intelligence, but the Object-based Storage Controller becomes the bottleneck because of the intelligent management and the complicate protocol decode. In order to overcome this status and improving the performance of the Object-based Storage System, the hardware design of Object-based Storage Controller is studied in detailed.
Based on FPGA (Field Programmable Gate Array), finished the overall design with the Avalon switch fabric and the NiosII processor which is of RISC (Reduced Instruction Set Computer) architecture. Based on SOPC (System on Programble Chip) technology, implement the SATA (Serial Advanced Technology Attachment) protocol and the low-level protocol of FC (Fibre-channel) in HDL language. Based on the IP (Intellectual Property) core and finished the frequency division and muplication with PLL (Phase-locked Loop), implement the DDR memory controller and the timing circuit. Based on the ucLinux RTOS and the HAL (Hardware Abstract Level) technology, implement the Object-Based Storage protocol on the software level.
Taking the optimizing of CRC (Cyclic Redundancy Check) algorithm and scrambling algorithm as an example, describe the method of improving the frequency and performance through resource-replication; taking the division of large state-machine in the link layer of SATA protocol as an example, describe the method of improving the frequency and performance through time-interleaving and pipelining.
引文
[1]郑纬民,舒继武.下一代分布式智能网络存储系统的发展趋势.世界电信, 2004, 17(8):16~19
[2] Lu Y, Du D H C, Ruwart T. QoS provisioning framework for an OSD-based storage system. In: Mass Storage Systems and Technologies. Proceedings of 22nd IEEE/13th NASA Goddard Conference. New York, NY, USA: IEEE Computer Society, 2005. 28~35
[3] KleimOsowski K, Ruwart T, Lilja D J. Communicating Quality of Service Requirements to an Object-Based Storage Device. In: Mass Storage Systems and Technologies. Proceedings of 22nd IEEE/13th NASA Goddard Conference. New York, NY, USA: IEEE Computer Society, 2005.224~231
[4] Mesnier M, Ganger G R, Riedel E. Object-based storage. Communications Magazine, IEEE, 2003, 41(8): 84~90
[5] Azagury A, Dreizin V, Factor M, et al. Towards an object store. In: Mass Storage Systems and Technologies. Proceedings of 20th IEEE/11th NASA Goddard Conference. New York, NY, USA: IEEE Computer Society, 2003. 165~176
[6] Hedges R, Loewe B, McLarty T, et al. Parallel file system testing for the lunatic fringe: the care and feeding of restless I/O power users. In: Mass Storage Systems and Technologies. Proceedings of 22nd IEEE/13th NASA Goddard Conference. New York, NY, USA: IEEE Computer Society, 2005.3~17
[7] Garth A Gibson, David F Nagle, William Courtright, et al. NASD Scalable Storage Systems. USENIX 1999, Linux Workshop. Monterey, CA, America: USENIX, 1999. 1~6
[8] John B Lohmeyer, George O Penokie, Paul D Aloisi, et al. Information technology-SCSI Object-Based Storage Device Commands (OSD). INCITS T10 Working Draft. 2005. 16~121
[9]张悠慧,郑纬民.一种新的网络对象存储设备研究.电子学报, 2003, 31(5): 679~682
[10] Peter J Braam, Cluster File Systems Inc. The Lustre Storage Architecture. Cluster File Systems, Inc Whiter Paper. 2003. 14~28
[11] Cluster File Systems Inc. Lustre: A Scalable, High-performance File System. Cluster File Systems, Inc Whiter Paper. 2002. 1~12
[12] PANASAS WHITE PAPER: Object Storage Architecture: Defining a new generation of storage systems built on distributed, intelligent storage devices. 2003
[13] Intel Corporation. Object-based Storage-The Next Wave of Storage Technology and Devices. Intel White Paper. 2002. 7~12
[14] Feng Dan, Qin Lingjun, Zeng Lingfang, et al. A Scalable Object-Based Intelligent Storage Device. In: Machine Learning and Cybernetics. Proceedings of 2004 International Conference. 2004. 26~29
[15]李伯成.微型计算机嵌入式系统设计.第一版.西安:西安电子科技大学出版社, 2004. 1~13
[16] Douglas J. Smith. A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog. 1996. 112~114
[17]张葱仔.对象存储控制器的硬件设计与实现: [硕士学位论文]。武汉:华中科技大学图书馆,2006.
[18]范俊.基于FPGA的SATA控制器设计:[硕士学位论文]。武汉:华中科技大学图书馆,2006.
[19] J.BHASKER. Verilog HDL硬件描述语言.北京:机械工业出版社, 2001. 24
[20] Roth CW, Jr. Digital Systems Design Using VHDL. Boston: PWS, 1998. 34
[21] Rabey. Digital Integrated Circuits, a design perspective. NewYork: Prentice Hall, 1995. 58
[22] Altera Corporation. Avalon Bus Specification Reference Manual, Rev 2.3. Altera White Paper. 2003. 23
[23] Altera Corporation. Quartus II Handbook, Rev5.0. Altera White Paper. 2005.10
[24] Altera Corporation. SOPC Builder系统互联架构. 2004. 1~3
[25] Altera Corporation. NiosII CPU的结构与编程模型. 2004. 1~4
[26] Altera Corporation. Nios II Software Developer’s Handbook, Rev 5.1.0. Altera White Paper. 2005. 10~12
[27]王俊卿,杨扬,刘庆文.基于Nios软核处理器的uClinux的移植.嵌入式应用, 2001, 6(3): 123~124
[28] APT Technologies, Inc, Dell Computer Corporation, Intel Corporation, et al. Serial ATA: High Speed Serialized AT Attachment Rev 1.0a. 2003. 1
[29] Altera Corporation. Stratix GX Transceiver User Guide. Altera White Paper. 2005. 19
[30] Xilinx Corporation. Multi-Gigabit Fibre Channel Transport Core Reference Guide. 2005. 10
[31]吴继华,王诚. Altera FPGA/CPLD设计(高级篇).第一版.北京:人民邮电出版社, 2005. 27
[32] Altera Corporation. Stratix GX Development Board Datasheet. Altera White Paper. 2003. 5~6
[33] Micron Corporation. 184-PIN UNBUFFERED DDR SDRAM DIMM. Micron White Paper. 2005. 10
[34]吴健军,初建朋,赖宗声.基于FPGA的DDR SDRAM控制器的实现.微计算机信息, 2006, 1(2): 156~157
[35] Altera Corporation. DDR & DDR2 SDRAM Controller Compiler User Guide. Altera White Paper. 2005. 8
[36] Altera Corporation. Interfacing DDR SDRAM with Stratix & Stratix GX Devices. Altera White Paper. 2005. 12
[37] INCITS/Project T11/1619-D. Fibre Channel Framing and Signaling-2(FC-FS-2) Rev0.40. 2004. 11
[38]姜明华,周敬利,余胜生.两种网络存储协议Fibre channel与iSCSI比较分析.计算机工程与设计, 2004, 25(10): 1654~1657
[39] X3T9.3 Task Group of ANSI. Fibre Channel Physical and Signaling Interface(FC-PH) Rev.4.2. 1993. 1
[40]李洋,周敬利,余胜生.基于Fibre Channel的存储局域网络设计与研究.计算机应用研究, 2000, 17(8): 61-63
[41] Michael D. Ciletti. Verilog HDL高级数字设计.第三版.西安:电子工业出版社, 2006. 75
[2] Lu Y, Du D H C, Ruwart T. QoS provisioning framework for an OSD-based storage system. In: Mass Storage Systems and Technologies. Proceedings of 22nd IEEE/13th NASA Goddard Conference. New York, NY, USA: IEEE Computer Society, 2005. 28~35
[3] KleimOsowski K, Ruwart T, Lilja D J. Communicating Quality of Service Requirements to an Object-Based Storage Device. In: Mass Storage Systems and Technologies. Proceedings of 22nd IEEE/13th NASA Goddard Conference. New York, NY, USA: IEEE Computer Society, 2005.224~231
[4] Mesnier M, Ganger G R, Riedel E. Object-based storage. Communications Magazine, IEEE, 2003, 41(8): 84~90
[5] Azagury A, Dreizin V, Factor M, et al. Towards an object store. In: Mass Storage Systems and Technologies. Proceedings of 20th IEEE/11th NASA Goddard Conference. New York, NY, USA: IEEE Computer Society, 2003. 165~176
[6] Hedges R, Loewe B, McLarty T, et al. Parallel file system testing for the lunatic fringe: the care and feeding of restless I/O power users. In: Mass Storage Systems and Technologies. Proceedings of 22nd IEEE/13th NASA Goddard Conference. New York, NY, USA: IEEE Computer Society, 2005.3~17
[7] Garth A Gibson, David F Nagle, William Courtright, et al. NASD Scalable Storage Systems. USENIX 1999, Linux Workshop. Monterey, CA, America: USENIX, 1999. 1~6
[8] John B Lohmeyer, George O Penokie, Paul D Aloisi, et al. Information technology-SCSI Object-Based Storage Device Commands (OSD). INCITS T10 Working Draft. 2005. 16~121
[9]张悠慧,郑纬民.一种新的网络对象存储设备研究.电子学报, 2003, 31(5): 679~682
[10] Peter J Braam, Cluster File Systems Inc. The Lustre Storage Architecture. Cluster File Systems, Inc Whiter Paper. 2003. 14~28
[11] Cluster File Systems Inc. Lustre: A Scalable, High-performance File System. Cluster File Systems, Inc Whiter Paper. 2002. 1~12
[12] PANASAS WHITE PAPER: Object Storage Architecture: Defining a new generation of storage systems built on distributed, intelligent storage devices. 2003
[13] Intel Corporation. Object-based Storage-The Next Wave of Storage Technology and Devices. Intel White Paper. 2002. 7~12
[14] Feng Dan, Qin Lingjun, Zeng Lingfang, et al. A Scalable Object-Based Intelligent Storage Device. In: Machine Learning and Cybernetics. Proceedings of 2004 International Conference. 2004. 26~29
[15]李伯成.微型计算机嵌入式系统设计.第一版.西安:西安电子科技大学出版社, 2004. 1~13
[16] Douglas J. Smith. A Practical Guide for Designing, Synthesizing, and Simulating ASICs and FPGAs using VHDL or Verilog. 1996. 112~114
[17]张葱仔.对象存储控制器的硬件设计与实现: [硕士学位论文]。武汉:华中科技大学图书馆,2006.
[18]范俊.基于FPGA的SATA控制器设计:[硕士学位论文]。武汉:华中科技大学图书馆,2006.
[19] J.BHASKER. Verilog HDL硬件描述语言.北京:机械工业出版社, 2001. 24
[20] Roth CW, Jr. Digital Systems Design Using VHDL. Boston: PWS, 1998. 34
[21] Rabey. Digital Integrated Circuits, a design perspective. NewYork: Prentice Hall, 1995. 58
[22] Altera Corporation. Avalon Bus Specification Reference Manual, Rev 2.3. Altera White Paper. 2003. 23
[23] Altera Corporation. Quartus II Handbook, Rev5.0. Altera White Paper. 2005.10
[24] Altera Corporation. SOPC Builder系统互联架构. 2004. 1~3
[25] Altera Corporation. NiosII CPU的结构与编程模型. 2004. 1~4
[26] Altera Corporation. Nios II Software Developer’s Handbook, Rev 5.1.0. Altera White Paper. 2005. 10~12
[27]王俊卿,杨扬,刘庆文.基于Nios软核处理器的uClinux的移植.嵌入式应用, 2001, 6(3): 123~124
[28] APT Technologies, Inc, Dell Computer Corporation, Intel Corporation, et al. Serial ATA: High Speed Serialized AT Attachment Rev 1.0a. 2003. 1
[29] Altera Corporation. Stratix GX Transceiver User Guide. Altera White Paper. 2005. 19
[30] Xilinx Corporation. Multi-Gigabit Fibre Channel Transport Core Reference Guide. 2005. 10
[31]吴继华,王诚. Altera FPGA/CPLD设计(高级篇).第一版.北京:人民邮电出版社, 2005. 27
[32] Altera Corporation. Stratix GX Development Board Datasheet. Altera White Paper. 2003. 5~6
[33] Micron Corporation. 184-PIN UNBUFFERED DDR SDRAM DIMM. Micron White Paper. 2005. 10
[34]吴健军,初建朋,赖宗声.基于FPGA的DDR SDRAM控制器的实现.微计算机信息, 2006, 1(2): 156~157
[35] Altera Corporation. DDR & DDR2 SDRAM Controller Compiler User Guide. Altera White Paper. 2005. 8
[36] Altera Corporation. Interfacing DDR SDRAM with Stratix & Stratix GX Devices. Altera White Paper. 2005. 12
[37] INCITS/Project T11/1619-D. Fibre Channel Framing and Signaling-2(FC-FS-2) Rev0.40. 2004. 11
[38]姜明华,周敬利,余胜生.两种网络存储协议Fibre channel与iSCSI比较分析.计算机工程与设计, 2004, 25(10): 1654~1657
[39] X3T9.3 Task Group of ANSI. Fibre Channel Physical and Signaling Interface(FC-PH) Rev.4.2. 1993. 1
[40]李洋,周敬利,余胜生.基于Fibre Channel的存储局域网络设计与研究.计算机应用研究, 2000, 17(8): 61-63
[41] Michael D. Ciletti. Verilog HDL高级数字设计.第三版.西安:电子工业出版社, 2006. 75