短数据快速测频及下变频
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摘要
随着现代雷达技术的不断发展,电子侦察设备面临电磁环境日益复杂多变,发展宽带化、数字化、多功能、软件化的电子侦察设备已是一项重要的任务。通信领域软件无线电的成功应用为电子侦察系统的发展提供了一种理想模式。目前,宽带A/D的高速数据流与通用DSP处理能力的不匹配,成为电子侦察系统数字化的最大障碍。另一方面,微电子技术的快速发展,以及FPGA的广泛应用,在很大程度上影响了数字电路的设计与开发。这也为解决高速A/D与DSP处理能力之间的矛盾提供了一种有效的解决方法。
本文利用FPGA技术,设计了全概率宽带数字接收机的实验电路,并在其基础上,提出了一种实用的快速测频算法,并应用到实验电路中,验证了该方法的可行性,改进了测频的抗干扰性能。
本文将并行混频的方法应用到数字下变频电路中,解决了混频的瓶颈问题。利用多相滤波下变频的并行结构特点,使滤波器能够以高效的形式实现。经过多相滤波下变频处理后的数据,在速率和数据量上都有大幅减少,达到了现有通用DSP器件处理能力的要求。
另外,本文还用FPGA搭建了实验电路,利用微机串口,与实验目标板进行控制和数据交换。利用FPGA的在线编程特性,可以方便灵活的对各种实现方法加以验证、比较。
The continuous developments of modern radar technology and the consequent more complicated electromagnetic environment have made it crucial to design wideband, digital, multifunctional software electronic reconnaissance equipment. The digital signal processing has drawn wide attentions in the engineering area and provides an idea development mode for electronic reconnaissance system, which is different form the communication system in its wide-band processing. At present, the mismatch between the high-speed data flow of the wideband A/D converter and processing capability of the general DSP hinders the digitization of the electronic reconnaissance system most. On the other hand, the fast developments of micro-electronic technology and the wide applications of FPGA made digital circuit design more effective and afford an available method to resolve the mismatch between high-speed A/D converters and DSP chips.
The emulation cuicut of full-probability digital receicer is designed with FPGA in the paper. And a fast frequency estimation method is put forward in the paper. As a result, the method has very little quantity of operation and high operation speed. I t will be helpful to the design of frequency measurement devices of digital receivers and on both suspects of theory and practice.
Parallel mixer is applied in the high-efficiency DDC structure, and it solves the bottleneck in mixing. The partition of the tuning channel according to the digital mixing sequence, and the digital down-conversion by means of decimating first, the low-pass filtering and mixing realize efficiently the down-conversion of the variable carrier frequency band-pass signal.
An emulation board of full-probability digital receiver is developed to realize the verification cuicut for the implementations of DDC and frequency estimation algorism with FPGA. The COM port is used to change data between the board and the PC. And this emulation board can be easily used to do verification for the implementations of digital processing.
本文利用FPGA技术,设计了全概率宽带数字接收机的实验电路,并在其基础上,提出了一种实用的快速测频算法,并应用到实验电路中,验证了该方法的可行性,改进了测频的抗干扰性能。
本文将并行混频的方法应用到数字下变频电路中,解决了混频的瓶颈问题。利用多相滤波下变频的并行结构特点,使滤波器能够以高效的形式实现。经过多相滤波下变频处理后的数据,在速率和数据量上都有大幅减少,达到了现有通用DSP器件处理能力的要求。
另外,本文还用FPGA搭建了实验电路,利用微机串口,与实验目标板进行控制和数据交换。利用FPGA的在线编程特性,可以方便灵活的对各种实现方法加以验证、比较。
The continuous developments of modern radar technology and the consequent more complicated electromagnetic environment have made it crucial to design wideband, digital, multifunctional software electronic reconnaissance equipment. The digital signal processing has drawn wide attentions in the engineering area and provides an idea development mode for electronic reconnaissance system, which is different form the communication system in its wide-band processing. At present, the mismatch between the high-speed data flow of the wideband A/D converter and processing capability of the general DSP hinders the digitization of the electronic reconnaissance system most. On the other hand, the fast developments of micro-electronic technology and the wide applications of FPGA made digital circuit design more effective and afford an available method to resolve the mismatch between high-speed A/D converters and DSP chips.
The emulation cuicut of full-probability digital receicer is designed with FPGA in the paper. And a fast frequency estimation method is put forward in the paper. As a result, the method has very little quantity of operation and high operation speed. I t will be helpful to the design of frequency measurement devices of digital receivers and on both suspects of theory and practice.
Parallel mixer is applied in the high-efficiency DDC structure, and it solves the bottleneck in mixing. The partition of the tuning channel according to the digital mixing sequence, and the digital down-conversion by means of decimating first, the low-pass filtering and mixing realize efficiently the down-conversion of the variable carrier frequency band-pass signal.
An emulation board of full-probability digital receiver is developed to realize the verification cuicut for the implementations of DDC and frequency estimation algorism with FPGA. The COM port is used to change data between the board and the PC. And this emulation board can be easily used to do verification for the implementations of digital processing.
引文
[美]詹姆斯。数字式微波接收机―—理论和概念。电子工业出版社。1992。
D.D. Vaccaro. Electronic Warfare Receiving System, Artech House Inc.1993.
电子战新技术。电子侦察干扰。1997-4,4～7。
肖先赐。电子侦察中的信号处理技术。中国电子学会电子对抗分会第十届学术年会。1997:654～659。
J.A. Wepman, Analog-to-digital Converts and Their Applications in Radio Receiver. IEEE Communications Magazine, May, 1995: 39~45.
高志成。电子侦察中的信号采集技术研究 [博士学位论文]。成都:电子科技大学通讯与信息系统。2000-7
顾耀平译。宽带接收机数字技术。电子战文库15。1996-10。
R Baines, The DSP Bottleneck, IEEE Communications Magazine, May, 1995: 46~54.
祝正威。雷达电子战综合信号处理技术,中国电子学会电子对抗分会第十届学术年会。1997:654～665
肖先赐。软件化电子侦察技术。中国电子学会电子对抗分会第十一届学术年会。1999:111～115
P.M. Gale,Intrapulse and Elint System Design, JED. October, 1989:87-106.
J. Mitola. The Software Radio Architecture. IEEE Communications Magazine. May,1995:26～28
R. J. Lackey, D. W. Upmal. Speakeasy: The Military Software Radio. IEEE Communications Magazine. May, 1995: 39~45
【14】 姜秋喜,范国平,祁建冲。数字接收机信号处理探讨,迈向新世纪的舰船。电子工程第六届年会论文集。1999-10,95-98。
【15】 何伟。数字侦察接收机测频算法[研究报告]。成都:电子科技大学通信与信息系统。
2000。
【16】 陆明泉。软件化电子侦察系统 [研究报告]。 成都:电子科技大学通信与信息系统。
【17】 张嵘。多相滤波宽带数字下变频及实现[研究报告]。成都:电子科技大学电子工程学院。
【18】 肖先赐。《现代谱估计原理与应用》哈尔滨工业大学出版社,1998。
【19】 Fudge J, Legako M, Sehreiner C. An approach to efficient wideband digital downconvertion. Proc.ICSPAT, Toronto, Canada. 1998, 713-717.
【20】 Altera Programmable Logic Family. ALTERA Data Sheet, April 2000, Ver1.01
【21】Jan Axelson. Parallel Port Complete. Lakeview Research.
【22】[美]John G.Proakis, Digital Communications Forth Edition. Publishing House of Electronics Industry,2001.
【23】M.L.Flower, J.A.Johnson, Extending the threshold and frequency range for phase-based frequency estimation, IEEE Trans on Signal Processing Vol47,No10,2857
【24】侯伯亨 顾新 《VHDL硬件描述语言与数字逻辑电路设计》西安电子科技大学出版社,1999
【25】张 明 《Verilog HDL实用教程》电子科技大学出版社 ISBN 7-81065-289-3/TP.171
【26】 张俊等,一种数字侦察接收机的快速测频方法。现代雷达,2002年7月第4期。
【27】 陈卫东等,加窗离散傅里叶变换测频分辨率研究 西安电子科技大学学报(自然科学版),2000年4月第2期。
【28】 潘明海等,基于傅里叶变换的超分辨率快速谱估计算法 电子技术应用,1999年第11期。
【29】 黄正谨,徐坚等,《CPLD系统设计技术入门与应用》电子工业出版社,2002。
D.D. Vaccaro. Electronic Warfare Receiving System, Artech House Inc.1993.
电子战新技术。电子侦察干扰。1997-4,4～7。
肖先赐。电子侦察中的信号处理技术。中国电子学会电子对抗分会第十届学术年会。1997:654～659。
J.A. Wepman, Analog-to-digital Converts and Their Applications in Radio Receiver. IEEE Communications Magazine, May, 1995: 39~45.
高志成。电子侦察中的信号采集技术研究 [博士学位论文]。成都:电子科技大学通讯与信息系统。2000-7
顾耀平译。宽带接收机数字技术。电子战文库15。1996-10。
R Baines, The DSP Bottleneck, IEEE Communications Magazine, May, 1995: 46~54.
祝正威。雷达电子战综合信号处理技术,中国电子学会电子对抗分会第十届学术年会。1997:654～665
肖先赐。软件化电子侦察技术。中国电子学会电子对抗分会第十一届学术年会。1999:111～115
P.M. Gale,Intrapulse and Elint System Design, JED. October, 1989:87-106.
J. Mitola. The Software Radio Architecture. IEEE Communications Magazine. May,1995:26～28
R. J. Lackey, D. W. Upmal. Speakeasy: The Military Software Radio. IEEE Communications Magazine. May, 1995: 39~45
【14】 姜秋喜,范国平,祁建冲。数字接收机信号处理探讨,迈向新世纪的舰船。电子工程第六届年会论文集。1999-10,95-98。
【15】 何伟。数字侦察接收机测频算法[研究报告]。成都:电子科技大学通信与信息系统。
2000。
【16】 陆明泉。软件化电子侦察系统 [研究报告]。 成都:电子科技大学通信与信息系统。
【17】 张嵘。多相滤波宽带数字下变频及实现[研究报告]。成都:电子科技大学电子工程学院。
【18】 肖先赐。《现代谱估计原理与应用》哈尔滨工业大学出版社,1998。
【19】 Fudge J, Legako M, Sehreiner C. An approach to efficient wideband digital downconvertion. Proc.ICSPAT, Toronto, Canada. 1998, 713-717.
【20】 Altera Programmable Logic Family. ALTERA Data Sheet, April 2000, Ver1.01
【21】Jan Axelson. Parallel Port Complete. Lakeview Research.
【22】[美]John G.Proakis, Digital Communications Forth Edition. Publishing House of Electronics Industry,2001.
【23】M.L.Flower, J.A.Johnson, Extending the threshold and frequency range for phase-based frequency estimation, IEEE Trans on Signal Processing Vol47,No10,2857
【24】侯伯亨 顾新 《VHDL硬件描述语言与数字逻辑电路设计》西安电子科技大学出版社,1999
【25】张 明 《Verilog HDL实用教程》电子科技大学出版社 ISBN 7-81065-289-3/TP.171
【26】 张俊等,一种数字侦察接收机的快速测频方法。现代雷达,2002年7月第4期。
【27】 陈卫东等,加窗离散傅里叶变换测频分辨率研究 西安电子科技大学学报(自然科学版),2000年4月第2期。
【28】 潘明海等,基于傅里叶变换的超分辨率快速谱估计算法 电子技术应用,1999年第11期。
【29】 黄正谨,徐坚等,《CPLD系统设计技术入门与应用》电子工业出版社,2002。