两阶∑-△调制器的研究与设计
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摘要
模数转换器是模拟与数字世界的接口,目前有多种类型的模数转换器,对于传统A/D转换器,如逐次逼近型、全并行型和流水线型等类型,由于高精度模拟电子器件受到集成度、温度等变化因素的影响,而且为了防止混叠噪声,需要高性能的前置滤波器,这使得传统的A/D转换器的精度很难提高,从而限制了转换器的分辨率。
为了避免这些问题,过采样技术被运用到A/D转换器的设计中。Sigma-deltaADC具有分辨率高,抗干扰能力强,量化噪声小,线性度好的优点。在减少了对模拟电路部分精度要求的同时可以达到和数字电路完美的兼容,可以以较低的成本实现高精度的A/D转换器。所以使得其广泛应用于高分辨率的音频等数模混合电路中。目前sigma-delta ADC主要应用于音频应用和数据采集方面等。
本文对Sigma-delta调制器的工作原理进行了研究和分析,在此基础上设计了一种应用在音频方面的16位两阶Sigma-delta调制器。论文先应用MATLAB软件中的SIMULINK工具对∑-△调制器的各种结构进行分析比较,最终确定采用量化器为一位的单环二阶调制器。调制器采用全差分电容电路实现,调制器的输入为10KHz,过采样率为256,动态范围为98dB。在调制器系统级设计及仿真的基础上,论文接着对调制器中的各种电路模块(如开关电容积分器、共源共栅套筒二级运放、动态比较器、时钟电路等)进行了RTL级设计。经过仿真测试得到,使用米勒补偿的套筒二级运放增益高达94dB,单位增益带宽84M,相位裕度73°;CMOS传输门导通电阻为3K,且导通电阻近似和输入无关,实现了线性性;动态比较器迟滞小于40mV;这些参数可以满足调制器要求。论文最后对套筒二级运算放大器进行了版图实现。
电路仿真设计和版图实现阶段采用的是CADENCE公司的EDA工具,设计采用SMIC 0.18um1P4M(一层多晶硅四层金属)CMOS工艺的设计规则,整个OTA版图面积为0.91*0.79mm~2。
ADC connects analog with the digital world. There are various types of ADCs at present. The traditional ADC, such as successive approximation, flash-type and pipeline and so on, need high-performance pre-filter to prevent aliasing noise. Also high-precision electronic components of the converter could be easily influenced by integration and temperature factors. As a result of this above, it is difficult to improve traditional ADCs' accuracy. In other words, it will hold back the realization of high-resolution converters.
To avoid these problems, the sampling technology has been used in ADCs design. Sigma-delta ADC has several advantages, including high resolution, anti-jamming capability, small quantization noise and good linearity. The analog circuit of Sigma-delta ADC can achieve perfect compatibility with digital circuit without the accuracy requirements. So Sigma-delta ADCs are widely used in high-resolution audio and Mixed-circuits which will be able to lower the cost of high-precision ADCs. Now sigma-delta ADC is used primarily for audio applications and data acquisition aspects.
The paper had made a deeply analysis about the basic principle of sigma-delta modulator. Based on this analysis, a two order Sigma-delta modulator which has 16 bits resolution has been turned out. At first the different structures of the sigma-delta modulators are compared based on MATLAB soft and SIMULINK toolbox. From the analyse of above, a two-order modulator with 1-bit quantizer has been chosen. The modulator is implemented with fully differential switched-capacitor circuits, 10 KHz input, a sampling rate of 256, up to 98dB dynamic range. On the basis of the a behavioral level simulation of the whole system, the discussion will begin by exploring the RTL level design of various circuit block in the modulator, i.e, switched-capacitor integrator, telescopic cascode two-stage operational amplifier, clock-control comparator, clock generation circuit,etc. Simulation results show that OTA achieves a 94dB open-loop gain, a 84M bandth and a 73°phase margin. The turn-on resistance of the switch is 3K and is almost independent of the input. The delay of the comparator is less than 40mV. The parameters satisfy the requirements of the modulator. In the end, the layout design of the telescopic cascade operational amplifier is shown.
The circuit simulation and layout design are based on SMIC0.18um1P4M CMOS process by Cadence EDA tools. The area of the telescopic cascode two-stage operational amplifier with common feedback is 0.91 *0.79mm~2 .
为了避免这些问题,过采样技术被运用到A/D转换器的设计中。Sigma-deltaADC具有分辨率高,抗干扰能力强,量化噪声小,线性度好的优点。在减少了对模拟电路部分精度要求的同时可以达到和数字电路完美的兼容,可以以较低的成本实现高精度的A/D转换器。所以使得其广泛应用于高分辨率的音频等数模混合电路中。目前sigma-delta ADC主要应用于音频应用和数据采集方面等。
本文对Sigma-delta调制器的工作原理进行了研究和分析,在此基础上设计了一种应用在音频方面的16位两阶Sigma-delta调制器。论文先应用MATLAB软件中的SIMULINK工具对∑-△调制器的各种结构进行分析比较,最终确定采用量化器为一位的单环二阶调制器。调制器采用全差分电容电路实现,调制器的输入为10KHz,过采样率为256,动态范围为98dB。在调制器系统级设计及仿真的基础上,论文接着对调制器中的各种电路模块(如开关电容积分器、共源共栅套筒二级运放、动态比较器、时钟电路等)进行了RTL级设计。经过仿真测试得到,使用米勒补偿的套筒二级运放增益高达94dB,单位增益带宽84M,相位裕度73°;CMOS传输门导通电阻为3K,且导通电阻近似和输入无关,实现了线性性;动态比较器迟滞小于40mV;这些参数可以满足调制器要求。论文最后对套筒二级运算放大器进行了版图实现。
电路仿真设计和版图实现阶段采用的是CADENCE公司的EDA工具,设计采用SMIC 0.18um1P4M(一层多晶硅四层金属)CMOS工艺的设计规则,整个OTA版图面积为0.91*0.79mm~2。
ADC connects analog with the digital world. There are various types of ADCs at present. The traditional ADC, such as successive approximation, flash-type and pipeline and so on, need high-performance pre-filter to prevent aliasing noise. Also high-precision electronic components of the converter could be easily influenced by integration and temperature factors. As a result of this above, it is difficult to improve traditional ADCs' accuracy. In other words, it will hold back the realization of high-resolution converters.
To avoid these problems, the sampling technology has been used in ADCs design. Sigma-delta ADC has several advantages, including high resolution, anti-jamming capability, small quantization noise and good linearity. The analog circuit of Sigma-delta ADC can achieve perfect compatibility with digital circuit without the accuracy requirements. So Sigma-delta ADCs are widely used in high-resolution audio and Mixed-circuits which will be able to lower the cost of high-precision ADCs. Now sigma-delta ADC is used primarily for audio applications and data acquisition aspects.
The paper had made a deeply analysis about the basic principle of sigma-delta modulator. Based on this analysis, a two order Sigma-delta modulator which has 16 bits resolution has been turned out. At first the different structures of the sigma-delta modulators are compared based on MATLAB soft and SIMULINK toolbox. From the analyse of above, a two-order modulator with 1-bit quantizer has been chosen. The modulator is implemented with fully differential switched-capacitor circuits, 10 KHz input, a sampling rate of 256, up to 98dB dynamic range. On the basis of the a behavioral level simulation of the whole system, the discussion will begin by exploring the RTL level design of various circuit block in the modulator, i.e, switched-capacitor integrator, telescopic cascode two-stage operational amplifier, clock-control comparator, clock generation circuit,etc. Simulation results show that OTA achieves a 94dB open-loop gain, a 84M bandth and a 73°phase margin. The turn-on resistance of the switch is 3K and is almost independent of the input. The delay of the comparator is less than 40mV. The parameters satisfy the requirements of the modulator. In the end, the layout design of the telescopic cascade operational amplifier is shown.
The circuit simulation and layout design are based on SMIC0.18um1P4M CMOS process by Cadence EDA tools. The area of the telescopic cascode two-stage operational amplifier with common feedback is 0.91 *0.79mm~2 .
引文
[1]冯军.一种16位∑-△音频ADC中调制器的设计与实现[学位论文].电子科技大学.2003.pp.2-3.
[2]A.Yasuda,H.Tanimoto,T.lida.A third-order ∑-△ modulator using second-order noise-shaping dynamic element matching.IEEE J.Solid State Circuit.1998.pp.1879-1886.
[3]Y.Matsuya,K.Uchimura.A16-bit oversampling A/D conversion technology using triple-integration noise shaping.IEEE J.Solid State Circuits.Dec 1987.pp.921-929
[4]Y.Geerts,M.S.J.Steyaert,W.Sansen.A high-performance multibit △∑ CMOS ADC.IEEE J.Solid State Circuits.Dec 2000,Vol.35,No.12.pp.1829-1840.
[5]Moussavi S,Leung B.High-order single-stage single-bit oversampling A/D converter stabilized with local feedback loops.IEEE J.Transactions on Circuits and Systems Ⅱ.Jan 1994.pp.19-25.
[6]Yong-In Park,Karthikeyan S,et al.A 16-bit,5MHz multi-bit sigma-delta ADC using adaptively randomized DWA.Custom Integrated Circuits Conference 2003.Sept 2003.pp.115-118.
[7]T.Salo,S.Lindfors,and K.Halonen.An 80-MHz bandpass △∑ modulator for 100-MHz IF receiver.IEEE J.Solid-State Circuits.Jul 2002,Vol.37,No.7.pp.798-808.
[8]B.P.Delsignore,D.A.Kerth,N.S.School and E.J.Swanson.A monolithic 20-bits delta-digma A/D converter.IEEE J.Solid-state Circuits.1990.pp.1311-1317.
[9](加)Danid A.Johns,Ken Martin著,曾朝阳,赵阳等译.模拟集成电路设计.北京.机械工业出版社.2005.7.1919.381-385
[10](美)R.Jacob Baker,Harry W.Li,David E.Boyce著.陈中建译.CMOS电路设计·布局与仿真.北京.机械工业出版社.2006.1.pp.638-645
[11](美)R.J贝克著.沈树群,李国华译.CMOS混合信号电路设计北京.科学出版社.2005.PP.140-148
[12]胡广书.数字信号处理-理论、算法与实现.第二版.北京.清华大学出版社.2003.pp.115-120
[13]T.Saramaki,H.Tenhunen.Efficient VISI-realizable decimators for sigma-delta analog-to-digital converters.IEEE J.June 1988.pp.1525-1528.
[14]冯军.一种16位∑-△音频ADC中调制器的设计与实现[学位论文].电子科技大学.2003.pp.18-19.
[15]D.A.Kerth,D.B.Kasha,T.G.Mellissionos.A 120dB Linear Switched-capacitor Delta-Sigma Modulator.ISSCC Digest of Technical Papers.1994.pp.196-197.
[16]C.D.Thomposon and S.R.Bernadas.A Digitally-corrected 20b Delta-Sigma Modulator.ISSCC Digest of Technical Papers.1994.pp.194-195.
[17](美)R.Jacob Baker,Harry W.Li,David E.Boyce.CMOS Circuit Design,Layout,and Simulation.北京.机械工业出版社.2005.pp.772-780
[18]Philip.E.Allen,Douglas R.Holberg.CMOS Analog Circuit Design.Second edition.北京.电子工业出版社.2002.pp.574-577.
[19]Rovert M.Gray.Quantization Noise Spectra.IEEE J.Transations of information theory.vol.36,No.6,November 1990.
[20]Rovert M.Gray.,Wu Chou and Ping W.Wong.Quantization Noise in Single-Loop Sigma-Delta Modulation with Sinusoidal Inputs.IEEE J.Transactions on communications,vol.37,No.9.
September 1989.
[21]A.Marques,V.Peluso,M.Steyaert and W.Sansen.Analysis of the Trade-off between Bandwidth,Resolution,and Power in ∑△ Analog to Digital Converters.IEEE J.1998.
[22]S.R.Norsworthy,I.G.Post and H.S.Fetterman.A 14-bit 80-KHz sigma-Delta A/D converter Modeling,Design,and Performance.Evaluation.IEEE J.Solid-state circuits,Vol.24,no.2,April 1989.
[23]Razavi B.Design of Analog CMOS Integrated Circuits.Boston.McGraw-Hill,INC.2002.
[24]B.Boser.EECS 247 lectures 4.University of California at Berkeley.2002
[25](美)R.J贝克著.沈树群,李国华译.CMOS混合信号电路设计 北京.科学出版社.2005.pp.63-67
[26]朱颖.高速两阶sigma-delta调制器研究与设计[学位论文].浙江大学.2006.pp.21-22
[27]B.E.Boser,B.A.Wooley,The Design of Sigma-Delta Modulation Analog-to-Digital Converters.IEEE J.Solid-State Circuits,Vol.23.no.3.December 1988.pp.1298-1308.
[28]K.Y.Leung,E.J.Swanson,K.Leung,and S.S.Zhu.A 5V,118dB△∑ Analog-to-Digital Converter for Wideband Digital Audio.ISSCC Dig Tech Papers.Feb 1997.pp.218-219.
[29]B.P.Brandt.Oversampled Analog-to-Digital Conversion.Ph.D.Thesis,Stanford University.1991.
[30]Steven R.Norsworthy,Richard Schreier and Gabor C.Temes.Delta-Sigma Data Converters Theory,Design,and simulation.IEEE Press.1996.
[31]Augusto Manuel Marques,Vincenzo Peluso,Michel S.J.Steyaert,and Willy Sansen.A 15-bits Resolution 2-MHz Nyquist Rate △∑ ADC in a 1-μ m CMOS Technology.IEEE J.Solid-State Circuits,vol.33,no.7.July 1998.pp.1065-1075.
[32]Fernando Medeiro,Angel Perez-Verdu,Belin Pirez-Verdz,Angel Rodrmguez-Vaquez and Belen Perez-Verdu.Top-Down Design of High-Performance Sigma-Delta Modulator.Kluwer Academic Publishers,INC.1999.
[33]陈旋,庄奕琪.高速二阶∑-△A/D调制器的设计.微电子学与计算机.第八期.pp.167-170.
[34]David A.Johns,Ken Martin.Analog Integrated Circuit Design.N.Y.John Wiley&Sons,Inc.1996
[35]A.Fomasari,P.Malcovati,F.Maloberti.Improved modeling of sigma-delta modulator non-idealities in Simulink.Circuits and Systems.May 2005.Vol.6.5982-5985.
[36]V.F.Dias,G.Palmisano.Fundamental limitations of switch-capacitor sigma-delta modulators.IEEE Proc-G.Feb 1992,Vol.139.No.1.pp.27-33.
[37]S.Brigati,F.Francesconi.Modeling sigma-delta modulator non-idealities in SIMULINK.Circuits and Systems.Jun.1999.Vol.2.pp.384-387.
[38][美]毕查德.拉扎维著.陈贵灿,程军,张瑞智等译.模拟CMOS集成电路设计.西安.西安交通大学出版社.2002.12.pp.268-275.
[39]Khoo K B.Programmable High-dynamic Range Sigma-delta A/D Converter for multistandard Fully-integrated CMOS RF Receiver.Berkeley.University of California.1998.
[40](美)R.Jacob Baker,Harry W.Li,David E.Boyce 著.陈中建译.CMOS电路设计·布局与仿真.北京.机械工业出版社.2006.1.pp.195-200
[41]R.G.H.Eschauzier and J.H Huijsing.Frequency Compensation Techniques for Low-Power Operational Amplifiers.Kluwer.1995.
[42]P.E.Ellen.D.R.霍尔伯格著.冯军译.CMOS Analog Circuit Design.Second Edition.电子工业出版社.2005.10.pp.206-210.
[2]A.Yasuda,H.Tanimoto,T.lida.A third-order ∑-△ modulator using second-order noise-shaping dynamic element matching.IEEE J.Solid State Circuit.1998.pp.1879-1886.
[3]Y.Matsuya,K.Uchimura.A16-bit oversampling A/D conversion technology using triple-integration noise shaping.IEEE J.Solid State Circuits.Dec 1987.pp.921-929
[4]Y.Geerts,M.S.J.Steyaert,W.Sansen.A high-performance multibit △∑ CMOS ADC.IEEE J.Solid State Circuits.Dec 2000,Vol.35,No.12.pp.1829-1840.
[5]Moussavi S,Leung B.High-order single-stage single-bit oversampling A/D converter stabilized with local feedback loops.IEEE J.Transactions on Circuits and Systems Ⅱ.Jan 1994.pp.19-25.
[6]Yong-In Park,Karthikeyan S,et al.A 16-bit,5MHz multi-bit sigma-delta ADC using adaptively randomized DWA.Custom Integrated Circuits Conference 2003.Sept 2003.pp.115-118.
[7]T.Salo,S.Lindfors,and K.Halonen.An 80-MHz bandpass △∑ modulator for 100-MHz IF receiver.IEEE J.Solid-State Circuits.Jul 2002,Vol.37,No.7.pp.798-808.
[8]B.P.Delsignore,D.A.Kerth,N.S.School and E.J.Swanson.A monolithic 20-bits delta-digma A/D converter.IEEE J.Solid-state Circuits.1990.pp.1311-1317.
[9](加)Danid A.Johns,Ken Martin著,曾朝阳,赵阳等译.模拟集成电路设计.北京.机械工业出版社.2005.7.1919.381-385
[10](美)R.Jacob Baker,Harry W.Li,David E.Boyce著.陈中建译.CMOS电路设计·布局与仿真.北京.机械工业出版社.2006.1.pp.638-645
[11](美)R.J贝克著.沈树群,李国华译.CMOS混合信号电路设计北京.科学出版社.2005.PP.140-148
[12]胡广书.数字信号处理-理论、算法与实现.第二版.北京.清华大学出版社.2003.pp.115-120
[13]T.Saramaki,H.Tenhunen.Efficient VISI-realizable decimators for sigma-delta analog-to-digital converters.IEEE J.June 1988.pp.1525-1528.
[14]冯军.一种16位∑-△音频ADC中调制器的设计与实现[学位论文].电子科技大学.2003.pp.18-19.
[15]D.A.Kerth,D.B.Kasha,T.G.Mellissionos.A 120dB Linear Switched-capacitor Delta-Sigma Modulator.ISSCC Digest of Technical Papers.1994.pp.196-197.
[16]C.D.Thomposon and S.R.Bernadas.A Digitally-corrected 20b Delta-Sigma Modulator.ISSCC Digest of Technical Papers.1994.pp.194-195.
[17](美)R.Jacob Baker,Harry W.Li,David E.Boyce.CMOS Circuit Design,Layout,and Simulation.北京.机械工业出版社.2005.pp.772-780
[18]Philip.E.Allen,Douglas R.Holberg.CMOS Analog Circuit Design.Second edition.北京.电子工业出版社.2002.pp.574-577.
[19]Rovert M.Gray.Quantization Noise Spectra.IEEE J.Transations of information theory.vol.36,No.6,November 1990.
[20]Rovert M.Gray.,Wu Chou and Ping W.Wong.Quantization Noise in Single-Loop Sigma-Delta Modulation with Sinusoidal Inputs.IEEE J.Transactions on communications,vol.37,No.9.
September 1989.
[21]A.Marques,V.Peluso,M.Steyaert and W.Sansen.Analysis of the Trade-off between Bandwidth,Resolution,and Power in ∑△ Analog to Digital Converters.IEEE J.1998.
[22]S.R.Norsworthy,I.G.Post and H.S.Fetterman.A 14-bit 80-KHz sigma-Delta A/D converter Modeling,Design,and Performance.Evaluation.IEEE J.Solid-state circuits,Vol.24,no.2,April 1989.
[23]Razavi B.Design of Analog CMOS Integrated Circuits.Boston.McGraw-Hill,INC.2002.
[24]B.Boser.EECS 247 lectures 4.University of California at Berkeley.2002
[25](美)R.J贝克著.沈树群,李国华译.CMOS混合信号电路设计 北京.科学出版社.2005.pp.63-67
[26]朱颖.高速两阶sigma-delta调制器研究与设计[学位论文].浙江大学.2006.pp.21-22
[27]B.E.Boser,B.A.Wooley,The Design of Sigma-Delta Modulation Analog-to-Digital Converters.IEEE J.Solid-State Circuits,Vol.23.no.3.December 1988.pp.1298-1308.
[28]K.Y.Leung,E.J.Swanson,K.Leung,and S.S.Zhu.A 5V,118dB△∑ Analog-to-Digital Converter for Wideband Digital Audio.ISSCC Dig Tech Papers.Feb 1997.pp.218-219.
[29]B.P.Brandt.Oversampled Analog-to-Digital Conversion.Ph.D.Thesis,Stanford University.1991.
[30]Steven R.Norsworthy,Richard Schreier and Gabor C.Temes.Delta-Sigma Data Converters Theory,Design,and simulation.IEEE Press.1996.
[31]Augusto Manuel Marques,Vincenzo Peluso,Michel S.J.Steyaert,and Willy Sansen.A 15-bits Resolution 2-MHz Nyquist Rate △∑ ADC in a 1-μ m CMOS Technology.IEEE J.Solid-State Circuits,vol.33,no.7.July 1998.pp.1065-1075.
[32]Fernando Medeiro,Angel Perez-Verdu,Belin Pirez-Verdz,Angel Rodrmguez-Vaquez and Belen Perez-Verdu.Top-Down Design of High-Performance Sigma-Delta Modulator.Kluwer Academic Publishers,INC.1999.
[33]陈旋,庄奕琪.高速二阶∑-△A/D调制器的设计.微电子学与计算机.第八期.pp.167-170.
[34]David A.Johns,Ken Martin.Analog Integrated Circuit Design.N.Y.John Wiley&Sons,Inc.1996
[35]A.Fomasari,P.Malcovati,F.Maloberti.Improved modeling of sigma-delta modulator non-idealities in Simulink.Circuits and Systems.May 2005.Vol.6.5982-5985.
[36]V.F.Dias,G.Palmisano.Fundamental limitations of switch-capacitor sigma-delta modulators.IEEE Proc-G.Feb 1992,Vol.139.No.1.pp.27-33.
[37]S.Brigati,F.Francesconi.Modeling sigma-delta modulator non-idealities in SIMULINK.Circuits and Systems.Jun.1999.Vol.2.pp.384-387.
[38][美]毕查德.拉扎维著.陈贵灿,程军,张瑞智等译.模拟CMOS集成电路设计.西安.西安交通大学出版社.2002.12.pp.268-275.
[39]Khoo K B.Programmable High-dynamic Range Sigma-delta A/D Converter for multistandard Fully-integrated CMOS RF Receiver.Berkeley.University of California.1998.
[40](美)R.Jacob Baker,Harry W.Li,David E.Boyce 著.陈中建译.CMOS电路设计·布局与仿真.北京.机械工业出版社.2006.1.pp.195-200
[41]R.G.H.Eschauzier and J.H Huijsing.Frequency Compensation Techniques for Low-Power Operational Amplifiers.Kluwer.1995.
[42]P.E.Ellen.D.R.霍尔伯格著.冯军译.CMOS Analog Circuit Design.Second Edition.电子工业出版社.2005.10.pp.206-210.