基于FPGA的数字锁相检测系统
|
摘要
随着当今科学技术的不断发展,现代信号处理技术的应用对微弱信号检测提出了更高的要求。如何将噪声淹没的微弱信号检测出来,并获得正确的数据,是一个十分重要的课题。
微弱信号检测技术的方法很多,对于正弦信号而言,锁相检测是众多方法中非常有效的手段。本文在对微弱信号检测的基础理论与锁相检测算法研究的基础上,做了如下的工作:
对于微弱信号一般需要尽可能高的检测分辨率,而过采样技术能够在一定条件下提高微弱信号检测的有效分辨率,对过采样技术进行了梳理。通过仿真和实测实验证明了采样速率每增加4倍,可以使信噪比提高6dB,相当于使ADC提高了一位分辨率。
针对经典的数字锁相检测,由于要进行大量的乘法运算而导致计算速度慢的问题,本文提出了一种全新的数字锁相检测的快速算法。该快速算法对所需检测频率信号每周期采样4点,利用其正交参考信号的值仅为0、-1和1来去除所有的乘法和部分的加法运算,大幅度地减小了运算量。仿真和实测实验结果表明,对于周期数为N的采样数据计算,可减小8N次的乘法运算和4N次的加法运算。为了提高快速算法的精度,提出了基于过采样的快速算法。结合了过采样和快速算法的优势,采用平均下抽样技术将采样频率还原为4倍于原始信号的频率。引入修正因子改善计算出的幅值的精度,理论上完全消除了误差。仿真与实测实验结果表明,这种全新的基于过采样的快速算法既有过采样和锁相检测的高精度,又具备很高的速度。
针对现有的数据采集常用单片机或DSP作为主控制芯片,但是普通单片机的运行速度不高,经常成为数据通道上的瓶颈,使模数转换芯片的性能无法完全发挥;尽管DSP芯片运行速度快,但其价格和易用性却比不上FPGA的问题。本课题利用Virtex-5 FPGA系列的XC5VLX110T实现数模转换芯片AD8802、模数转换芯片AD7760和UART16550IP核的控制,实现高速采集的全新数字锁相算法。
With the continuous development of science and technology, the application of modern signal processing techniques proposed a higher requirement for detection of weak signal. How to detect the weak signal from the noise and obtain the right data is a very important issue.
Comparing to other ways, the phase-locked detection is a more effective way for the sinusoidal signal. In this paper, the following works have been done based on the weak signal detection theory and lock detection algorithm:
The weak signal detection generally requires the highest resolution,while the over-sampling technology can improve the effective resolution of weak signal detection under certain conditions, and the oversampling technique was combed. The simulation and experimental results show that while the sampling rate increases by 4 times, the SNR can be improved by 6 dB, which means the ADC increases 1 bit.
For the classic digital lock detection, due to a lot of multiplication, the calculation speed is low. A new fast-speed digital lock detection algorithm was proposed in this paper. The fast algorithm is as follows: four samples are taken per period from the frequency signal testing required, the orthogonal reference signal values are set to be 0、-1 and 1 to remove all the multiplication and parts of addition, which can greatly reduce the computation. Simulation and actual experiment results showed the calculation for the sampling data of cycles N can be reduced multiplications by 8N times and additions by 4N times. In order to improve the accuracy of the fast algorithm,the fast algorithm based on the oversampling was proposed. The algorithm which takes the advantages of oversampling and fast algorithm used the average down-sampling technology to reduce the sampling frequency to 4 times of the frequency of the original signal. The modification factor was introduced to improve the calculation accuracy of the amplitude,by which the error can be eliminated completely in theory. The results of the simulation and actual experiment showed that the new fast-speed algorithm based on oversampling was valid not only with the high precision of oversampling and lock-in detection,but also with a high speed.
Today, microcontroller or DSP is often used as the main controlling chip, but the running speed of the microcontroller is not high, which always become a bottleneck on the data channel, so that the analog-digital conversion chips can not play their best performance;Although DSP chips can run faster, but its price and feasibility is worse than FPGA. The subject used the XC5ULX110T of Virtex-5 FPGA family to control the AD8802 of the digital-analog conversion chip、AD7760 of the analog-digital conversion chip and UART16550 IP nuclear to realize the new digital lock algorithm of a high-speed acquisition.
微弱信号检测技术的方法很多,对于正弦信号而言,锁相检测是众多方法中非常有效的手段。本文在对微弱信号检测的基础理论与锁相检测算法研究的基础上,做了如下的工作:
对于微弱信号一般需要尽可能高的检测分辨率,而过采样技术能够在一定条件下提高微弱信号检测的有效分辨率,对过采样技术进行了梳理。通过仿真和实测实验证明了采样速率每增加4倍,可以使信噪比提高6dB,相当于使ADC提高了一位分辨率。
针对经典的数字锁相检测,由于要进行大量的乘法运算而导致计算速度慢的问题,本文提出了一种全新的数字锁相检测的快速算法。该快速算法对所需检测频率信号每周期采样4点,利用其正交参考信号的值仅为0、-1和1来去除所有的乘法和部分的加法运算,大幅度地减小了运算量。仿真和实测实验结果表明,对于周期数为N的采样数据计算,可减小8N次的乘法运算和4N次的加法运算。为了提高快速算法的精度,提出了基于过采样的快速算法。结合了过采样和快速算法的优势,采用平均下抽样技术将采样频率还原为4倍于原始信号的频率。引入修正因子改善计算出的幅值的精度,理论上完全消除了误差。仿真与实测实验结果表明,这种全新的基于过采样的快速算法既有过采样和锁相检测的高精度,又具备很高的速度。
针对现有的数据采集常用单片机或DSP作为主控制芯片,但是普通单片机的运行速度不高,经常成为数据通道上的瓶颈,使模数转换芯片的性能无法完全发挥;尽管DSP芯片运行速度快,但其价格和易用性却比不上FPGA的问题。本课题利用Virtex-5 FPGA系列的XC5VLX110T实现数模转换芯片AD8802、模数转换芯片AD7760和UART16550IP核的控制,实现高速采集的全新数字锁相算法。
With the continuous development of science and technology, the application of modern signal processing techniques proposed a higher requirement for detection of weak signal. How to detect the weak signal from the noise and obtain the right data is a very important issue.
Comparing to other ways, the phase-locked detection is a more effective way for the sinusoidal signal. In this paper, the following works have been done based on the weak signal detection theory and lock detection algorithm:
The weak signal detection generally requires the highest resolution,while the over-sampling technology can improve the effective resolution of weak signal detection under certain conditions, and the oversampling technique was combed. The simulation and experimental results show that while the sampling rate increases by 4 times, the SNR can be improved by 6 dB, which means the ADC increases 1 bit.
For the classic digital lock detection, due to a lot of multiplication, the calculation speed is low. A new fast-speed digital lock detection algorithm was proposed in this paper. The fast algorithm is as follows: four samples are taken per period from the frequency signal testing required, the orthogonal reference signal values are set to be 0、-1 and 1 to remove all the multiplication and parts of addition, which can greatly reduce the computation. Simulation and actual experiment results showed the calculation for the sampling data of cycles N can be reduced multiplications by 8N times and additions by 4N times. In order to improve the accuracy of the fast algorithm,the fast algorithm based on the oversampling was proposed. The algorithm which takes the advantages of oversampling and fast algorithm used the average down-sampling technology to reduce the sampling frequency to 4 times of the frequency of the original signal. The modification factor was introduced to improve the calculation accuracy of the amplitude,by which the error can be eliminated completely in theory. The results of the simulation and actual experiment showed that the new fast-speed algorithm based on oversampling was valid not only with the high precision of oversampling and lock-in detection,but also with a high speed.
Today, microcontroller or DSP is often used as the main controlling chip, but the running speed of the microcontroller is not high, which always become a bottleneck on the data channel, so that the analog-digital conversion chips can not play their best performance;Although DSP chips can run faster, but its price and feasibility is worse than FPGA. The subject used the XC5ULX110T of Virtex-5 FPGA family to control the AD8802 of the digital-analog conversion chip、AD7760 of the analog-digital conversion chip and UART16550 IP nuclear to realize the new digital lock algorithm of a high-speed acquisition.
引文
[1] Ehara N, Sasase I, Mori S. Weak radar signal detection based on wavelet transform [J]. ICASSP-94, 1994 IEEE International Conference on Acoustics, Speech and Signal Processing (Cat.No.94CH3387-8), 1994, 2: II/377-380.
[2] Cheng Defu, Lin Jun, Yu Shengbao, et al. Study on TEM weak signal detection techniques [J]. Journal of Jilin University (Information Science Edition ), 2002,20(2):1-5.
[3]陈银根.微弱信号检测技术的研究[J].江西科学,2004,3(22):193-196.
[4]杨汉祥.微弱信号检测技术的研究[J].科技广场,2009,1:27-30.
[5]黄佳亮.微弱信号检测的噪声和处理方法[J].仪器仪表与分析检测.1995(1):38-54.
[6]赵吉祥,陈超婵,王欢等.微弱电信号检测方法回顾[J].中国计量学院学报,2009,20(3):201-210.
[7]孙志斌,陈佳圭.锁相放大器的新进展[J].物理,2006,35(10):879-884..
[8] The Digital Lock-in Amplifier. SIGNAL RECOVERY,2006,95-98.
[9]诸一栋.基于FPGA的数据采集系统研究:[硕士论文].长春理工大学,2009.
[10]王萍,李小京.利用过采样法提高A/D分辨率和信噪比[J].仪器仪表学报,2002,3(22):1-2.
[11]于光平,张昕.过采样方法与提高ADC分辨率的研究[J].沈阳工业大学学报,2006,2(28):137-139.
[12] Candy J C , Temes G C.Over-sampling methods for A/D and D/A conversion[J]. IEEE Transactions on Gir-cuits and Systems,1987(6):32-39.
[13]孙航,胡灵博,于联锋等.Xilinx可编程逻辑器件应用与系统设计[M].北京:电子工业出版社,2008.
[14]庞会荣.赛灵思Virtex-5平台FPGA拉开65nm竞争帷幕[J].世界电子元器件,2006,97.
[15]高光天,模数转换器应用技术[M],北京:科学出版社,2001.
[16]李方方.微弱信号检测与采集技术的研究:[硕士论文],哈尔滨工业大学,2006.
[17]高晋占.微弱信号检测.北京:清华大学出版社,2002.
[18]赵吉祥,陈超婵,王欢等.微弱电信号检测方法回顾[J].中国计量学院学报.2009,23(3):201-210.
[19]胡诞康.微弱信号的测量[J].电子质量,2005,5:1-4.
[20]胡晋军,郝晓剑,周汉昌.锁相放大器在温度传感器校准系统中的应用[J].计量技术,2008,5:46-48.
[21]高洁.微弱信号检测和处理的若干问题研究:[硕士论文].华北电力大学信号与信息处,2009.
[22]何丽玲,周真,高磊等.单光子计数器冷却系统的设计[J].哈尔滨理工大学学报, 2002,7(5):57-59.
[23]张玉平,杨世植,洪津等.叶绿素荧光仪中微弱荧光信号的探测[J].量子电子学报,2005,22(2):169-172.
[24] Andrew E. Moe, Steve R. Marx, Iqbal Bhinderwala, and Denise M Wilson, A Miniaturized Lock-in Amplifier Design Suitable for Impedance Measurements in Cells,IEEE,2004,2(4):215-218.
[25]郎健.数字锁相放大器关键技术研究:[硕士论文],天津大学,2006.
[26]李文星.数字锁相技术研究:[硕士论文],哈尔滨工业大学,2008..
[27]林凌,王小林,李刚等.一种新型锁相放大器检测电路[J].天津大学学报,38(1),2005,65-68.
[28]任晓玲,许世军等.微弱信号检测的双锁相检测电路研究,西安工程科技学院学报,2002,16(4):322-325.
[29] Adrian A. Dorrington, Rainer Kunnermeyer, A simple microcontroller based digital lock-in amplifier for the detection of low level optical signals, Proceedings of the First IEEE International Workshop on Electronic Design,2002,7(2):1-3.
[30] R Alonso.Low-cost,Digital Lock-in Module with External Reference for Coating Glass Transmission/Reflection Spectrophotometer. Measerement Science and Technology. 2003,14:1-7.
[31] H.Inose, Y.Yasuda, J.Murakami, A telemetering system by code modulation-Δ-ΣModulation, IRE Trans. Space Electron. Telemetry ,1962,8:204-209.
[32] J.C.Candy, A use of limit cycle oscillations to obtain robust analog-to-digital converters, IEEE Transaction on Communications ,1974,22(3):298-305.
[33] J. C. Candy, B. A. Wooley, O. J. Benjamin, A voiceband codec with digital filtering, IEEE Transaction on communicatinons,1981,29(6):815-830.
[34] Schreier R, Temes G. C,Delta-Sigma Data Converter(影印版) [M],北京:科学出版社,2007,1-20.
[35]张丽君.过采样技术及其在生物医学信号检测中的应用:[硕士论文],天津大学,2008.
[36] A.V.奥本海姆,R.W.谢弗,J.R.巴克.离散时间信号处理[M].西安:西安交通大学出版社,2006.
[37] A.V.Oppenheim , D.H.Johnson , Discrete representation of signals ,Proceedings of the IEEE,1972,60(6):681~691.
[38] K.Steiglitz,The equivalence of digital and analog signal processing,Information and Control,1965,8(5):455~467.
[39]张静,罗丁利.Σ?ΔADC原理与应用[J]火控类技术,2006,35:10-13.
[40] ANDERSIM M, MANDAYAM N B, YATES R D. Subspace-based SIR Estimation for TDMA Cellular Systems [J]. Wireless Network, 1998,4(3):241-247.
[41]李夏,李建东,栾英姿.移动信道信噪比估计方法[J].西安电子科技大学学报:自然科学版,2001,28(6):820-823.
[42] TAKIZAWA K, SASAKI S, ZHOU J, et al. On line SNR Estimation for Parallel Combinatorial SS Systems in Nakagami Fading Channels [C]. Proc. Of GLOBE-COM 02, Taipei, Taiwan, 2002:1239-1243.
[43] DUHAMAEL P,VETTERL M. Fast Fourier Transform: A Tutorial Review and A State of the Art [J]. Signal Processing,1990,19(4):259-299.
[44]王正林,刘明.精通MATLAB 7.北京:电子工业出版社,2006,229-234.
[45]李玉国,李刚,林凌.基于ADuC841的USB接口数据采集系统设计.[J].电子产品世界,2006(21):100-104.
[46]石艳丽,李刚,林凌.基于ADuC841的膜片钳放大器的设计[J].国外电子元器件,2006,10:11-15.
[47]薛小刚,葛毅敏.Xilinx ISE 9.X FPGA/CPLD设计指南[M].北京:人民邮电出版社,2008,51-86.
[48]田耕,胡彬,徐文波等.Xilinx ISE Design Suite 10.x FPGA开发指南[M].北京:人民邮电出版社,177-323.
[49]张燕,冯永新.基于Microblaze系统的AD数据采样与实现[J].电子技术,2007,7-8:96-99.
[50]赵泽才,常青.基于MicroBlaze的嵌入式系统设计[J].现代电子技术,2006,6:56-64.
[51] Analog Devices Inc. 12 Channel,8-bit TrimDACS with Power Shutdown AD8802/AD8804 [Z]. Analog Devices Datasheet,1995.
[52]于彤,马杜祥,郭琨.基于FPGA的等占空比的整数分频器设计[J].天津理工大学学报,2008,5(24):86-88.
[53]汪虹,李宏.基于FPGA的等占空比任意整数分频器的设计[J].仪器仪表,2005,16:8-9.
[54] Analog Devices Inc. 2.5MSPS,24-Bit,100dB Sigma-Delta ADC with On-chip Buffer AD7760 [Z]. Analog Devices Datasheet,2006.
[55] Analog Devices Inc. Ultralow Noise XFET Voltage References with Current Sink and Source Capability with Current Sink and Source Capability ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 [Z]. Analog Devices Datasheet,2003-2010.
[56]王建伟,王厚军,王毅.基于FPGA的UART16550的设计[J].现代电子技术,2007,9:54-55.
[2] Cheng Defu, Lin Jun, Yu Shengbao, et al. Study on TEM weak signal detection techniques [J]. Journal of Jilin University (Information Science Edition ), 2002,20(2):1-5.
[3]陈银根.微弱信号检测技术的研究[J].江西科学,2004,3(22):193-196.
[4]杨汉祥.微弱信号检测技术的研究[J].科技广场,2009,1:27-30.
[5]黄佳亮.微弱信号检测的噪声和处理方法[J].仪器仪表与分析检测.1995(1):38-54.
[6]赵吉祥,陈超婵,王欢等.微弱电信号检测方法回顾[J].中国计量学院学报,2009,20(3):201-210.
[7]孙志斌,陈佳圭.锁相放大器的新进展[J].物理,2006,35(10):879-884..
[8] The Digital Lock-in Amplifier. SIGNAL RECOVERY,2006,95-98.
[9]诸一栋.基于FPGA的数据采集系统研究:[硕士论文].长春理工大学,2009.
[10]王萍,李小京.利用过采样法提高A/D分辨率和信噪比[J].仪器仪表学报,2002,3(22):1-2.
[11]于光平,张昕.过采样方法与提高ADC分辨率的研究[J].沈阳工业大学学报,2006,2(28):137-139.
[12] Candy J C , Temes G C.Over-sampling methods for A/D and D/A conversion[J]. IEEE Transactions on Gir-cuits and Systems,1987(6):32-39.
[13]孙航,胡灵博,于联锋等.Xilinx可编程逻辑器件应用与系统设计[M].北京:电子工业出版社,2008.
[14]庞会荣.赛灵思Virtex-5平台FPGA拉开65nm竞争帷幕[J].世界电子元器件,2006,97.
[15]高光天,模数转换器应用技术[M],北京:科学出版社,2001.
[16]李方方.微弱信号检测与采集技术的研究:[硕士论文],哈尔滨工业大学,2006.
[17]高晋占.微弱信号检测.北京:清华大学出版社,2002.
[18]赵吉祥,陈超婵,王欢等.微弱电信号检测方法回顾[J].中国计量学院学报.2009,23(3):201-210.
[19]胡诞康.微弱信号的测量[J].电子质量,2005,5:1-4.
[20]胡晋军,郝晓剑,周汉昌.锁相放大器在温度传感器校准系统中的应用[J].计量技术,2008,5:46-48.
[21]高洁.微弱信号检测和处理的若干问题研究:[硕士论文].华北电力大学信号与信息处,2009.
[22]何丽玲,周真,高磊等.单光子计数器冷却系统的设计[J].哈尔滨理工大学学报, 2002,7(5):57-59.
[23]张玉平,杨世植,洪津等.叶绿素荧光仪中微弱荧光信号的探测[J].量子电子学报,2005,22(2):169-172.
[24] Andrew E. Moe, Steve R. Marx, Iqbal Bhinderwala, and Denise M Wilson, A Miniaturized Lock-in Amplifier Design Suitable for Impedance Measurements in Cells,IEEE,2004,2(4):215-218.
[25]郎健.数字锁相放大器关键技术研究:[硕士论文],天津大学,2006.
[26]李文星.数字锁相技术研究:[硕士论文],哈尔滨工业大学,2008..
[27]林凌,王小林,李刚等.一种新型锁相放大器检测电路[J].天津大学学报,38(1),2005,65-68.
[28]任晓玲,许世军等.微弱信号检测的双锁相检测电路研究,西安工程科技学院学报,2002,16(4):322-325.
[29] Adrian A. Dorrington, Rainer Kunnermeyer, A simple microcontroller based digital lock-in amplifier for the detection of low level optical signals, Proceedings of the First IEEE International Workshop on Electronic Design,2002,7(2):1-3.
[30] R Alonso.Low-cost,Digital Lock-in Module with External Reference for Coating Glass Transmission/Reflection Spectrophotometer. Measerement Science and Technology. 2003,14:1-7.
[31] H.Inose, Y.Yasuda, J.Murakami, A telemetering system by code modulation-Δ-ΣModulation, IRE Trans. Space Electron. Telemetry ,1962,8:204-209.
[32] J.C.Candy, A use of limit cycle oscillations to obtain robust analog-to-digital converters, IEEE Transaction on Communications ,1974,22(3):298-305.
[33] J. C. Candy, B. A. Wooley, O. J. Benjamin, A voiceband codec with digital filtering, IEEE Transaction on communicatinons,1981,29(6):815-830.
[34] Schreier R, Temes G. C,Delta-Sigma Data Converter(影印版) [M],北京:科学出版社,2007,1-20.
[35]张丽君.过采样技术及其在生物医学信号检测中的应用:[硕士论文],天津大学,2008.
[36] A.V.奥本海姆,R.W.谢弗,J.R.巴克.离散时间信号处理[M].西安:西安交通大学出版社,2006.
[37] A.V.Oppenheim , D.H.Johnson , Discrete representation of signals ,Proceedings of the IEEE,1972,60(6):681~691.
[38] K.Steiglitz,The equivalence of digital and analog signal processing,Information and Control,1965,8(5):455~467.
[39]张静,罗丁利.Σ?ΔADC原理与应用[J]火控类技术,2006,35:10-13.
[40] ANDERSIM M, MANDAYAM N B, YATES R D. Subspace-based SIR Estimation for TDMA Cellular Systems [J]. Wireless Network, 1998,4(3):241-247.
[41]李夏,李建东,栾英姿.移动信道信噪比估计方法[J].西安电子科技大学学报:自然科学版,2001,28(6):820-823.
[42] TAKIZAWA K, SASAKI S, ZHOU J, et al. On line SNR Estimation for Parallel Combinatorial SS Systems in Nakagami Fading Channels [C]. Proc. Of GLOBE-COM 02, Taipei, Taiwan, 2002:1239-1243.
[43] DUHAMAEL P,VETTERL M. Fast Fourier Transform: A Tutorial Review and A State of the Art [J]. Signal Processing,1990,19(4):259-299.
[44]王正林,刘明.精通MATLAB 7.北京:电子工业出版社,2006,229-234.
[45]李玉国,李刚,林凌.基于ADuC841的USB接口数据采集系统设计.[J].电子产品世界,2006(21):100-104.
[46]石艳丽,李刚,林凌.基于ADuC841的膜片钳放大器的设计[J].国外电子元器件,2006,10:11-15.
[47]薛小刚,葛毅敏.Xilinx ISE 9.X FPGA/CPLD设计指南[M].北京:人民邮电出版社,2008,51-86.
[48]田耕,胡彬,徐文波等.Xilinx ISE Design Suite 10.x FPGA开发指南[M].北京:人民邮电出版社,177-323.
[49]张燕,冯永新.基于Microblaze系统的AD数据采样与实现[J].电子技术,2007,7-8:96-99.
[50]赵泽才,常青.基于MicroBlaze的嵌入式系统设计[J].现代电子技术,2006,6:56-64.
[51] Analog Devices Inc. 12 Channel,8-bit TrimDACS with Power Shutdown AD8802/AD8804 [Z]. Analog Devices Datasheet,1995.
[52]于彤,马杜祥,郭琨.基于FPGA的等占空比的整数分频器设计[J].天津理工大学学报,2008,5(24):86-88.
[53]汪虹,李宏.基于FPGA的等占空比任意整数分频器的设计[J].仪器仪表,2005,16:8-9.
[54] Analog Devices Inc. 2.5MSPS,24-Bit,100dB Sigma-Delta ADC with On-chip Buffer AD7760 [Z]. Analog Devices Datasheet,2006.
[55] Analog Devices Inc. Ultralow Noise XFET Voltage References with Current Sink and Source Capability with Current Sink and Source Capability ADR430/ADR431/ADR433/ADR434/ADR435/ADR439 [Z]. Analog Devices Datasheet,2003-2010.
[56]王建伟,王厚军,王毅.基于FPGA的UART16550的设计[J].现代电子技术,2007,9:54-55.