面向图像处理的异构多核仿真系统研究
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摘要
图像信息在人类生活和社会发展中发挥着越来越重要的作用,提高图像处理速度已经成为各个领域要解决的热点问题之一。专用处理器核是解决图像处理问题的有效手段,但由于任务缺乏并行,不可扩展等缺点,致使许多图像处理系统难于满足人们对视频图像不断增长的业务需求和应用需求。针对这一问题,本文设计实现了面向图像处理的异构多核处理器仿真平台系统。
本文首先分析了计算机仿真技术、专用指令集定制技术和多核通信机制,提出了一种基于集束分类模型的指令集定制方法,主要采用集束分类方法把候选指令集进行分类来解决专用指令集定制过程中搜索空间较大的问题。在对图像处理算法分析过程中,运用该指令集定制方法对图像处理算法中的一些高频和耗时操作定制为专用指令,利用Open Virtual Platform(OVP) API对OVPsim中现有处理器进行指令扩展并实现了一款面向图像处理的专用指令集处理器核。实验结果表明专用指令集处理器核比原处理器核在性能上有较大的提高。
其次,本文以专用指令集处理器核为辅助核,OVPsim多核模拟器中的MIPS处理器核为主核,实现了一款面向图像处理的异构多核仿真平台。本文针对图像处理算法特性研究了异构多核处理器通信机制,设计了一种基于通信控制单元(Communication Control Unit,CCU)的多核通信模型,采用信箱模块和DMA模块来加速异构多核处理器对图像处理过程中的通信密集型任务和计算密集型任务的处理。本文利用OVP的BeHavior Model(BHM)和Peripheral Programming Model(PPM) API实现了通信控制单元并对异构多核仿真平台进行了扩展。经过通信模型对比实验表明,采用通信控制单元的异构多核通信方案比经典的CELL异构多核通信方案在效率上提高了11.3%。
最后本文分析了基于缝隙分析的快速纸张计数系统中的图像处理算法,以该系统中图像处理耗时模块为程序测试集,如中值滤波、形态学运算等,在本文设计实现的面向图像处理的多核异构仿真平台上进行仿真实验。分别采用单核、同构多核和异构多核三种结构对测试集进行了实验,实验表明本文设计实现的可扩展的异构多核仿真平台能较大地改善对图像处理的速度。
Image information plays an increasingly important role in human life and social development, improving the speed of image processing has become one of hot problems needed to solve in many fields. Image processor is an effective means to solve the problem of image processing, but due to shortcomings that tasks can't extended and be parallel, many image processing systems are difficult to meet people's business demands and applications demands for video and image. According to the problems, this thesis designs and implements a heterogeneous multi-core simulation platform for image processing.
Firstly, this thesis analyzes computer simulation technology, special instruction set customization technology and multi-core communication mechanism, and a method of instruction set customization based on cluster classification is proposed, which mainly adopts cluster classification method to classify the basic instruction set for the problem of big search space in the process of special instruction set customization. In analysis process of image processing algorithm, high frequency and time-consuming operations of the image processing algorithm are designed for special instructions using the method of instruction set customization. This thesis expands instruction set of MIPS processor and realizes a special instruction set processor core for image processing using API of Open Virtual Platform (OVP). Experimental results show that the performance of the special instruction set processor core is greatly raised compared to the original processor core.
This thesis selects MIPS processor as a main core, selects the specific instruction set processor core for the secondary, and realizes a heterogeneous multi-core simulation platform for image processing. The thesis studies communication mechanism of the heterogeneous multi-core processor aimed to the performance of image processing algorithm, and puts forward a multi-core communication model based on communication control unit, which uses mailbox module and DMA module to speed up processing communication-intensive tasks and compute-intensive tasks, then this thesis realizes the communication control unit and expands the heterogeneous multi-core simulation platform using BeHavior Model(BHM) and Peripheral Programming Model(PPM) API of OVP. Experiment results in multi-core communication model indicate that the communication mechanism based on CCU improves by 11.3% on efficiency compared to the communication mechanism of CELL
Finally, this thesis analyzes image processing algorithms of the rapid paper counting system based on the gap analysis, takes time-consuming modules of image processing in the system as program test set, such as median filtering, morphological operation, etc, which is experimented in the heterogeneous multi-core simulation platform. In the structure of single, isomorphism multi-core and heterogeneous multi-core, experiments are done for testing the program set, experimental results show that the speed of image processing has greatly improved in the expandable heterogeneous multi-core simulation platform which is designed and implemented in the thesis.
本文首先分析了计算机仿真技术、专用指令集定制技术和多核通信机制,提出了一种基于集束分类模型的指令集定制方法,主要采用集束分类方法把候选指令集进行分类来解决专用指令集定制过程中搜索空间较大的问题。在对图像处理算法分析过程中,运用该指令集定制方法对图像处理算法中的一些高频和耗时操作定制为专用指令,利用Open Virtual Platform(OVP) API对OVPsim中现有处理器进行指令扩展并实现了一款面向图像处理的专用指令集处理器核。实验结果表明专用指令集处理器核比原处理器核在性能上有较大的提高。
其次,本文以专用指令集处理器核为辅助核,OVPsim多核模拟器中的MIPS处理器核为主核,实现了一款面向图像处理的异构多核仿真平台。本文针对图像处理算法特性研究了异构多核处理器通信机制,设计了一种基于通信控制单元(Communication Control Unit,CCU)的多核通信模型,采用信箱模块和DMA模块来加速异构多核处理器对图像处理过程中的通信密集型任务和计算密集型任务的处理。本文利用OVP的BeHavior Model(BHM)和Peripheral Programming Model(PPM) API实现了通信控制单元并对异构多核仿真平台进行了扩展。经过通信模型对比实验表明,采用通信控制单元的异构多核通信方案比经典的CELL异构多核通信方案在效率上提高了11.3%。
最后本文分析了基于缝隙分析的快速纸张计数系统中的图像处理算法,以该系统中图像处理耗时模块为程序测试集,如中值滤波、形态学运算等,在本文设计实现的面向图像处理的多核异构仿真平台上进行仿真实验。分别采用单核、同构多核和异构多核三种结构对测试集进行了实验,实验表明本文设计实现的可扩展的异构多核仿真平台能较大地改善对图像处理的速度。
Image information plays an increasingly important role in human life and social development, improving the speed of image processing has become one of hot problems needed to solve in many fields. Image processor is an effective means to solve the problem of image processing, but due to shortcomings that tasks can't extended and be parallel, many image processing systems are difficult to meet people's business demands and applications demands for video and image. According to the problems, this thesis designs and implements a heterogeneous multi-core simulation platform for image processing.
Firstly, this thesis analyzes computer simulation technology, special instruction set customization technology and multi-core communication mechanism, and a method of instruction set customization based on cluster classification is proposed, which mainly adopts cluster classification method to classify the basic instruction set for the problem of big search space in the process of special instruction set customization. In analysis process of image processing algorithm, high frequency and time-consuming operations of the image processing algorithm are designed for special instructions using the method of instruction set customization. This thesis expands instruction set of MIPS processor and realizes a special instruction set processor core for image processing using API of Open Virtual Platform (OVP). Experimental results show that the performance of the special instruction set processor core is greatly raised compared to the original processor core.
This thesis selects MIPS processor as a main core, selects the specific instruction set processor core for the secondary, and realizes a heterogeneous multi-core simulation platform for image processing. The thesis studies communication mechanism of the heterogeneous multi-core processor aimed to the performance of image processing algorithm, and puts forward a multi-core communication model based on communication control unit, which uses mailbox module and DMA module to speed up processing communication-intensive tasks and compute-intensive tasks, then this thesis realizes the communication control unit and expands the heterogeneous multi-core simulation platform using BeHavior Model(BHM) and Peripheral Programming Model(PPM) API of OVP. Experiment results in multi-core communication model indicate that the communication mechanism based on CCU improves by 11.3% on efficiency compared to the communication mechanism of CELL
Finally, this thesis analyzes image processing algorithms of the rapid paper counting system based on the gap analysis, takes time-consuming modules of image processing in the system as program test set, such as median filtering, morphological operation, etc, which is experimented in the heterogeneous multi-core simulation platform. In the structure of single, isomorphism multi-core and heterogeneous multi-core, experiments are done for testing the program set, experimental results show that the speed of image processing has greatly improved in the expandable heterogeneous multi-core simulation platform which is designed and implemented in the thesis.
引文
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[2]岳虹.嵌入式异构多核处理器设计与实现关键技术研究：[博士学位论文].长沙：国防科技大学,2008.
[3]陈国兵.嵌入式异构多核体系的片上通信：[硕士学位论文].浙江：浙江大学,2006.
[4]James SW Song, Pallas Yang, et al. Hierarchical Timing Closure Methodology For OMAPTM:An Open Multimedia Application Platform[J]. IEEE Trans. Circuits Syst. Video Technol,2003,4(8):238-241.
[5]Kun-YuanHsieh, Yen-ChihLiu, Po-WenWu. Enabling Streaming Remoting on Embedded Dual-core Processors[C].37th International Conference on Parallel Processing,2008,20(2):18-24.
[6]李兴红.基于OMAP的嵌入式系统开发[J].数据采集与处理,2008,23(5)：181-184.
[7]张立民,董伯青,由涛等.基于OMAP的嵌入式手持无线终端的研究与实现[J].南开大学学报(自然科学版),2007,240(5)：80-84.
[8]刘虎,陈启美.基于Cell的H.264关键算法的移植研究[J].仪表技术,2008,10(2)： 9-15.
[9]冯国富,董小社,丁彦飞.面向Cell宽带引擎架构的异构多核访存技术[J].西安交通大学学报,2009,43(2)：1-5.
[10]GSCHWIND M. Chip multiprocessing and the cell broadband engine [C]. Proceedings of ACM Computing Frontiers. New York, ACM Press,2006:19-25.
[11]S. Dutta, R.Jensen, and A. Rieckmann. A Multiprocessor SOC for Advanced Set-Top Box and Digital TV Systems [J]. IEEE Design and Test of Computers, 2001,13(3):21-31.
[12]李兴友,游志胜.基于Nexperia数字多媒体平台的设计与实现[J].四川大学学报(自然科学版),2003,40(5)：858-863.
[13]Kapasi, U. J, Dally, W. J. The Imagine Stream Processor[J]. VLSI in Computers and Processors,2002,16(8):282-288.
[14]杨学军,曾丽芳Imagine流处理器上流的优化组织方法[J].计算机学报,2008,31(7)：181-184.
[15]Kapasi. U. J, Rixner. S et al. Programmable stream processor[J]. IEEE Computer,2003,36(8):54-62.
[16]陈波.通用嵌入式微处理器仿真平台的研究与实现[D].厦门大学,2009.
[17]高轶杰,郑扣根,冯骁斌.基于MIPSX的模拟器研究与移植[J].计算机工程,2007,33(4)：55-57.
[18]李飞跃.基于ARMulator的嵌入式uClinux软件开发环境[J].重庆文理学院学报(自然科学版),2008,27(5)：39-41.
[19]杨军,王镇.基于ARMulator扩展的AMBA总线及性能分析[J].微电子技术,2006,14(20)：116-120.
[20]蔡启先,李日初.DLX处理器浮点数流水线性能的研究[J].计算机工程,2006,32(9)：222-224.
[21]Ibrahim H A, Mohandes A M, Ragaie H F et al. Synthesis and Physical Design of DLX RISC Processor[C].16th National Radio Science Conference, 1999,30(4):22-24.
[22]林明亮,祝永新.基于SimpleScalar的异构多核仿真器[J].微电子学与计算机,2007,24(7)：204-208.
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