基于FPGA的数字上下变频器的研究与实现
摘要
目前，软件无线电中普遍采用的是中频数字化方案，这就使得数字上下变频成为了其关键技术之一，本文主要研究了基于FPGA的数字上下变频器的设计和实现。文中首先介绍了数字上下变频的相关基本理论及常用算法，然后采用自顶向下的模块化设计方法，将数字上下变频器按功能划分为若干模块，并组成一个模块库，在实际应用中，优化配置各个模块来满足具体系统的性能要求。在数控振荡器的设计中，给出了基于查找表(LUT)和坐标旋转矢量(CORDIC)算法的设计方案；在数字下变频中，设计实现了积分梳状(CIC)滤波器和半带滤波器(HBF)相结合的抽取滤波器组，为了补偿CIC滤波器的通带衰减，引入了二阶多项式(ISOP)补偿滤波器。并研究了采用分布式(DA)算法的FIR信道整形滤波器的实现；在数字上变频中，用整形CIC(SCIC)滤波器实现了多级内插滤波器组。最后通过对各个功能模块的FPGA仿真，验证了设计的正确性。
Today, intermediate frequency (IF) signal digitalization becomes the prevalent choice in Software Radio (SWR), thus, Digital Up Conversion (DUC) and Digital Down Conversion (DDC) are ones of the key techniques of SWR. This paper deals with the design and implementation of DUC and DDC by field-programmable gate array (FPGA). Firstly, the related theory and algorithm of DUC and DDC are introduced. Secondly, using Top-Down design method, DUC and DDC are divided to many function modules and organized to the module library. In practice, these function modules are selected, configured and optimized to satisfy the system demand. Based on look-up table (LUT) and Coordinate Rotation Digital Computer (CORDIC) algorithm, a method for implementing a numerically controlled oscillator (NCO) is described in the paper; The decimating digital filter of DDC is designed as the cascade of cascaded integrator-comb (CIC) filters and Half-Band filters (HBF). To compensate the CIC's passband attenuation, second-order polynomials (ISOP) filter is used. The channel shape filter is implemented by Distributed Arithmatic (DA). In DUC, interpolating digital filter consists of a sharpened CIC (SCIC) filter. At last, every function module designed in this paper is simulated by FPGA. The results show the design is correct.
Today, intermediate frequency (IF) signal digitalization becomes the prevalent choice in Software Radio (SWR), thus, Digital Up Conversion (DUC) and Digital Down Conversion (DDC) are ones of the key techniques of SWR. This paper deals with the design and implementation of DUC and DDC by field-programmable gate array (FPGA). Firstly, the related theory and algorithm of DUC and DDC are introduced. Secondly, using Top-Down design method, DUC and DDC are divided to many function modules and organized to the module library. In practice, these function modules are selected, configured and optimized to satisfy the system demand. Based on look-up table (LUT) and Coordinate Rotation Digital Computer (CORDIC) algorithm, a method for implementing a numerically controlled oscillator (NCO) is described in the paper; The decimating digital filter of DDC is designed as the cascade of cascaded integrator-comb (CIC) filters and Half-Band filters (HBF). To compensate the CIC's passband attenuation, second-order polynomials (ISOP) filter is used. The channel shape filter is implemented by Distributed Arithmatic (DA). In DUC, interpolating digital filter consists of a sharpened CIC (SCIC) filter. At last, every function module designed in this paper is simulated by FPGA. The results show the design is correct.
引文
[1] 杨小牛，楼才义，徐建良．软件无线电原理与应用．北京：电子工业出版社，2001
[2] Cummings, M. Haruyama. S. FPGA in The Software Radio. IEEE Communications Magazine, 1999, 37(2): 108-112
[3] 杨小牛，邹少丞，楼才义．软件无线电技术与实现．北京：电子工业出版社，2004
[4] 宗孔德．多抽样率信号处理．清华大学出版社，1996：2-10
[5] E. Hongenauer. An Economical Class of Digital Filters for Decimation and Interpolation. IEEE Trans, A Coustics, Speech and Signal Proc., 1981, 29(2): 155-162
[6] Ray Andraka. A Survey of CORDIC Algorithms for FPGA Based Computers. Andraka Consulting Group, Inc
[7] Walter J S. A Unified Algorithm for Elementary Functions [A]. A FIPS Spring Joint Computer Conf[c]. 1997, 38: 397-385
[8] Stanley A. White. Applications of Distributed Arithmetic to Digital Signal Processing: A Tutorial Review. Ieee Assp Magazine, July, 1989
[9] Intersil Inc, HSP50214B Datasheet. www.Intersil.com May 1999
[10] 李涛，韩秋月．基于CORDIC算法的三角函数发生器．电子技术应用，1999，(6)：52-53
[11] 冯忻．数字上下变频关键技术研究．西安电子科技大学硕士论文，2004
[12] 刘凌，胡永生译．数字信号处理的FPGA实现．北京：清华大学出版社，1999
[13] Xilinx Datasheet, Cascaded Integrator-comb(CIC) Filter V3.0
[14] Alan Y. K Wentus, Zhongnong Jiang, Alan N, Willson. Application of Filter Sharpening to Cascaded Integrator-comb Decimation Filter[J]. IEEE. Trans, 1997, 2. 45(2): 28-32
[15] Hyuk J. Oh, Sunbinkim, Ginkyu Choi. On the Use of Interpolated Second-order Polynomicals for Efficient Filter Design in Programmable Down conversion, IEEE Journal on Selected Areas in Communications, 1999, 17(4)
[16] Willson, Alan N. Jr, Orchard. H. J. Design Method for Half-band FIR Filters. IEEE Trans, 1999, 46(1): 95-101
[17] 刘益成，林其伟．半带滤波器原理与设计．石油仪器，1995，9(1)：36-40
[18] 郭晓宇，潘登，杨同中．基于FPGA实现FIR滤波器的研究，www.21cn.com 2004，7
[19] 徐以涛，王呈贵，王金龙．基于DA算法的FIR滤波器硬件实现．解放军理 工大学学报(自然科学版)，2003，4(3)：22．25
[20] 褚振勇，翁木云．FPGA设计及应用．西安电子科技大学出版社，2002
[21] J. Kaiser, R. Hamming. "Sharpening the Response of A Symmetric Nonrecursive Filter by Multiple Use of the Same Filter". IEEE Trans, Acoust, Speech and Signal Processing, Vol Assp-25, Oct, 1997: 415-422
[2] Cummings, M. Haruyama. S. FPGA in The Software Radio. IEEE Communications Magazine, 1999, 37(2): 108-112
[3] 杨小牛，邹少丞，楼才义．软件无线电技术与实现．北京：电子工业出版社，2004
[4] 宗孔德．多抽样率信号处理．清华大学出版社，1996：2-10
[5] E. Hongenauer. An Economical Class of Digital Filters for Decimation and Interpolation. IEEE Trans, A Coustics, Speech and Signal Proc., 1981, 29(2): 155-162
[6] Ray Andraka. A Survey of CORDIC Algorithms for FPGA Based Computers. Andraka Consulting Group, Inc
[7] Walter J S. A Unified Algorithm for Elementary Functions [A]. A FIPS Spring Joint Computer Conf[c]. 1997, 38: 397-385
[8] Stanley A. White. Applications of Distributed Arithmetic to Digital Signal Processing: A Tutorial Review. Ieee Assp Magazine, July, 1989
[9] Intersil Inc, HSP50214B Datasheet. www.Intersil.com May 1999
[10] 李涛，韩秋月．基于CORDIC算法的三角函数发生器．电子技术应用，1999，(6)：52-53
[11] 冯忻．数字上下变频关键技术研究．西安电子科技大学硕士论文，2004
[12] 刘凌，胡永生译．数字信号处理的FPGA实现．北京：清华大学出版社，1999
[13] Xilinx Datasheet, Cascaded Integrator-comb(CIC) Filter V3.0
[14] Alan Y. K Wentus, Zhongnong Jiang, Alan N, Willson. Application of Filter Sharpening to Cascaded Integrator-comb Decimation Filter[J]. IEEE. Trans, 1997, 2. 45(2): 28-32
[15] Hyuk J. Oh, Sunbinkim, Ginkyu Choi. On the Use of Interpolated Second-order Polynomicals for Efficient Filter Design in Programmable Down conversion, IEEE Journal on Selected Areas in Communications, 1999, 17(4)
[16] Willson, Alan N. Jr, Orchard. H. J. Design Method for Half-band FIR Filters. IEEE Trans, 1999, 46(1): 95-101
[17] 刘益成，林其伟．半带滤波器原理与设计．石油仪器，1995，9(1)：36-40
[18] 郭晓宇，潘登，杨同中．基于FPGA实现FIR滤波器的研究，www.21cn.com 2004，7
[19] 徐以涛，王呈贵，王金龙．基于DA算法的FIR滤波器硬件实现．解放军理 工大学学报(自然科学版)，2003，4(3)：22．25
[20] 褚振勇，翁木云．FPGA设计及应用．西安电子科技大学出版社，2002
[21] J. Kaiser, R. Hamming. "Sharpening the Response of A Symmetric Nonrecursive Filter by Multiple Use of the Same Filter". IEEE Trans, Acoust, Speech and Signal Processing, Vol Assp-25, Oct, 1997: 415-422