基于FPGA的QDPSK调制解调技术的研究及实现
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摘要
现代通信系统要求通信距离远、通信容量大、传输质量好。作为其关键技术之一的调制解调技术一直是人们研究的一个重要方向。用FPGA实现调制解调器具有体积小、功耗低、集成度高、可软件升级、抗干扰能力强的特点,符合未来通信技术发展的方向。论文从以下几个方面讨论和实现了基于FPGA的调制解调系统。
     论文首先介绍了调制解调系统的发展现状及FPGA的相关知识。然后介绍了几种常见的相位调制解调方式,重点是QDPSK调制解调系统的理论算法。
     论文重点介绍了QDPSK解调调制系统的具体实现。首先,在在MATLAB环境下对系统里的每个子模块完成了功能仿真,并取得满意的仿真结果;其次,在QDPSK调制解调系统功能仿真正确的基础上,对每个模块的功能编写C++算法,并且验证了算法的正确性和可实现性;最后,在altera公司的FPGA开发平台QuartusⅡ6.0上,采用Verilog硬件描述语言对QDPSK调制解调系统实现了时序仿真和综合仿真。
For distance, large communication capability and high transmission quality arerequired in modern communication system. Modulation and demodulation, which is one ofthe most key techniques in communication, has always been an important aspect ofresearching field. The modern realized by FPGA has many advantages, such as smallervolume, low-power dissipation, integrity high, updated of software, capability ofantijamming and so on. This is in accordance with the direction of the future thechniquesdevelopment. This thesis primarily discusses the modulation and demodulationcommunication system based on FPGA from some aspects below.
     First, the thesis resarches the development and actuality of the modulation anddemodulation technique and the characteristics and the design procedure of FPGA.
     The thesis introduced the specific realization of the QDPSK modulation anddemodulaton majorly. Firstly, QDPSK modulation and demodulation system are separatlymade, every model of the systems is analyised. And the simulations of the systems aremade by MATLAB, the results of the simulation is satisfying. Secondly, on the right basisof the modulation, C++ algorithm of every model is programmed. Correctness andrealizability of the algorithms are verificated. Lastly, sequential simulation and synthesissimulation are made by Verilog hardware language in QuartusⅡ6.0.
引文
1.常晓明,李媛媛.Verilog—HDL工程实践入门.第1版.北京:北京航空航天大学出版社,2005
    2.夏宇闻.Verilog数字系统设计教程.第1版.北京:北京航空航天大学出版社,2005
    3. Kilfoyle, D B,. Baggeroer A B. The state of art in underwater acoustic telemetry. IEEE J Oceanic Eng, 2000, 25(1): 4-27
    4. K. Kiasaleh, Tao He. On the Performance Of DQPSK Communication Systems Impaired by Timing Error, Mixer Imbalance, and Frequency Nonselective Slow Rayleigh Fading. Vehieular Technology. 1997, 46(3): 642-652
    5.佟力永,肖山竹.基于FPGA的FIR抽取滤波器设计.电子设计应用.2005(12):128-129
    6. O. Cadenas, G. Megson. Pipelining Considerations for an FPGA Case. Digital Systems Design2001. Proceedings. Euromicro Symposium on. 2001: 276-283
    7. O. Cadenas, G. Megson. Improving mW/MHz ratio in FPGA Pipelined Designs. Digital Systems Design 2002. Proceedings. Euromicro Symposium on. 2002: 276-283
    8.麦文,鲍景富.一种快速位同步的VHDL实现.四川师范大学学报(自然科学版).2006.(9):621-624
    9. Ianick Bergeron. Writing Testbench functional verifictional of HDL models. Kluwer Academic Publisher, 2000
    10.孙海丹.数字化DPSK调制解调器的研究.科学技术与工程.2006(14):2138-2141
    11. Lionel Bening, Harry Foster. Principles of Verification RTL Design. Kluwer Academic Publisher, 2000
    12.昆仑,郭黎利.全数字BPSK调制解调器.哈尔滨工程大学学报.2000(4):13-19
    13.姜志鹏.基于FPGA的2DPSK信号产生器的设诂与实现。现代电子技术.2003(21):28-30
    14.陈泽强,李蓬勃,曹叶文,毕晓东.基于FPGA的数控振荡器设计及其性能分析.山东工业大学学报.2000,30(6):584-588
    15.刘玉良,李远玲.数字下变频器中数控振荡器的设计与硬件实现。电子技术.2003(8):33-35
    16.姜萍,王建新,吉讥生.FPGA实现的直接数字频率合成器.电子技术应用.2002,28(5):4-6
    17.王志良,刘笃仁.基于CPLD的位同步时钟提取电路。电子元器件应用.2006(9):54-55 60
    18.李家会,周金制.抽取滤波器的实现结构研究.信息与电子工程.2006(4):296-300
    19. T. C. Hewavithana, M. Brookes. Soft Decisions for Dqpsk Demodulation for the Viterbi Decoding of the Convolutional Codes. 2003 IEEE International Conference. 2003, 4(4): Ⅳ_17-Ⅳ_19
    20.张学平,王应生,邹传云.基于FPGA的OQPSK解调器的设计与实现.微计算机信息,2006(42):155-157
    21.毕成军,陈利学,孙筑一.基于FPGA的位同步信号提取.现代电子技术.2006(20)121-123
    22.徐燕玲,董公昌,胡淑巧,赵文江.基于现场可编程门阵列的位同步时钟提取技术实现.探测与控制学报.2006(2):61-64
    23.程水英,张剑云.软件无线电侦察中数字通信信号位同步的实现.舰船电子工程.2006(1):141-144
    24.郭浩,邓建国,董桢,张凡。数字下变频器的设计与FPGA实现.中国有线电视.2005(23):2327-2330
    25. W. H. W. Tuttlebee. Software ratio technology: A European perspective. IEEE Communications Magzine. Vol. 37. no. 2. Feb. 1999:118-123
    26.艾砾,卜祥元.FPGA实现MPSK解调.军民两用技术与产品.2005(4):46-48
    27.王永和,卜长堑.采用FPGA实现π/4 DQPSK调制器.北方交通大学学报.2000(5):53-57
    28.郭培源,李焕杰.基于FPGA的QPSK解调器设计与实现。北京工商大学学报(自然科学版),2005(1):37-41
    29. Michael Keating, Pierre Bricaud. Reuse Methodogy. for system on a chip., design. Second Edition. Kluwer Academic Publisher, 2000
    30.张力,马忠孙.基于软件无线电的QPSK解调器仿真及实现.中国有线电视.2005(6):557-561
    31.姚培,杨晓峰,项海涛,夏景.用FPGA实现QPSK可变速率调制解调器.中国新通信(技术版).2006(10):33-36
    32.朱路.基于FPGA设计8-PSK调制.华东交通大学学报。2005(2):60-62,85
    33.杨小牛,楼才义,徐建良.软件无线电原理与应用.第1版.北京:电子工业出版设,2005
    34.(美)Rorabaugh,C.B.无线通信系统仿真——C++使用模型.第1版.北京:电子工业出版社,2005
    35. B. Hogenauer. An Economical Class of Digital Filters for Decimation and Interpolation[J]. IEEE Trans. On Acoust, Speech, Signal Processing, 1981,29(2): 155-162
    36.(美)Uwe Meyer-Baese.数字信号处理的FPGA实现.第2版。北京:清华大学出版社,2006
    37.杜慧敏,李宥谋.基于Verilog的FPGA设计基础.第1版.西安:西安电子科技大学出版社,2006
    38. Peled, B. Liu. A New Hardware Realization of Digital Filters[J]. IEEE Trans. On Acoust, Speech, Signal Processing, 1974,22:456-462
    39.樊昌信,张甫翎,徐炳祥,吴成柯.通信原理.第5版.北京:国防工业出版社,2004
    40.张岳新.Visual C++程序设计.第1版.苏州:苏州大学出版社,2002
    41.(美)John G Proakis.数字通信.第4版.北京:电子工业出版社,2005
    42.(美)A.V.奥本海姆,R.W.谢弗,J.R.巴克.离散时间信号处理.第2版.西安:西安交通大学出版社,2002
    43.李贺冰.Simulink通信仿真教程.第1版.北京:国防工业出版社,2006
    44.刘秋云,王佳.Verilog HDL设计实践与指导.第1版.北京:机械工业出版社,2005

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