摘要
本论文的主要目的是设计适用于局部授时定位系统的同步时间信号全数字收发机,实现基于直接序列扩频通信原理的收发机中频数字信号处理。发送系统主要由基带处理单元和频带处理单元构成。接收系统主要由解调单元和解扩单元构成。整个工程用VerilogHDL语言完成所有模块的设计,通过ModelSim仿真和SignalTap验证,最后连接所有系统模块,在Altera公司的Cyclone IVE系列FPGA(现场可编程门阵列)芯片中实现。
论文首先提出了一种适用于野外工作的局部授时定位系统。然后从工程的角度介绍了收发机的总体架构,通过MATLAB仿真工具设计出收发机系统参数以及所用到的滤波器系数。讨论了收发系统中各个模块的理论依据以及详细的实现方法。发送机中主要模块包括差分编码器、扩频序列发生器和NCO(数控振荡器),接收机主要模块包括Costas环、超前-滞后符号同步环、匹配滤波器以及差分解码器。所有的模块都给出了仿真波形,最后下载到Altera公司具有最新FPGA技术的DE2-115开发板上进行验证。
验证结果表明整个系统工作正确,性能稳定,占用资源相对较少,完全满足设计要求。
The main purpose of this thesis is to design a synchronous time signal all-digitaltransceiver for the local timing and positioning system. It is based on direct sequencespread spectrum communication principles. The transmission system mainly consists of thebaseband processing unit and the band processing unit. The receiving system mainlyconsists of the demodulation unit and the despreading unit. All modules in the entireproject are designed with Verilog HDL, simulated and verified using ModelSim andSignalTap. At last, all the modules are connected together and the entire project isimplemented in an Altera's Cyclone IV Series FPGA (Field Programmable Gate Array)chip.
First, this thesis presents a kind of local timing and positioning system which isadapted to field work. Then it introduces the overall structure of the transceiver from theengineering point of view and designs the transceiver system parameters and the filtercoefficients used in the system. This thesis also discussed the theoretical basis of thevarious modules in transceiver systems as well as detailed methods of their implementation.The transmitter includes differential encoder, spreading sequence generator and NCO(numerically controlled oscillator). The receiver includes Costas loop, ahead-hysteresisloop, matched filter and a differential decoder. The modules simulation waveforms aregiven in thesis. Finally, download the project to the Altera DE2-115development boardwhich is equipped with the latest FPGA technology to verify the design.
Verification results show that the whole system works correctly, is stable, occupiesfew resources and fully satisfies the requirements.
引文
[1]魏佳杰,郭晓金,李建寰.无线传感网发展综述.信息技术,2009
[2]黄英,李景文,刘敏.软件无线电技术在中频接收机中的应用.无线电通信技术,2004
[3]龚广伟,李建国,乔佩,洪宇宁.基于AD9640的无线接收机设计.电子产品世界,2010
[4]张公礼,全数字接收机理论与技术.北京:科学出版社,2005
[5]李庆忠,陈联青,夏祥瑞,罗维炳,易碧金. GPS卫星授时遥测地震仪.专利:01134726.0,2003
[6]郭建,刘光鼎,宋祁真,罗维炳.利用短信进行地震仪控制和数据传送的方法及短信控制传送型无缆地震仪.专利:200910169540.1,2010
[7] Elliott D. Kaplan, Christopher J. Hegarty. Understanding GPS Principles andApplications.电子工业出版社,2007
[8]邬正义,范瑜,徐惠钢.现代无线通信技术.高等教育出版社,2008
[9] Mitola J. The soft radio architecture. IEEE Comm.Magazine,1995
[10]梅晓.基于FPGA的全数字扩频收发机的设计与实现.北京交通大学硕士论文,2007
[11]郭黎利,李北明,窦峥.扩频通信系统的FPGA设计.国防工业出版社,2013
[12] Fu, Qingqing Gao, Zhiqiang Wu. Aiping The decoded design of IRIG-B.International Conference on Electronics Communications and Control (ICECC2011),2011
[13] PANG Jiyao. Implementation of IRIG-B Encoder Based on FPGA. ModernElectronics Technique,2009-24
[14]李军华.高精度IRIG_B的数字方法实现[D].北京邮电大学硕士学位论文,2007
[15]陈涛,张卫国,张卫国. IRIG-B码数字解调技术[J].光学精密工程,1999
[16]赵刚.扩频通信系统实用仿真技术.国防工业出版社,2009
[17] Roger L.peterson,Rodger E.Ziemer,David E. Borth. Introduction to Spread SpectrumCommunications,1995
[18]俞泓.基于FPGA的直序扩频软件无线电发射机研究.上海交通大学硕士论文,2007
[19] EDA先锋工作室,吴继华,蔡海宁.Altera FPGA/CPLD设计(高级篇).人民邮电出版社,2011
[20]杜勇,路建工,李元洲.数字滤波器的MATLAB与FPGA实现.电子工业出版社,2012
[21]宗孔德.多抽样率信号处理.北京:清华大学出版社,1996
[22]姜丹.信息论与编码.中国科学技术大学出版社,2009
[23]贾志成,蒋文娟,李健娜.基于扩频通信的扩频序列的发展及应用综述.第一届中国高校通信类院系学术研讨会论文集,2007
[24] W-P.Zhu,Yupeng Yan,M. O. Ahmad,M.N.S. Swamy. A Feedforwaed TimingRecovery Scheme of Using Two Samples per Symbol: Algorithm, performance andimplementation Issues. Proc. IEEE, ISCAS’03, vol.2,2003.
[25]普罗科斯.数字通信(第5版).电子工业出版社,2011
[26]孔英会,高强,张素香,李星蓉.通信系统原理.机械工业出版社,2011
[27]裴佩,卢立丹.基于SystemC语言的伪随机序列发生器设计.舰船电子工程,2010
[28]陈曦,邱志成,张鹏,何初冬,基于VerilogHDL的通信系统设计.中国水利水电出版社,2009
[29]高泽溪,高成,直接数字频率合成器(DDS)及其性能分析.北京航空航天大学学报,1998
[30]高亚军.基于FPGA的数字信号处理.电子工业出版社,2011
[31] Xilinx公司. LogiCORE IP DDS Compiler v4.0,DS558,2010
[32]李勇,艾竹君,刘巧云,史亚彬,方巍.基于FPGA的DDS设计方法,低温与超导,2007
[33] Franks,L.E.Carrer. Synchronization in Data Communication. A Tutorial Review.IEEE Trans.Commun.vol.COM-28,pp.1107-1120,1980
[34] Meyr,H.,Moenclaey,M.,Fechtel,S. A Digital Commun, Receivers. Wiley,NewYork.1998
[35] RITER S. An optimum phase reference detector for fully modulated phase shift keyedsignals [J]. IEEE AES-5,1969
[36] H Yuan,X Hu,J Huang. Design and implementation of Costas loop based on FPGA.ICIEA2008,3rd IEEE Conference,2008
[37]俞一彪,孙兵编著.数字信号处理-理论与应用.南京:东南大学出版社,2005
[38]栗晶晶.一种适用于地震勘探仪器的数字滤波器的设计.苏州大学硕士学位论文,2012
[39]侯志荣,吕振肃.基于雷米兹交换算法设计线性相位对数FIR滤波器.电讯技术,2003
[40]王世练.基带中频数字接收机的实现及其关键技术的研究.国防科技大学博士学位论文,2004
[41]范文晶等.基于MATLAB的数字下变频器的设计与仿真应用.电子质量,2009
[42]李素芝,万建伟.时域离散信号处理.长沙:国防科技大学出版社,1998
[43]张欣.扩频通信数字基带信号处理算法及其VLSI实现.北京:科学出版社,2004
[44]张厥盛,郑继禹,万心平.锁相技术.西安:西安电子科技大学出版社,1998
[45]易鸿锋,谷春燕,易克初,金力军.一种高精度的符号定时同步方法.西安电子科技大学学报,2005
[46]庞存锁,韩焱.基于VHDL的超前-滞后型数字锁相环设计.电子测量技术,2008
[47]田耘,徐文波,张延伟.无线通信FPGA设计.北京:电子工业出版社,2008
[48] S.Lee,J.Kim. Effects of multiple threshold values for PN code acquisition inDS-CDMA systems. Electronics Letters Volume37, Issue6,15,2001
[49]暴宇,李新民.扩频通信技术及应用.西安电子科大学出版社,1999
[50] Okamoto,H.,Hasegawa,T. Delay-lock phase-locked tracking of PN signals (DPTL).Singapore ICCS/ISITA '92.'Communications on the Move'16-20,1992
[51] Altera. DE2-115User Manual,2012