高速TIADC并行采样系统综合校正技术研究
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摘要
现代电子信号复杂性、特别是宽带和非平稳特性的增长极为迅速,以扫频为主的频域测试仪器从测量原理上难以满足宽带、瞬态信号的实时测试要求。以数字示波器为代表的、基于实时采样的时域仪器正在成为现代电子测试技术的主流发展趋势,孕育着电子仪器体系和测量方法的重要变革。
高速率高精度采样已经成为现代时域测试仪器的瓶颈问题。采样速率、采样精度越高,可采集的模拟信号带宽越宽,对信号的还原能力越强。虽然近几年单片模数转换器件(analog-to-digital converter,ADC)的采样速率有了很大提高,仍然难以同时兼顾高速与高精度。ADC时间交替(Time-interleaved ADC,TIADC)并行采样技术是在现有器件条件下,最大限度提高实时采样率,并保持采集精度的最有效方法之一,可以突破ADC以及相关器件工作速度的限制,实现超高速数据采集系统。
然而,TIADC并行采样技术依赖于各通道间参数的精确匹配。由于各通道ADC之间的增益和偏置难以达到严格一致,各通道间的采样时钟相位延时也难以准确无偏,这将导致采样信号非均匀,严重降低了系统性能。如何使用数字信号处理方法实现通道失配误差的估计和校正是本文的研究重点。结合攻读博士学位期间参与的国家自然科学基金研究项目,着眼于宽带并行采样数字存储示波器等高性能时域测试仪器实现技术,本文主要从如下几个方面展开了深入的研究:
(1)TIADC并行采样系统行为模型的建立。根据TIADC并行采样系统的基本结构与原理,建立了基于Matlab的TIADC采样系统行为模型,深入分析了系统误差来源和非均匀信号频谱特性,推导了性能指标的计算公式,给出了通道失配误差对ADC系统性能的影响。指导并行采样性能的分析以及非均匀误差估计和校正算法的设计。
(2)通道失配盲估计方法。根据通道采样数据的统计特性,分别提出了基于迭代盲估计和极大似然估计的时基误差估计算法。研究了通道失配误差的特点,建立了通道失配误差自适应综合估计模型,分别给出了频域和时域自适应估计算法。其中,针对不同的应用情况,基于时域的自适应综合估计算法又分为线性插值(Linear Interpolation, LI)估计和分数延时(Fractional Delay,FD)估计两种估计算法。应用自适应算法,综合考虑三种误差的影响,一次性实现三种通道失配误差的估计。
(3)非均匀信号综合重构方法。首先,给出了离散Fourier变换多通道分解方法,通过较少的运算量实现了基于频域的多通道时基误差频谱重构算法。其次,基于LI重构和FD重构,提出了两种时域综合校正算法,同时解决幅度和时基非均匀校正问题,提高了系统性能,并对比了两种算法的校正效果,讨论了两种算法的适用情况,评价了校正前后的系统性能指标。提出了新的FD滤波器约束准则,给出了优化设计方法。
(4)实际2GSa/s双通道TIADC并行采集系统验证。给出了应用两片ADC(AT84AD001: 1GSa/s、8Bit)实现一套双通道、采样率为2GSa/s的高速TIADC并行采样数字存储示波器系统实例;利用数字后端处理系统,基于FPGA实现了经优化设计的FD滤波器,以及通道失配误差综合校正;分别对频率为10MHz和150MHz的正弦信号进行测试,实现了非均匀信号的重构,评估了采集系统的技术指标,取得了较好的实验结果,验证了算法的有效性和可行性。
The rapid growth of modern electronic signal’s complication, especially the wide band and non-stationary characteristics, makes it very difficult for the traditional frequency-domain sweep test to meet the test requirements of broad-band and transient signal. The time-domain test measurements based on real-time sampling, as represented by digital oscilloscope, are becoming the mainstream of electronic instrumentations’development, and also gestating an important transformation of electronic instrumentation systems.
The dependence on sampling rate and sampling accuracy has already become the bottleneck of modern time-domain test instruments. Higher sampling speed and sampling precision mean that the instrument could sample wider-band signal and have stronger signal reconstruction ability. Although the monolithic ADC has achieved a remarkable sampling speed in recent years, it is still hard to guarantee high sampling speed and high sampling accuracy simultaneously. Due to the restriction of electronic device as well as manufacture technique, the most effective method to acquire high sampling speed as much as possible and maintain sampling precision, is to build Time-interleaved parallel sampling system.
However, Time-interleaved parallel sampling technique relies on the exact matching of channels. Unfortunately, it is tough to achieve strict identicalness of gain and offset among various channels and synchronize of sampling clock’s phase delay accurately. All of these problems will result in signal nonuniform sampling and degrade the system’s performance seriously. How to use digital signal processing method to calibrate the sampling signal is the emphasis of this dissertation. Combining with two research projects granted by National Natural Science Foundation of China, and focusing on the high performance time-domain test instruments such as wide-band parallel sampling digital storage oscilloscope and so on, this dissertation mainly does some thorough research on the following aspects:
(1) Time-interleaved parallel sampling system behavioral model establishment. Through the analysis of Time-interleaved parallel sampling system’s basic structure and principle, this dissertation established Time-interleaved parallel sampling system’s behavioral model based on Matlab, profoundly analyzed the origination of channel mismatches and the nonuniform signal frequency spectrum characteristic, and deduced the computation of ADC system performance.
(2) Channel mismatches blind estimation method. Based on channel sampling data statistics, this dissertation proposed two time skew error estimation algorithms using the adaptive blind estimation and the maximum likelihood correlation estimation method. Based on channel mismatches characteristic, the channel mismatches self-adaptive synthesis estimation model was established. This dissertation gave self-adaptive time skew error estimation algorithm based on frequency domain. For different applications of input frequency, it also gave two self-adaptive synthesis estimation algorithms based on time domain, which were the linear interpolation and the fractional interpolation estimation method. Taking the influence brought by three kinds of channel mismatches in consider, these methods carried on self-adaptive mismatches synthesis estimation at one time.
(3) Nonuniform signal reconstruction method. First, using Fourier analysis capability provided by most time-domain measuring instruments, this dissertation proposed a multi-channel frequency spectrum reconstruction method based on frequency-domain processing. Second, the linear interpolation method and the fractional interpolation method were applied to time-domain signal reconstruction, and channel mismatches were solved simultaneously. By contrasting their reconstruction effects, we gave the condition of these two time-domain reconstruction algorithms, and evaluated the system performance. And new fractional interpolation filter criterion and optimization design method were proposed.
(4) 2GSa/s two-channel Time-interleaved parallel sampling system application. A practical two-channel ADC parallel sampling digital storage oscilloscope system based on two ADCs(AT84AD001: 1GSa/s、8Bit) Time-interleaved sampling technology was introduced. Using flexible FPGA post signal processing, this system realized the FD filter and the real-time mismatches synthesis calibration. 10MHz and 150MHz sinusoidal signals were applied to confirm the performance separately, and the evaluation of the system performance has verified the validity and feasibility of synthesis algorithm.
高速率高精度采样已经成为现代时域测试仪器的瓶颈问题。采样速率、采样精度越高,可采集的模拟信号带宽越宽,对信号的还原能力越强。虽然近几年单片模数转换器件(analog-to-digital converter,ADC)的采样速率有了很大提高,仍然难以同时兼顾高速与高精度。ADC时间交替(Time-interleaved ADC,TIADC)并行采样技术是在现有器件条件下,最大限度提高实时采样率,并保持采集精度的最有效方法之一,可以突破ADC以及相关器件工作速度的限制,实现超高速数据采集系统。
然而,TIADC并行采样技术依赖于各通道间参数的精确匹配。由于各通道ADC之间的增益和偏置难以达到严格一致,各通道间的采样时钟相位延时也难以准确无偏,这将导致采样信号非均匀,严重降低了系统性能。如何使用数字信号处理方法实现通道失配误差的估计和校正是本文的研究重点。结合攻读博士学位期间参与的国家自然科学基金研究项目,着眼于宽带并行采样数字存储示波器等高性能时域测试仪器实现技术,本文主要从如下几个方面展开了深入的研究:
(1)TIADC并行采样系统行为模型的建立。根据TIADC并行采样系统的基本结构与原理,建立了基于Matlab的TIADC采样系统行为模型,深入分析了系统误差来源和非均匀信号频谱特性,推导了性能指标的计算公式,给出了通道失配误差对ADC系统性能的影响。指导并行采样性能的分析以及非均匀误差估计和校正算法的设计。
(2)通道失配盲估计方法。根据通道采样数据的统计特性,分别提出了基于迭代盲估计和极大似然估计的时基误差估计算法。研究了通道失配误差的特点,建立了通道失配误差自适应综合估计模型,分别给出了频域和时域自适应估计算法。其中,针对不同的应用情况,基于时域的自适应综合估计算法又分为线性插值(Linear Interpolation, LI)估计和分数延时(Fractional Delay,FD)估计两种估计算法。应用自适应算法,综合考虑三种误差的影响,一次性实现三种通道失配误差的估计。
(3)非均匀信号综合重构方法。首先,给出了离散Fourier变换多通道分解方法,通过较少的运算量实现了基于频域的多通道时基误差频谱重构算法。其次,基于LI重构和FD重构,提出了两种时域综合校正算法,同时解决幅度和时基非均匀校正问题,提高了系统性能,并对比了两种算法的校正效果,讨论了两种算法的适用情况,评价了校正前后的系统性能指标。提出了新的FD滤波器约束准则,给出了优化设计方法。
(4)实际2GSa/s双通道TIADC并行采集系统验证。给出了应用两片ADC(AT84AD001: 1GSa/s、8Bit)实现一套双通道、采样率为2GSa/s的高速TIADC并行采样数字存储示波器系统实例;利用数字后端处理系统,基于FPGA实现了经优化设计的FD滤波器,以及通道失配误差综合校正;分别对频率为10MHz和150MHz的正弦信号进行测试,实现了非均匀信号的重构,评估了采集系统的技术指标,取得了较好的实验结果,验证了算法的有效性和可行性。
The rapid growth of modern electronic signal’s complication, especially the wide band and non-stationary characteristics, makes it very difficult for the traditional frequency-domain sweep test to meet the test requirements of broad-band and transient signal. The time-domain test measurements based on real-time sampling, as represented by digital oscilloscope, are becoming the mainstream of electronic instrumentations’development, and also gestating an important transformation of electronic instrumentation systems.
The dependence on sampling rate and sampling accuracy has already become the bottleneck of modern time-domain test instruments. Higher sampling speed and sampling precision mean that the instrument could sample wider-band signal and have stronger signal reconstruction ability. Although the monolithic ADC has achieved a remarkable sampling speed in recent years, it is still hard to guarantee high sampling speed and high sampling accuracy simultaneously. Due to the restriction of electronic device as well as manufacture technique, the most effective method to acquire high sampling speed as much as possible and maintain sampling precision, is to build Time-interleaved parallel sampling system.
However, Time-interleaved parallel sampling technique relies on the exact matching of channels. Unfortunately, it is tough to achieve strict identicalness of gain and offset among various channels and synchronize of sampling clock’s phase delay accurately. All of these problems will result in signal nonuniform sampling and degrade the system’s performance seriously. How to use digital signal processing method to calibrate the sampling signal is the emphasis of this dissertation. Combining with two research projects granted by National Natural Science Foundation of China, and focusing on the high performance time-domain test instruments such as wide-band parallel sampling digital storage oscilloscope and so on, this dissertation mainly does some thorough research on the following aspects:
(1) Time-interleaved parallel sampling system behavioral model establishment. Through the analysis of Time-interleaved parallel sampling system’s basic structure and principle, this dissertation established Time-interleaved parallel sampling system’s behavioral model based on Matlab, profoundly analyzed the origination of channel mismatches and the nonuniform signal frequency spectrum characteristic, and deduced the computation of ADC system performance.
(2) Channel mismatches blind estimation method. Based on channel sampling data statistics, this dissertation proposed two time skew error estimation algorithms using the adaptive blind estimation and the maximum likelihood correlation estimation method. Based on channel mismatches characteristic, the channel mismatches self-adaptive synthesis estimation model was established. This dissertation gave self-adaptive time skew error estimation algorithm based on frequency domain. For different applications of input frequency, it also gave two self-adaptive synthesis estimation algorithms based on time domain, which were the linear interpolation and the fractional interpolation estimation method. Taking the influence brought by three kinds of channel mismatches in consider, these methods carried on self-adaptive mismatches synthesis estimation at one time.
(3) Nonuniform signal reconstruction method. First, using Fourier analysis capability provided by most time-domain measuring instruments, this dissertation proposed a multi-channel frequency spectrum reconstruction method based on frequency-domain processing. Second, the linear interpolation method and the fractional interpolation method were applied to time-domain signal reconstruction, and channel mismatches were solved simultaneously. By contrasting their reconstruction effects, we gave the condition of these two time-domain reconstruction algorithms, and evaluated the system performance. And new fractional interpolation filter criterion and optimization design method were proposed.
(4) 2GSa/s two-channel Time-interleaved parallel sampling system application. A practical two-channel ADC parallel sampling digital storage oscilloscope system based on two ADCs(AT84AD001: 1GSa/s、8Bit) Time-interleaved sampling technology was introduced. Using flexible FPGA post signal processing, this system realized the FD filter and the real-time mismatches synthesis calibration. 10MHz and 150MHz sinusoidal signals were applied to confirm the performance separately, and the evaluation of the system performance has verified the validity and feasibility of synthesis algorithm.
引文
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