基于TMS320C64x实现高清晰度视频解码的优化仿真
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摘要
多年以来，数字音视频处理技术的发展一直是多媒体应用领域的主要推动力之一。其中，音视频压缩编码是数字音视频处理技术的核心，其算法复杂，运算量庞大。高效实时地压缩视频和音频信号的数据，是多媒体信息传输的首要问题。
近几十年来，电视工业经历了从模拟黑白电视，模拟彩色电视到现在的数字电视的变化。而数字高清晰度电视（HDTV）能提供给人们以更优质的图像、伴音，带来身临其境的视听感受。作为消费电子产品的数字电视接收机或机顶盒，具有巨大的潜在市场。数字电视机顶盒的实现方法有两种，一种是使用专用芯片；另一种则是使用通用芯片，包括FPGA和DSP。一些大公司的专用芯片功能强，技术比较成熟，价格较通用芯片也相对便宜，目前业界无一例外地全部采用专用芯片来实现高清晰度电视视频解码。但是，使用外国公司的芯片没有我们的知识产权，而且一旦标准改变，专用芯片不再适用。而使用通用芯片则具有既可以申请我们自己的知识产权，又可以适应标准改变的特点。FPGA是基于硬件的一种实现方法，对于整个系统的实现，使用这种方法比较困难。DSP是基于软件的一种实现方法，一旦DSP的运算能力达到要求，我们就可以做到利用通用DSP代替专用芯片来实现机顶盒。
论文设计了基于高性能通用DSP TMS320C64x的HDTV视频解码程序。该解码程序针对C64的特殊架构做了多方面的优化。特别是对变长解码、IDCT和运动补偿三个关键模块人工编写了汇编语言程序、调整了流水线操作。经过优化，显著提高了解码效率。通过软件仿真可以得出如下重要结论：1）进行人工汇编优化之后的程序效率相比于仅仅采用C语言优化之后的程序效率提高了将近七倍；2）人工汇编优化之后，对标准清晰度视频进行实时解码时要求的时钟频率仅为228.8MHz；3）对高清晰度视频进行实时解码时要求的时钟频率在1GHz左右。这项研究对使用通用DSP实现高清晰度电视视频解码乃至实现整个信源解码器有重要的价值，推动了通用DSP在消费电子领域多媒体技术方面的应用。
最后，论文设计了基于浮点DSP TMS320C6701的音频解码程序的IMDCT部分，经过测试可以做到实时的解码音频信号和系统控制。
Digital audio and video processing technology is the engine of multimedia application in recent years. Audio and video compression is the core technology of digital audio and video processing. Compression algorithm is complex and has much operation. To compress video and audio signal efficiently and in real time is a chiefly problem in multimedia technology.
From analog black and white television, analog color television to digital television, TV industry has great change. HDTV (High-Definition TV) supply better image and sound. Receiver or Set-top box has a great potential market. The implementation of digital TV Set-top box has two methods. One is implemented by ASIC, such as STi7020, the other is by general purpose chip, including FPGA and DSP. ASIC has strong function, advanced technology and low price. Now when decoding HDTV video stream, all the decoders are implemented by ASIC. But we have no intellectual property by using ASIC, only if the standards have been changed, the ASIC must be fallen into disuse. We can overcome these shortcomings by using general purpose chip. To use FPGA is based on hardware, it is difficult to implement the system by using this method. While to use DSP is based on software, we can make use of DSP to development Set-top box if only DSP has enough operation ability.
The thesis designs a HDTV video software decoder based on TMS320C64x general purpose DSP. Considering the structure of TMS320C64x, several optimizations have been made. Variable length decoding, IDCT and motion compensation are coded in parallel assemble language. By evaluating the object code on TMS320C64x software simulator, we can make several conclusions: 1) The CPU cycles consumed after assemble optimization is one seventh of the cycles before optimization; 2) After assemble optimization, this video software decoder only consumes 228.8MHz CPU cycles; 3) When decoding hi-definition video bit-stream, about 1GHz CPU cycles will be consumed. This research is very important for implementing a HDTV video decoder by using general purpose DSP. It promotes the development of DSP usage in consumer electronic application field.
Last, the thesis design the IMDCT software of AC-3 audio decoder based on float DSP TMS320C6701, the result is that TMS320C6701 can decode audio signal and control the system in real time.
近几十年来，电视工业经历了从模拟黑白电视，模拟彩色电视到现在的数字电视的变化。而数字高清晰度电视（HDTV）能提供给人们以更优质的图像、伴音，带来身临其境的视听感受。作为消费电子产品的数字电视接收机或机顶盒，具有巨大的潜在市场。数字电视机顶盒的实现方法有两种，一种是使用专用芯片；另一种则是使用通用芯片，包括FPGA和DSP。一些大公司的专用芯片功能强，技术比较成熟，价格较通用芯片也相对便宜，目前业界无一例外地全部采用专用芯片来实现高清晰度电视视频解码。但是，使用外国公司的芯片没有我们的知识产权，而且一旦标准改变，专用芯片不再适用。而使用通用芯片则具有既可以申请我们自己的知识产权，又可以适应标准改变的特点。FPGA是基于硬件的一种实现方法，对于整个系统的实现，使用这种方法比较困难。DSP是基于软件的一种实现方法，一旦DSP的运算能力达到要求，我们就可以做到利用通用DSP代替专用芯片来实现机顶盒。
论文设计了基于高性能通用DSP TMS320C64x的HDTV视频解码程序。该解码程序针对C64的特殊架构做了多方面的优化。特别是对变长解码、IDCT和运动补偿三个关键模块人工编写了汇编语言程序、调整了流水线操作。经过优化，显著提高了解码效率。通过软件仿真可以得出如下重要结论：1）进行人工汇编优化之后的程序效率相比于仅仅采用C语言优化之后的程序效率提高了将近七倍；2）人工汇编优化之后，对标准清晰度视频进行实时解码时要求的时钟频率仅为228.8MHz；3）对高清晰度视频进行实时解码时要求的时钟频率在1GHz左右。这项研究对使用通用DSP实现高清晰度电视视频解码乃至实现整个信源解码器有重要的价值，推动了通用DSP在消费电子领域多媒体技术方面的应用。
最后，论文设计了基于浮点DSP TMS320C6701的音频解码程序的IMDCT部分，经过测试可以做到实时的解码音频信号和系统控制。
Digital audio and video processing technology is the engine of multimedia application in recent years. Audio and video compression is the core technology of digital audio and video processing. Compression algorithm is complex and has much operation. To compress video and audio signal efficiently and in real time is a chiefly problem in multimedia technology.
From analog black and white television, analog color television to digital television, TV industry has great change. HDTV (High-Definition TV) supply better image and sound. Receiver or Set-top box has a great potential market. The implementation of digital TV Set-top box has two methods. One is implemented by ASIC, such as STi7020, the other is by general purpose chip, including FPGA and DSP. ASIC has strong function, advanced technology and low price. Now when decoding HDTV video stream, all the decoders are implemented by ASIC. But we have no intellectual property by using ASIC, only if the standards have been changed, the ASIC must be fallen into disuse. We can overcome these shortcomings by using general purpose chip. To use FPGA is based on hardware, it is difficult to implement the system by using this method. While to use DSP is based on software, we can make use of DSP to development Set-top box if only DSP has enough operation ability.
The thesis designs a HDTV video software decoder based on TMS320C64x general purpose DSP. Considering the structure of TMS320C64x, several optimizations have been made. Variable length decoding, IDCT and motion compensation are coded in parallel assemble language. By evaluating the object code on TMS320C64x software simulator, we can make several conclusions: 1) The CPU cycles consumed after assemble optimization is one seventh of the cycles before optimization; 2) After assemble optimization, this video software decoder only consumes 228.8MHz CPU cycles; 3) When decoding hi-definition video bit-stream, about 1GHz CPU cycles will be consumed. This research is very important for implementing a HDTV video decoder by using general purpose DSP. It promotes the development of DSP usage in consumer electronic application field.
Last, the thesis design the IMDCT software of AC-3 audio decoder based on float DSP TMS320C6701, the result is that TMS320C6701 can decode audio signal and control the system in real time.
引文
[1] Jeff Alred, Mark Bell, Craig Birkmaier, “The Guide to Digital Television”, United Entertainment Media
[2] 电子工程专辑, "DSP大事记"， http://www.eechina.com/, 2003年6月14日
[3] 电子工程专辑, "DSP芯片的早期发展史"，http://www.eechina.com/, 2003年6月14日
[4] 彭启琮，李玉柏，管庆，“DSP与实时数字信号处理”，电子科学大学出版社，1995
[5] 彭启琮，李玉柏，“DSP技术”，电子科技大学出版社，1997
[6] 任丽香，马淑芬，李方慧，“TMS320C6000系列DSPs的原理与应用”，电子工业出版社，2000
[7] 张雄伟，曹铁勇，“DSP芯片的原理与开发应用（第二版）”，电子工业出版社，2000
[8] 张辉，胡广书，孙勇，“实时视频图像压缩与存储系统的设计与实现”，信号处理，Vol.17增刊，p496-p499，2001
[9] P. Lapsley et al., "DSP processor fundamentals, architectures and features," Berkeley Design Techology, 1996.
[10] M. Bellanger, Digital Processing of Signals. New York: Wiley, 1989.
[11] Lapsley et. al, “DSP Processor Fundamentals: Architectures and Features”, IEEE Press, 1996
[12] R.G. Lyons, “Understanding Digital Signal Processing”, Addison Wesley, 1996
[13] W. Strauss, “DSP Strategies 2000”, Forward Concepts, 1999
[14] Dr. M. Michael Vai, “ASIC and FPGA DSP implementations-Current Topics in Digital Signal Processing”, MIT Lincoln Laboratory, Apr.2003
[15] G.J. Sullivan and T. Wiegand: Rate-Distortion Optimization for Video Compression IEEE Signal Processing Magazine, Vol. 15, November 1998, pp. 74 - 90.
[16] Ghanbari, M. “Video Coding: An Introduction to Standard Codecs,” IEE Telecommunications Series 42,1999.
[17] Canta G., Poggi G.:compression of multispectral images by address-predictive vector quantization, Signal Processing: Image Communication, vol, 11, 1997, pp. 147-159
[18] Bhaskaran V., Konstantinides k.: Image and video compression standards, Boston, Kluwer 1995.
[19] Clarke R.: Digital compression of still images and video, London, Academic Press 1995.
[20] Pei S-c., Chou Y-Z.: Efficient MPEG compressed video analysis using macroblock type infromation, IEEEE Trans. Multimedia, vol. 1, 1999, pp. 321-333.
[21] Wang L.:Rate control for MPEG video coding, Signal Processing: Image Communication, vol. 15, 2000, pp. 493-512.
[22] 钟玉琢，王琪等，“MPEG-2运动图像压缩编码国际标准及MPEG的新进展”，清华大学出版社，2002
[23] Texas Instrument. TMS320C6000 CPU and Instruction Set Reference Guide. 2000
[24] Texas Instrument. TMS320C64x Technical Overview. Jan., 2001
[25] Texas Instrument. TMS320C6000 Peripherals Reference Guide. 1999
[26] Texas Instrument. TMS320C62x/C67x CPU and Instruction Set. 1998
[27] Texas Instrument. TMS320C6000 Technical Brief. 1999
[28] Texas Instrument. TMS320C6000 EMIF to External SDRAM/SGRAM Interface. 2000
[29] Texas Instruments, "TMS320DM642 Technical Overview", Application Report SPRU615, Sept.2002
[30] Texas Instruments, "TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor Data Manual", SPRS200A, Apr. 2003
[31] Texas Instrument. TMS320C6000 Programmer’s Guide. 2000
[32] Texas Instrument. Guidelines for Software Development Efficiency on the TMS320C6000 VelociTI Architecture. 2000
[33] Texas Instrument. TMS320C6000 Code Optimization Partitioning Strategies to Improve Inner Loop Performance. 2000
[34] Texas Instrument. TMS320C6701 Floating-Point Digital Processor Datasheet. May, 2000
[2] 电子工程专辑, "DSP大事记"， http://www.eechina.com/, 2003年6月14日
[3] 电子工程专辑, "DSP芯片的早期发展史"，http://www.eechina.com/, 2003年6月14日
[4] 彭启琮，李玉柏，管庆，“DSP与实时数字信号处理”，电子科学大学出版社，1995
[5] 彭启琮，李玉柏，“DSP技术”，电子科技大学出版社，1997
[6] 任丽香，马淑芬，李方慧，“TMS320C6000系列DSPs的原理与应用”，电子工业出版社，2000
[7] 张雄伟，曹铁勇，“DSP芯片的原理与开发应用（第二版）”，电子工业出版社，2000
[8] 张辉，胡广书，孙勇，“实时视频图像压缩与存储系统的设计与实现”，信号处理，Vol.17增刊，p496-p499，2001
[9] P. Lapsley et al., "DSP processor fundamentals, architectures and features," Berkeley Design Techology, 1996.
[10] M. Bellanger, Digital Processing of Signals. New York: Wiley, 1989.
[11] Lapsley et. al, “DSP Processor Fundamentals: Architectures and Features”, IEEE Press, 1996
[12] R.G. Lyons, “Understanding Digital Signal Processing”, Addison Wesley, 1996
[13] W. Strauss, “DSP Strategies 2000”, Forward Concepts, 1999
[14] Dr. M. Michael Vai, “ASIC and FPGA DSP implementations-Current Topics in Digital Signal Processing”, MIT Lincoln Laboratory, Apr.2003
[15] G.J. Sullivan and T. Wiegand: Rate-Distortion Optimization for Video Compression IEEE Signal Processing Magazine, Vol. 15, November 1998, pp. 74 - 90.
[16] Ghanbari, M. “Video Coding: An Introduction to Standard Codecs,” IEE Telecommunications Series 42,1999.
[17] Canta G., Poggi G.:compression of multispectral images by address-predictive vector quantization, Signal Processing: Image Communication, vol, 11, 1997, pp. 147-159
[18] Bhaskaran V., Konstantinides k.: Image and video compression standards, Boston, Kluwer 1995.
[19] Clarke R.: Digital compression of still images and video, London, Academic Press 1995.
[20] Pei S-c., Chou Y-Z.: Efficient MPEG compressed video analysis using macroblock type infromation, IEEEE Trans. Multimedia, vol. 1, 1999, pp. 321-333.
[21] Wang L.:Rate control for MPEG video coding, Signal Processing: Image Communication, vol. 15, 2000, pp. 493-512.
[22] 钟玉琢，王琪等，“MPEG-2运动图像压缩编码国际标准及MPEG的新进展”，清华大学出版社，2002
[23] Texas Instrument. TMS320C6000 CPU and Instruction Set Reference Guide. 2000
[24] Texas Instrument. TMS320C64x Technical Overview. Jan., 2001
[25] Texas Instrument. TMS320C6000 Peripherals Reference Guide. 1999
[26] Texas Instrument. TMS320C62x/C67x CPU and Instruction Set. 1998
[27] Texas Instrument. TMS320C6000 Technical Brief. 1999
[28] Texas Instrument. TMS320C6000 EMIF to External SDRAM/SGRAM Interface. 2000
[29] Texas Instruments, "TMS320DM642 Technical Overview", Application Report SPRU615, Sept.2002
[30] Texas Instruments, "TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor Data Manual", SPRS200A, Apr. 2003
[31] Texas Instrument. TMS320C6000 Programmer’s Guide. 2000
[32] Texas Instrument. Guidelines for Software Development Efficiency on the TMS320C6000 VelociTI Architecture. 2000
[33] Texas Instrument. TMS320C6000 Code Optimization Partitioning Strategies to Improve Inner Loop Performance. 2000
[34] Texas Instrument. TMS320C6701 Floating-Point Digital Processor Datasheet. May, 2000