用于星载非智能设备的IEEE 1394总线接口
摘要
星载数据总线用于各星载电子设备之间的通讯和数据交换,是整个星载电子系统的关键部件之一。随着航天工程的不断发展,星载电子系统对星载数据总线的要求进一步提高,需要一种更先进的高速总线来支持各个电子设备之间高速、实时的数据传输。另一方面,航天电子系统正向小型化趋势发展。航天电子系统的小型化,为提高航天器性能、降低成本和缩短研发周期提供了可能,它已经成为现代航天工程的发展趋势之一。因此,研制一种通用、轻小型化的高速星载数据总线接口对未来航天工程应用具有重要意义。
在实际星载任务中,有些星载设备不带有CPU单元,但是也要使用高速数据总线来实现与其它设备的通讯,因此需要开发一种用于这类星载非智能设备的轻小型化高速总线接口,在实现高速数据传输的同时尽量减小整个星载电子设备的体积和功耗。本文选择了IEEE 1394高速串行总线,IEEE 1394总线遵从CSR体系结构,支持热插拔和即插即用,支持等时和异步两种传输模式,是NASA推荐用于未来空间应用的数据总线之一。
本课题设计了以Actel FPGA作为主控单元的用于星载非智能设备IEEE 1394接口原理样机。原理样机中主要包括主控FPGA、IEEE 1394协议芯片组、LVDS接口、ADC和DAC接口以及RS232调试接口等。在FPGA对总线接口板的控制实现过程中,还选用了开源的MC8051 IP作为控制单元,实现了一个简单的片上可编程系统,并对IEEE 1394总线功能作了测试和验证。
本文详细介绍了课题的背景和国内外发展近况、IEEE 1394总线的技术概要;论述了方案确定和硬件设计的过程,以及FPGA控制逻辑和MC8051 IP在FPGA中的实现;说明了IEEE 1394数据包的格式,进行了IEEE 1394总线的功能测试,并阐明了MC8051控制软件的实现方法。本课题所开发的用于星载非智能设备的IEEE 1394总线接口原理样机经过完善后可用于星载非智能设备中,对未来IEEE 1394总线的星载应用具有借鉴意义。
On-board data bus is one of the crucial modules in on-board electronic systems, used for communication and data exchange among on-board electronic devices. The requirements of on-board data bus are improved with the development of space projects. It calls for a kind of more advanced bus to support high speed and real-time data transfers among electronic devices. On the other hand, spaceflight electronic systems are in miniaturization development. Spaceflight electronic systems’miniaturization brings out the possibility to enhance the performance of spacecraft, reduce the cost and the R&D time. Spaceflight electronic systems’miniaturization has become one of the trends of modern space project development. So it is significant to develop a kind of general, small, light high-speed on-board data bus interface in the future.
Some on-board devices may not have CPU modules in actual tasks, but they also need using high-speed data bus to communicate with other devices. Thereby, we have to develop a special small, light high-speed bus interface for such non-intellectual on-board devices, realizing the high-speed data transfers as well as reducing the volume and power dissipation. This article selects IEEE 1394 high-speed serial bus, which is one kind of future space data bus recommended by NASA. It follows IEEE CSR standard, supports asynchronous and isochronous transfers, and can be live attached and detached.
This project designs the prototype board of IEEE 1394 interface used in non-intellectual on-board, taking with an Actel FPGA chip as the main control module. The prototype includes FPGA, IEEE 1394 chipset, LVDS interface, Analog to Digital Converter and Digital to Analog Converter interface, as well as RS232 debug interface. The project also integrates the open source MC8051 IP core in FPGA when using FPGA to implement the interface control. Finally, the project tests and validates the IEEE 1394 interface system.
This article presents the background of the project and the development in detail, and also introduces the technical overview of IEEE 1394 high-speed serial bus; discusses how to establish the project and the whole hardware design, control logic design in FPGA and the MC8051 IP implementation; describes the IEEE 1394 package structures and functions test, and also shows the control soft realization in MC8051. The prototype designed in this article, after refinement, can be used in on-board electronic devices in the future. It has laid the foundation for on-board application of IEEE 1394 bus.
在实际星载任务中,有些星载设备不带有CPU单元,但是也要使用高速数据总线来实现与其它设备的通讯,因此需要开发一种用于这类星载非智能设备的轻小型化高速总线接口,在实现高速数据传输的同时尽量减小整个星载电子设备的体积和功耗。本文选择了IEEE 1394高速串行总线,IEEE 1394总线遵从CSR体系结构,支持热插拔和即插即用,支持等时和异步两种传输模式,是NASA推荐用于未来空间应用的数据总线之一。
本课题设计了以Actel FPGA作为主控单元的用于星载非智能设备IEEE 1394接口原理样机。原理样机中主要包括主控FPGA、IEEE 1394协议芯片组、LVDS接口、ADC和DAC接口以及RS232调试接口等。在FPGA对总线接口板的控制实现过程中,还选用了开源的MC8051 IP作为控制单元,实现了一个简单的片上可编程系统,并对IEEE 1394总线功能作了测试和验证。
本文详细介绍了课题的背景和国内外发展近况、IEEE 1394总线的技术概要;论述了方案确定和硬件设计的过程,以及FPGA控制逻辑和MC8051 IP在FPGA中的实现;说明了IEEE 1394数据包的格式,进行了IEEE 1394总线的功能测试,并阐明了MC8051控制软件的实现方法。本课题所开发的用于星载非智能设备的IEEE 1394总线接口原理样机经过完善后可用于星载非智能设备中,对未来IEEE 1394总线的星载应用具有借鉴意义。
On-board data bus is one of the crucial modules in on-board electronic systems, used for communication and data exchange among on-board electronic devices. The requirements of on-board data bus are improved with the development of space projects. It calls for a kind of more advanced bus to support high speed and real-time data transfers among electronic devices. On the other hand, spaceflight electronic systems are in miniaturization development. Spaceflight electronic systems’miniaturization brings out the possibility to enhance the performance of spacecraft, reduce the cost and the R&D time. Spaceflight electronic systems’miniaturization has become one of the trends of modern space project development. So it is significant to develop a kind of general, small, light high-speed on-board data bus interface in the future.
Some on-board devices may not have CPU modules in actual tasks, but they also need using high-speed data bus to communicate with other devices. Thereby, we have to develop a special small, light high-speed bus interface for such non-intellectual on-board devices, realizing the high-speed data transfers as well as reducing the volume and power dissipation. This article selects IEEE 1394 high-speed serial bus, which is one kind of future space data bus recommended by NASA. It follows IEEE CSR standard, supports asynchronous and isochronous transfers, and can be live attached and detached.
This project designs the prototype board of IEEE 1394 interface used in non-intellectual on-board, taking with an Actel FPGA chip as the main control module. The prototype includes FPGA, IEEE 1394 chipset, LVDS interface, Analog to Digital Converter and Digital to Analog Converter interface, as well as RS232 debug interface. The project also integrates the open source MC8051 IP core in FPGA when using FPGA to implement the interface control. Finally, the project tests and validates the IEEE 1394 interface system.
This article presents the background of the project and the development in detail, and also introduces the technical overview of IEEE 1394 high-speed serial bus; discusses how to establish the project and the whole hardware design, control logic design in FPGA and the MC8051 IP implementation; describes the IEEE 1394 package structures and functions test, and also shows the control soft realization in MC8051. The prototype designed in this article, after refinement, can be used in on-board electronic devices in the future. It has laid the foundation for on-board application of IEEE 1394 bus.
引文
[1] 中华人民共和国国务院新闻办公室.《2006 年中国的航天》白皮书.北京:2006 年10 月
[2] 安军社,张健,孙辉先.欧美空间电子技术的发展及启示.装备指挥技术学院学报.2006 年第 2 期:47-51
[3] 王明远,刘长柱.二十一世纪初期航天技术发展趋势.空间电子技术.2001 第 3 期:57-60
[4] 杨孟飞,郭树玲,王嵘,李军予.基于 SOC 技术的星载电子系统小型化.控制工程(北京).2005 年第 2 期:1-9
[5] 李慧军,惠平,曹松,陈小敏,孙辉先.星载数据总线技术的现在和未来.中国空间科学学会探测专业委员会第十五次学术会议论文集.2002 年.中国空间科学学会
[6] Stephen Buchner. Evaluation of Commercial Communication Network. Protocols for Space Application. http://radhome.gsfc.nasa.gov/radhome/papers/SEEWG03_Network.pdf
[7] Peter Shanmes. CCSDS and NASA Standards for Satellite Control Network Interoperability. http://sunset.usc.edu/gsaw/gsaw2002/s10c/shames.pdf
[8] http://www.sae.org/servlets/productDetail?PROD_TYP=STD&PROD_CD=AS5643A
[9] Randel C Blue, Gray S.Bolotin. X2000 advanced avionics project development of a new generation of avionics for space applications. Aerospace Conference2003
[10]Savio N.Chau, Joseph Smith, Ann T.Tai. A design-diversity based fault-tolerant COTS avionics bus network. Dependable Computing, 2001
[11]http://www.st.northropgrumman.com/media/presskits/mediaGallery/npoess/photos/media1_2_16358_19782.html#
[12]JPL Laboratory. X2000 Power System Control Architecture. http://trs-new.jpl.nasa.gov/dspace/bitstream/2014/37439/1/05-0806.pdf
[13]E.A.Bezerra, M.P.Gough and A.Buckley. A VHDL Inplementation of an On-board ACFApplication Targeting FPGAs. 2nd Annual Military and Aerospace Application of Programmable Device and Technologies Conference.1999
[14]Suerry Space Centure. A System-on-a-Chip for Small Satellote Data Processing and Control. http://microelectronics.esa.int/soc/chipsat_abstract.pdf
[15]王嵘,郭树玲.高速串行总线航天应用研究.控制工程(北京).2005 年第 5 期:1-10
[16]康咏岐.面向航天应用的 SpaceWire 节点单元的 IP 核设计与实现.微电子学与计算机.2005 年第 9 期:120-122
[17]李军予,梁洁玫,衣学慧.SOPC 技术在 LTU 微小型化中的应用.控制工程(北京).2005 年第 2 期:30-33
[18]周新发.基于 LEON 处理器的 SOPC 设计验证.控制工程(北京).2005 年第 2 期:51-59
[19]王宇舟,王二超.LENO2 微处理器 IP 核原理及应用.单片机与嵌入式系统应用.2005年第 8 期:41-45
[20]张伟功,段青亚,王剑峰,郝跃,刘曙蓉.航天器总线管理系统的 SOC 设计与研究.宇航学报.2005 年 26 卷 3 期:73-76
[21]姜汉龙译.FireWire 系统结构.北京:中国电力出版社.2001 年
[22]IEEE Std 1394-1995. IEEE Standard for a High Performance Serial Bus, 1995
[23]陈钢,李慧军,陈晓敏,孙辉先.IEEE 1394 总线及在空间应用的可行性.中国空间科学学会空间探测专业委员会第十三次学术会义论文集.2000 年.中国空间科学学会
[24]姜秀杰,孙辉先,王志华,张利.航天电子系统中电子元器件选用的途径分析.电子器件.2005 年 1 期:38-43
[25]Actel Corporation. Overview of iRoc Technologies’ Report “Radiation Results of the SER Test of Actel, Xilinx and Altera FPGA INstances”. 2004
[26]Texas Instruments. TSB12LV32(GP2Lynx)/TSB41LV03 Reference Schematic. 2003
[27]Texas Instruments. TSB41AB3 IEEE 1394a-2000 THREE-PORT CABLE TRANSCEIVER/ARBITER. 2003
[28]Texas Instruments. TSB12LV32-EP IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller Data Manual. 2004
[29]Actel Corporation. Actel ProASICplus Flash Family FPGAs. February 2007
[30]MAXIM. MAX152 Datasheet
[31]ANALOG DEVICES. AD5332 Datasheet. 2000
[32]National Semiconductor. DS90LV049, 3V LVDS Dual Line Driver with Dual Line Receiver. 2003
[33]刘韬,楼兴华.FPGA 数字电子系统设计与开发实例导航.北京:人民邮电出版社.2005 年
[34]黄智伟,王彦等.FPGA 系统设计与实践.北京:电子工业出版社.2005 年
[35]OreganoSystems. MC8051 IP Core User Guide. 2002
[36]http://www.thesycon.de/eng/vhpd.shtml
[2] 安军社,张健,孙辉先.欧美空间电子技术的发展及启示.装备指挥技术学院学报.2006 年第 2 期:47-51
[3] 王明远,刘长柱.二十一世纪初期航天技术发展趋势.空间电子技术.2001 第 3 期:57-60
[4] 杨孟飞,郭树玲,王嵘,李军予.基于 SOC 技术的星载电子系统小型化.控制工程(北京).2005 年第 2 期:1-9
[5] 李慧军,惠平,曹松,陈小敏,孙辉先.星载数据总线技术的现在和未来.中国空间科学学会探测专业委员会第十五次学术会议论文集.2002 年.中国空间科学学会
[6] Stephen Buchner. Evaluation of Commercial Communication Network. Protocols for Space Application. http://radhome.gsfc.nasa.gov/radhome/papers/SEEWG03_Network.pdf
[7] Peter Shanmes. CCSDS and NASA Standards for Satellite Control Network Interoperability. http://sunset.usc.edu/gsaw/gsaw2002/s10c/shames.pdf
[8] http://www.sae.org/servlets/productDetail?PROD_TYP=STD&PROD_CD=AS5643A
[9] Randel C Blue, Gray S.Bolotin. X2000 advanced avionics project development of a new generation of avionics for space applications. Aerospace Conference2003
[10]Savio N.Chau, Joseph Smith, Ann T.Tai. A design-diversity based fault-tolerant COTS avionics bus network. Dependable Computing, 2001
[11]http://www.st.northropgrumman.com/media/presskits/mediaGallery/npoess/photos/media1_2_16358_19782.html#
[12]JPL Laboratory. X2000 Power System Control Architecture. http://trs-new.jpl.nasa.gov/dspace/bitstream/2014/37439/1/05-0806.pdf
[13]E.A.Bezerra, M.P.Gough and A.Buckley. A VHDL Inplementation of an On-board ACFApplication Targeting FPGAs. 2nd Annual Military and Aerospace Application of Programmable Device and Technologies Conference.1999
[14]Suerry Space Centure. A System-on-a-Chip for Small Satellote Data Processing and Control. http://microelectronics.esa.int/soc/chipsat_abstract.pdf
[15]王嵘,郭树玲.高速串行总线航天应用研究.控制工程(北京).2005 年第 5 期:1-10
[16]康咏岐.面向航天应用的 SpaceWire 节点单元的 IP 核设计与实现.微电子学与计算机.2005 年第 9 期:120-122
[17]李军予,梁洁玫,衣学慧.SOPC 技术在 LTU 微小型化中的应用.控制工程(北京).2005 年第 2 期:30-33
[18]周新发.基于 LEON 处理器的 SOPC 设计验证.控制工程(北京).2005 年第 2 期:51-59
[19]王宇舟,王二超.LENO2 微处理器 IP 核原理及应用.单片机与嵌入式系统应用.2005年第 8 期:41-45
[20]张伟功,段青亚,王剑峰,郝跃,刘曙蓉.航天器总线管理系统的 SOC 设计与研究.宇航学报.2005 年 26 卷 3 期:73-76
[21]姜汉龙译.FireWire 系统结构.北京:中国电力出版社.2001 年
[22]IEEE Std 1394-1995. IEEE Standard for a High Performance Serial Bus, 1995
[23]陈钢,李慧军,陈晓敏,孙辉先.IEEE 1394 总线及在空间应用的可行性.中国空间科学学会空间探测专业委员会第十三次学术会义论文集.2000 年.中国空间科学学会
[24]姜秀杰,孙辉先,王志华,张利.航天电子系统中电子元器件选用的途径分析.电子器件.2005 年 1 期:38-43
[25]Actel Corporation. Overview of iRoc Technologies’ Report “Radiation Results of the SER Test of Actel, Xilinx and Altera FPGA INstances”. 2004
[26]Texas Instruments. TSB12LV32(GP2Lynx)/TSB41LV03 Reference Schematic. 2003
[27]Texas Instruments. TSB41AB3 IEEE 1394a-2000 THREE-PORT CABLE TRANSCEIVER/ARBITER. 2003
[28]Texas Instruments. TSB12LV32-EP IEEE 1394-1995 and P1394a Compliant General-Purpose Link-Layer Controller Data Manual. 2004
[29]Actel Corporation. Actel ProASICplus Flash Family FPGAs. February 2007
[30]MAXIM. MAX152 Datasheet
[31]ANALOG DEVICES. AD5332 Datasheet. 2000
[32]National Semiconductor. DS90LV049, 3V LVDS Dual Line Driver with Dual Line Receiver. 2003
[33]刘韬,楼兴华.FPGA 数字电子系统设计与开发实例导航.北京:人民邮电出版社.2005 年
[34]黄智伟,王彦等.FPGA 系统设计与实践.北京:电子工业出版社.2005 年
[35]OreganoSystems. MC8051 IP Core User Guide. 2002
[36]http://www.thesycon.de/eng/vhpd.shtml