网格NoC平台中的若干关键技术研究
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摘要
片上网络(NoC:Network-on-Chip)是一种针对多核SoC设计的新型片上通信架构。对于传统共享总线通信结构中存在的延迟、通信性能瓶颈以及设计效率问题,NoC提供了一种新的片上通信结构解决方案。本文首先论述了NoC的国内外研究现状,然后论述了以NoC为通信架构的系统芯片设计流程。在此基础上,我们针对二维网NoC拓扑结构,分析了其性能特点、路由算法、以及NoC中单个路由节点功耗和性能评估模型,并同时与通用的片上共享总线的性能与硬件开销进行了比较。
同时,低功耗是超大规模集成电路设计的一个趋势,特别是对一些嵌入式系统、移动终端以及手持设备。对于NoC设计,可以分别在各个层次,如物理层、链路层、网络层、应用层等降低NoC的能量消耗。本文针对NoC这种片上通信架构,主要研究在网络层和应用层进行低功耗设计的技术以及性能分析方法,其主要工作如下:
首先,针对超深亚微米半导体工艺下,片上通信的数据完整性日益严重的问题,提出了一种自适应的NoC链路数据保护方法。该方法根据通信链路的错误概率以及系统的可靠性约束要求,自适应的在片上通信链路的可靠等级与功耗之间进行折衷,使得满足片上通信链路数据完整性要求的同时,NoC的通信能量消耗最小。
其次,针对NoC采用网络通信的特点,提出了一种基于网络积分的NoC报文延迟计算方法。该方法通过对输入报文的到达曲线以及路由节点的服务曲线分析,采用网络积分理论,计算出报文在NoC中的传输延迟;同时对NoC中路由节点采用不同仲裁策略的报文延迟计算方法进行了研究,并在准确度上与周期准确级仿真进行了比较。
再次,针对NoC设计过程中IP核映射和路由分配两个关键步骤,提出了一种基于PSO的低功耗IP核映射和链路平衡的路由定制算法PLBMR。针对二维网格NoC,在提出了NoC能量消耗和通信链路负载平衡的数学计算方法的基础上,解决了IP核映射和路由分配的PSO粒子表示问题。但是对于不同的应用,各个IP之间的通信数据流类型会有很大差别,为了得到优化的性能,需要根据具体的应用设置合适的算法参数。
最后,针对不规则的2维NoC拓扑结构,提出一种避免死锁的低功耗全定制路由算法EA_TP。该路由算法以转弯禁止的死锁避免路由算法为基础,考虑链路长度以及链路上通信容量两个因数,选择合适的转弯被禁止,同时保证NoC的全连接,然后采用Dijkstra最短路由路径算法,构造所有通信流的路由路径。EA_TP算法采用路由表的方法构造定制路由,保证了在合理的面积开销范围内,解决了不规则NoC的死锁问题,同时使得NoC通信能量消耗最小。
Network-on-Chip is a new on-chip communication architecture for the multi-core SoC,it brings a new solution to the problem which the traditional shared bus has in delay,communicaiton performance bottleneck and design efficiency for the ultra-large scale circuit design. This thesis firstly depicts the research art of NoC, the shift of SoC design methodology and the design flow of NoC centric system-on-chip. Aiming to the 2D mesh NoC topology, we analysis it's performance character, routing algorithm, and the router's power and NoC's performance model, also we compare them with the shared bus architecture for the performance and cost.
Low power design is a trend for the ultra-large scale integrated circuit design, specially for the embedded system, mobile and hand device. For the NoC based system design, we can reduce the NoC energy consumption at the different design layer, which includes physical layer, link layer, network layer and application layer. In this thesis, we exploit the low power design technology in the NoC's application layer and network layer. The main works of this thesis are follows:
First of all, data integrality become a serious problem under the ultra-deep micro semiconductor technology. For the new NoC communication architecture, we propose an adaptive link data protection method. It can be adaptively trade-off between the energy consumption and reliability according with the communication condition of data links, which make NoC satisfy the requirement of reliability and minimize the energy consumption. This also reduces the energy consumption of NoC based SoC.
Secondly, we propose a delay computing method of NoC packet based on the characteristic of the NoC's network communication. Through analyzing the reach curve of input packet and the serve curve of NoC's router, the method computes the packet transporting delay through utilizing the network calculus theory. Furthermore, we exploit the delay computing method for various arbitration strategy in the NoC router, and compare the delays with the cycle accurate simulation results. It shows the accuracy of delay computing based on network calculus.
Moreover, we propose a two step PSO based low power and link-load balance algorithm for IP core mapping and routing path allocation. IP core's mapping and routing path's allocation are the two key steps in the NoC based system design. For the 2D mesh NoC, we propose the mathematical description for the NoC's communication energy consumption and link-load balance. Meanwhile, we also solve the PSO particle denotation for the IP core's mapping and routing path allocation. But for the various application, the communication flows among all IP cores have the great difference, thus for the purpose of the most optimized performance, we must configure the algorithm parameter according with the specific application.
Finally, for the irregular 2D mesh NoC, we propose a low power deadlock-free routing algorithm EA_TP. EA_TP is based on the turn-prohibited deadlock free routing . According with the link length and communication volume, and it prohibits the appropriate turn and guarantee the NoC's full connection. Then, EA_TP adopts the Dijkstra shortest path algorithm to customize all the flows routing path. EA_TP constructs the routing path with routing table, it prevents the irregular NoC deadlock and keep a low area cost while minimizing the communication link energy consumption.
同时,低功耗是超大规模集成电路设计的一个趋势,特别是对一些嵌入式系统、移动终端以及手持设备。对于NoC设计,可以分别在各个层次,如物理层、链路层、网络层、应用层等降低NoC的能量消耗。本文针对NoC这种片上通信架构,主要研究在网络层和应用层进行低功耗设计的技术以及性能分析方法,其主要工作如下:
首先,针对超深亚微米半导体工艺下,片上通信的数据完整性日益严重的问题,提出了一种自适应的NoC链路数据保护方法。该方法根据通信链路的错误概率以及系统的可靠性约束要求,自适应的在片上通信链路的可靠等级与功耗之间进行折衷,使得满足片上通信链路数据完整性要求的同时,NoC的通信能量消耗最小。
其次,针对NoC采用网络通信的特点,提出了一种基于网络积分的NoC报文延迟计算方法。该方法通过对输入报文的到达曲线以及路由节点的服务曲线分析,采用网络积分理论,计算出报文在NoC中的传输延迟;同时对NoC中路由节点采用不同仲裁策略的报文延迟计算方法进行了研究,并在准确度上与周期准确级仿真进行了比较。
再次,针对NoC设计过程中IP核映射和路由分配两个关键步骤,提出了一种基于PSO的低功耗IP核映射和链路平衡的路由定制算法PLBMR。针对二维网格NoC,在提出了NoC能量消耗和通信链路负载平衡的数学计算方法的基础上,解决了IP核映射和路由分配的PSO粒子表示问题。但是对于不同的应用,各个IP之间的通信数据流类型会有很大差别,为了得到优化的性能,需要根据具体的应用设置合适的算法参数。
最后,针对不规则的2维NoC拓扑结构,提出一种避免死锁的低功耗全定制路由算法EA_TP。该路由算法以转弯禁止的死锁避免路由算法为基础,考虑链路长度以及链路上通信容量两个因数,选择合适的转弯被禁止,同时保证NoC的全连接,然后采用Dijkstra最短路由路径算法,构造所有通信流的路由路径。EA_TP算法采用路由表的方法构造定制路由,保证了在合理的面积开销范围内,解决了不规则NoC的死锁问题,同时使得NoC通信能量消耗最小。
Network-on-Chip is a new on-chip communication architecture for the multi-core SoC,it brings a new solution to the problem which the traditional shared bus has in delay,communicaiton performance bottleneck and design efficiency for the ultra-large scale circuit design. This thesis firstly depicts the research art of NoC, the shift of SoC design methodology and the design flow of NoC centric system-on-chip. Aiming to the 2D mesh NoC topology, we analysis it's performance character, routing algorithm, and the router's power and NoC's performance model, also we compare them with the shared bus architecture for the performance and cost.
Low power design is a trend for the ultra-large scale integrated circuit design, specially for the embedded system, mobile and hand device. For the NoC based system design, we can reduce the NoC energy consumption at the different design layer, which includes physical layer, link layer, network layer and application layer. In this thesis, we exploit the low power design technology in the NoC's application layer and network layer. The main works of this thesis are follows:
First of all, data integrality become a serious problem under the ultra-deep micro semiconductor technology. For the new NoC communication architecture, we propose an adaptive link data protection method. It can be adaptively trade-off between the energy consumption and reliability according with the communication condition of data links, which make NoC satisfy the requirement of reliability and minimize the energy consumption. This also reduces the energy consumption of NoC based SoC.
Secondly, we propose a delay computing method of NoC packet based on the characteristic of the NoC's network communication. Through analyzing the reach curve of input packet and the serve curve of NoC's router, the method computes the packet transporting delay through utilizing the network calculus theory. Furthermore, we exploit the delay computing method for various arbitration strategy in the NoC router, and compare the delays with the cycle accurate simulation results. It shows the accuracy of delay computing based on network calculus.
Moreover, we propose a two step PSO based low power and link-load balance algorithm for IP core mapping and routing path allocation. IP core's mapping and routing path's allocation are the two key steps in the NoC based system design. For the 2D mesh NoC, we propose the mathematical description for the NoC's communication energy consumption and link-load balance. Meanwhile, we also solve the PSO particle denotation for the IP core's mapping and routing path allocation. But for the various application, the communication flows among all IP cores have the great difference, thus for the purpose of the most optimized performance, we must configure the algorithm parameter according with the specific application.
Finally, for the irregular 2D mesh NoC, we propose a low power deadlock-free routing algorithm EA_TP. EA_TP is based on the turn-prohibited deadlock free routing . According with the link length and communication volume, and it prohibits the appropriate turn and guarantee the NoC's full connection. Then, EA_TP adopts the Dijkstra shortest path algorithm to customize all the flows routing path. EA_TP constructs the routing path with routing table, it prevents the irregular NoC deadlock and keep a low area cost while minimizing the communication link energy consumption.
引文
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