基于FPGA的PWM控制器设计及应用
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摘要
数字电源与传统的模拟电源相比具有灵活变换、精确控制、实时监控、稳定可靠等优点,在近几年得到高速发展,尤其在高端领域是模拟电源不能替代的。随着越来越多的国际设计公司开始涉足数字电源,数字电源正成为电源领域的研究热点。现场可编程门阵列器件(FPGA)是一种新型集成电路,可以将众多的控制功能模块集成为一体,具有集成度高、实用性强、高性价比、便于开发等优点,因而具有广泛的应用前景。
     本文研究和设计了一款基于FPGA电压控制型PWM数字控制器,控制器结构分三个部分:ADC、PID控制器和数字PWM发生器。根据ADC的分辨率和采样率要求选用合适的A/D转换电路;数字PID控制器是通过设计连续域的PID控制器,利用零极点匹配方法将其转换成离散域PID控制器;数字PWM发生器的设计是根据系统精度要求确定分辨率要求,经分析比较各种方法后确定采用计数-比较方式实现。
     整个设计利用Altera公司的EDA工具QuartusⅡ软件,采用自顶向下的方法对该控制器进行了RTL级详细设计,运用模块化结构设计易于移植,整个控制系统便于功能扩展和升级。设计完成后,对各模块和系统进行了仿真,最后将程序下载到EP2C5Q208C8N芯片中进行了系统功能测试。
     数字控制器的系统验证是先通过Simulink建立系统模型,验证控制器的环路补偿特性和系统稳定性,然后将控制器应用于Buck电路进行测试,测试结果表明纹波系数为1.6%;在负载或输入电压变化情况下,电源系统的输出电压能快速恢复到稳定状态,总体性能达到预期设计目标。实验结果证明了理论分析的正确性和提出方案的可行性。
The digital power has many advantages, such as flexible transform, accurate control, real-time supervising and better stability. In recent years, digital powers play an irreplaceable role in senior power management applications. As more and more international power design companies set foot in digital power field, it becomes the focus of power design. FPGA (Field Programmable Gate Arrays) is a new type of IC (Integrated Circuit), integrating many control function modules. With advantages of full integration, good applicability, high performance-cost ratio and being developed easily, it has a variety of applications in many fields.
     Based on a FPGA development board, a digital converter with voltage feedback PWM control mode is designed. It includes ADC controller, digital PID compensator and digital PWM generator. According to the adaptive sample rate and resolution ratio, a suitable ADC can be choosed. To design digital PID Compensator, a continue form compensator can be designed before it was transformed into a discrete one. According to the precision and resolution of the system, counter-compare method can be used in digital PWM generator.
     With the top-to-down approach, RTL-level design of this controller is carried out based on QuartusⅡ. The design is easy to transplant and upgrade thanks to modularization. Each module is verified and the whole controller is simulated after the RTL level design. Finally, the designed file is downloaded to EP2C5Q208C8N chip at the FPGA kit to verify the system function.
     The test of the design has two steps. Firstly, the compensatory and stable characters of the system are tested in a system Simulink model. Secondly, buck circuit is tested by an oscillograph. The result indicates that the ripple ratio is 1.6% and the output voltage can recover to stable state rapidly when the load or the input voltage changes. The experimental results prove the feasibility of the proposed method.
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