超高速数据采集系统研究
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摘要
随着现代电气实验室、软件无线电、通信、图像采集等领域中数字处理技术的发展,对信号采集的速度及精度提出了越来越高的要求。但限于ADC速度的限制,一般只能采用低速ADC,通过特定方法,对高速信号进行采样。例如等价采样技术,简单地说就是在周期信号的一个或多个周期中只进行一次采样,利用周期信号的重复性,每次采样比上次偏移一个相位,从而采集整个波形。但该方法只适用于周期信号的采集。我们要研究的是可以采集各种信号波形的实时超高速采集方法。
时间交替采样系统利用M片采样速率为fs/M的ADC进行前端并行逐次采样,后端拼接的技术使整个采集系统的等效采样率达到fs。但这种结构会引入通道失配误差,不加以校正会严重影响整个ADC系统的性能,且校正的实现有一定难度。在超高速数据采集系统中,还是应尽量使用单片ADC构成数据采集系统。
本文从结构上可分为五部分:先对A/D芯片与数据采集板的现状和发展趋势进行全面分析;再研究非均匀采样数据的校正算法,并针对两片A/D交替采样的情况,提出了误差测量与校正算法;然后提出用两片A/D芯片并行分时采样,采样速率达400MSPS、分辨率为13bit的数据采集系统设计方案,另外还提出了用单片超高速A/D芯片实现采样速率达800MSPS、分辨率为8bit的数据采集系统设计方案;最后介绍超高速数据采集系统装配中的问题与心得。
With the development of modern electrical laboratory, communication and image acquisition, higher and higher acquisition speed and precision are recommended. But the speed of ADC is constraining the development of acquisition system. Usually we use some method with low speed ADC to satisfy the high speed requiment. For example, the equivelent sampling technologh sampled only once in one or several cycle times, and use the repeatability of cycle signal to reform the whole wave. But that method is only suitable for cycle signal. My aim is to find a high speed acquisiton method which is suitable for all kinds of signals.
The time interleaved ADC system works as: M parallel ADCs work with a sampling frequency fs/M and the system output are multiplexed together. This gives an overall sampling frequency fs. The drawback with this structure is the channel mismatch errors will occur in the system. These mismatch errors will degrade the system performance if they are uncorrected, and the correction is a complex work. It’s recommended to use one piece of ADC in ultra high-speed data acquisition system.
The work of this paper is introduced as follow: First, analysing the actuality and future of A/D chip and data acquisition system; Second, researching the revise arithmetic of non-uniform data acquisition based on two channel parallel A/D; Third, introducing a system using two pieces of A/D sampling time-sharing, then offering another one using one piece of ultra high-speed A/D; Final, explaining the key points of setup of ultra high-speed data acquisition system.
时间交替采样系统利用M片采样速率为fs/M的ADC进行前端并行逐次采样,后端拼接的技术使整个采集系统的等效采样率达到fs。但这种结构会引入通道失配误差,不加以校正会严重影响整个ADC系统的性能,且校正的实现有一定难度。在超高速数据采集系统中,还是应尽量使用单片ADC构成数据采集系统。
本文从结构上可分为五部分:先对A/D芯片与数据采集板的现状和发展趋势进行全面分析;再研究非均匀采样数据的校正算法,并针对两片A/D交替采样的情况,提出了误差测量与校正算法;然后提出用两片A/D芯片并行分时采样,采样速率达400MSPS、分辨率为13bit的数据采集系统设计方案,另外还提出了用单片超高速A/D芯片实现采样速率达800MSPS、分辨率为8bit的数据采集系统设计方案;最后介绍超高速数据采集系统装配中的问题与心得。
With the development of modern electrical laboratory, communication and image acquisition, higher and higher acquisition speed and precision are recommended. But the speed of ADC is constraining the development of acquisition system. Usually we use some method with low speed ADC to satisfy the high speed requiment. For example, the equivelent sampling technologh sampled only once in one or several cycle times, and use the repeatability of cycle signal to reform the whole wave. But that method is only suitable for cycle signal. My aim is to find a high speed acquisiton method which is suitable for all kinds of signals.
The time interleaved ADC system works as: M parallel ADCs work with a sampling frequency fs/M and the system output are multiplexed together. This gives an overall sampling frequency fs. The drawback with this structure is the channel mismatch errors will occur in the system. These mismatch errors will degrade the system performance if they are uncorrected, and the correction is a complex work. It’s recommended to use one piece of ADC in ultra high-speed data acquisition system.
The work of this paper is introduced as follow: First, analysing the actuality and future of A/D chip and data acquisition system; Second, researching the revise arithmetic of non-uniform data acquisition based on two channel parallel A/D; Third, introducing a system using two pieces of A/D sampling time-sharing, then offering another one using one piece of ultra high-speed A/D; Final, explaining the key points of setup of ultra high-speed data acquisition system.
引文
[1]吴石增,郭涛.超越器件发展的超高速数据采集系统.微型机与应用. 1999,12:17-19
[2]马海潮.超高速数据采集技术发展现状.测量技术学报. 2003,4:287-292
[3]沈兰荪.高速数据采集系统的原理与应用.人民邮电出版社.1995年
[4]沈兰荪.数据采集技术.中国科学技术大学出版社. 1990年
[5]刘进军,吕幼新,王洪.并行ADC采集系统的时间误差测量与校正.电子科技大学学报,2005,6(34):736-739
[6]解本钊,林茂六.提高并行交替式高速数字化系统分辨率的研究.电子学报,2001,9(29):1153-1156
[7] Texas Instruments. ADS5440 Data Sheet,2005
[8] Texas Instruments. REG104 Data Sheet, 2004
[9] MAXIM. MAX6225/MAX6241/MAX6250 Data Sheet
[10] ALTERA. CYCLONEⅡDevice Handbook
[11] Samsung. S3C44B0 Microprocessor Data Sheet
[12] Linear Technogy. LT1086 1.5A Low Dropout Positive Regulators Data Sheet
[13] Linear Technogy. LT1761 100mA Low Noise/LDO Power Data Sheet
[14] IMP Corp. IMP705 3/3.3/4.0VμP Supervisor Circuits. 1999
[15] Intel Corp. 3 Volt Advanced Boot Block Flash Memory. April 2000
[16] Winbond Electronics Corp. Preliminary W986416DH Data Sheet. May 2000
[17] Sipex Corp. True +3.0V to +5.5V RS-232 Transceivers Data Sheet. 2001
[18] Philips Semiconductor. PDIUSBD12 USB Interface Device With Parallel Bus Data Sheet. Jan 1999
[19] Cirrus Logic. CS8900A Product Data Sheet. 2001
[20]陈章龙,涂时亮.嵌入式系统-Intel StrongARM结构与开发.北京:北京航空航天大学出版社,2002年10月
[21] SPT. SPT7760 Data Sheet
[22] MOTOROLA. MC10E116 Data Sheet
[23] MOTOROLA. MC10E151 Data Sheet
[24] MOTOROLA. MC10125 Data Sheet
[25] CYPRESS. CY7C4261/CY7C4271 Data Sheet
[26] PLX. PCI9656 Data Book
[27] MOTOROLA. MPC8260
[28]宋杰,何友,唐小明.基于FPGA的超高速雷达信号实时采集存储系统.计算机应用,2005,11:18-20
[29]曾峰,侯亚宁,曾凡雨.印刷电路板设计与制作.电子工业出版社,2002
[30]楚义. PCB设计应注意的一些问题.电子质量,2003,6:58-58
[31]江思敏. PCB和电磁兼容设计.机械工业出版社,2006
[32]赵玉峰.电磁辐射的抑制技术.中国铁道出版社,1990
[33]王成军,王立华.高速系统PCB设计中的几个关键问题.开发与应用,2006,4:85-87
[34]王芳,戴文. LVDS信号的PCB设计.印制电路信息,2006,9:28～31
[35]杨志方,王泽成,涂坦,谈宏华,曹新莉.基于FPGA的多路高速数据采集系统的实现.武汉化工学院学报,2006,3(28):58-61
[36]张贵清,朱磊,颜露新,张天序.基于FPGA的多路同步实时数据采集方案设计与实现.测控技术,2005,24(12):26-29
[37]肖金球,刘传洋,仲嘉霖.基于FPGA的高速实时数据采集系统.电路与系统学报. 2005,10(6):128-131
[38]叶卫东,曹照连.基于FPGA的数据采集系统设计.制作与设计,2005,24(215):112-114
[39]刘斌兵,刘云海,汪燮彬.用FPGA实现高速大图像采集系统.电子技术,2006,1:60-63
[40]周骞,陈金树.超高速数据采集存储系统的设计与实现.计算机应用与研究,2003,8:139-141
[41]马海潮.超高速数据采集技术发展现状.测试技术学报,2003,4(17):287-292
[42]朱晓华.超高速数据采集系统的设计与实现.电测与仪表,2002,444(39):40-43
[43]樊秀云,欧宏武,杨文革.超高速数据采集系统设计与实现.装备指挥技术学院学报,2002,4(13):74-77
[44]吴石增,郭涛.超越器件发展的超高速数据采集系统.硬件纵横,1999,12:17-19
[45]黄斌,李晓明,王晶.高速数据实时采集系统的设计. EA产品与技术器件&电路,2004,7:136-138
[46]谢前进.基于PCI总线的超高速数据采集系统的设计与实现.计算机测量与控制,2002,10(9):612-613
[47]曾峦,熊伟,赵忠文.基于SCSI总线的超高速实时图像数据存储系统.应用天地,2001,12:56-58
[48]沈羽,齐伟民,张毅.实时高速数据采集与存储系统的一种实现方法.数采与监测,2006,22(1):83-85
[49] Sampling Time Offset Estimation Algorithm for Ultra High-Speed Waveform Digitizers Using Interleaving. IEEE Transactions on Instrumentation and Measurement,1990,1(30):71-75
[50] YIH-CHYUN JENQ.Digital Spectra of Nonuniformly Sampled Signals: Fundamentals and High-Speed Waveform Digitizers. IEEE Transactions on Instrumentation and Measurement, 1988, 2(37):245-251
[51] YIH-CHYUN JENQ.Perfect Reconstruction of Digital Spectrum from Nonuniformly Sampled Signals. IEEE Transactions on Instrumentation and Measurement, 1997, 3(46):649-652
[52] Peter von Walter, Albert Rausch. A 1GHz Flash-ADC Module in VMEbus. IEEE Transactions on Nuclear Science, VOL.39, NO.4, 1992, Page(s): 776~779
[53] Yu Lan, Yang Zhaoming, Jiang Jing, Zuo Delin, Tang Changwen. A High-Speed Multi-Channel Data Acquisition and Processing System for Coherent Radar. Proceedings of ICSP, 1998, Page(s): 1632~1635
[54] Al Chamé. PCI Bus in High Speed I/O Systems Applications. 1998 IEEE Aerospace Applications Conference, 1998, Page(s):505~514
[55] Naoki Kurosawa, Haruo Kobayashi, Kaoru Maruyama, Hidetake Sugawara, andKensuke Kobayashi. Explicit Analysis of Channel Mismatch Effects in Time-Interleaved ADC Systems. IEEE Transactions on Circuits and Systems, VOL.48, NO.3, 2001, Page(s):261~271
[56] Shafiq M.Jamal, Daihong Fu, Mahendra P.Singh, Paul J.Hurst, and Stephen H.Lewis. Calibration of Sample-Time Error in a Two-Channel Time-Interleaved Analog-to-Digital Converter. IEEE Transactions on Circuits and Systems, VOL.51, NO.1, 2004, Page(s):130~139
[57] Donald L.Gribble, James H.Herzog. A RISC Architecture for High-Speed Data Acquisition. IEEE Transactions on Instrumentation and Measurement, VOL.43, NO.3, 1994, Page(s):457~462
[58] N.M.Desai, Rinku Agrawal, J.G.Vachhani, V.R.Gujraty and S.S.Rana. High Speed Data Acquisition Systems for ISRO’s Airborne and Spaceborne Radars. Proceedings of INCEMIC, 2003, Page(s):29~36
[59]张清洪,吕幼新,王洪,刘霖.多片ADC并行采集系统的误差时域测量与校正.电讯技术,2005,4:189-193
[60]刘仁宇,张丽娟,张凯利.非均匀采样周期信号采样时间偏差估计算法研究.哈尔滨理工大学学报,1998,5(3):45-49
[61]林茂六,解本钊,权太范.幅度非均匀取样信号的数字频谱研究.电子学报,2000,5(28):25-28
[62]蔡菲娜,张建奇.基于非均匀同步采样的周期信号重构.浙江工业大学学报,2005,4(33):403-406
[63]王永刚,王砚方.低成本100MSPS数据采集系统研制.核电子学与探测技术,1996,3(16):194-196
[64]刘海华.基于PC高速数据采集的存储系统的设计.中南民族学院学报,1999,3(18):39-44
[65]朱勇.嵌入式系统的PCI接口设计.应用与设计,2002,12:7-9
[66]熊伟信,杨隆鑫.基于PCI总线的高速数据采集板的设计.中国传媒大学学报自然科学版,2006,3(13):77-81
[2]马海潮.超高速数据采集技术发展现状.测量技术学报. 2003,4:287-292
[3]沈兰荪.高速数据采集系统的原理与应用.人民邮电出版社.1995年
[4]沈兰荪.数据采集技术.中国科学技术大学出版社. 1990年
[5]刘进军,吕幼新,王洪.并行ADC采集系统的时间误差测量与校正.电子科技大学学报,2005,6(34):736-739
[6]解本钊,林茂六.提高并行交替式高速数字化系统分辨率的研究.电子学报,2001,9(29):1153-1156
[7] Texas Instruments. ADS5440 Data Sheet,2005
[8] Texas Instruments. REG104 Data Sheet, 2004
[9] MAXIM. MAX6225/MAX6241/MAX6250 Data Sheet
[10] ALTERA. CYCLONEⅡDevice Handbook
[11] Samsung. S3C44B0 Microprocessor Data Sheet
[12] Linear Technogy. LT1086 1.5A Low Dropout Positive Regulators Data Sheet
[13] Linear Technogy. LT1761 100mA Low Noise/LDO Power Data Sheet
[14] IMP Corp. IMP705 3/3.3/4.0VμP Supervisor Circuits. 1999
[15] Intel Corp. 3 Volt Advanced Boot Block Flash Memory. April 2000
[16] Winbond Electronics Corp. Preliminary W986416DH Data Sheet. May 2000
[17] Sipex Corp. True +3.0V to +5.5V RS-232 Transceivers Data Sheet. 2001
[18] Philips Semiconductor. PDIUSBD12 USB Interface Device With Parallel Bus Data Sheet. Jan 1999
[19] Cirrus Logic. CS8900A Product Data Sheet. 2001
[20]陈章龙,涂时亮.嵌入式系统-Intel StrongARM结构与开发.北京:北京航空航天大学出版社,2002年10月
[21] SPT. SPT7760 Data Sheet
[22] MOTOROLA. MC10E116 Data Sheet
[23] MOTOROLA. MC10E151 Data Sheet
[24] MOTOROLA. MC10125 Data Sheet
[25] CYPRESS. CY7C4261/CY7C4271 Data Sheet
[26] PLX. PCI9656 Data Book
[27] MOTOROLA. MPC8260
[28]宋杰,何友,唐小明.基于FPGA的超高速雷达信号实时采集存储系统.计算机应用,2005,11:18-20
[29]曾峰,侯亚宁,曾凡雨.印刷电路板设计与制作.电子工业出版社,2002
[30]楚义. PCB设计应注意的一些问题.电子质量,2003,6:58-58
[31]江思敏. PCB和电磁兼容设计.机械工业出版社,2006
[32]赵玉峰.电磁辐射的抑制技术.中国铁道出版社,1990
[33]王成军,王立华.高速系统PCB设计中的几个关键问题.开发与应用,2006,4:85-87
[34]王芳,戴文. LVDS信号的PCB设计.印制电路信息,2006,9:28～31
[35]杨志方,王泽成,涂坦,谈宏华,曹新莉.基于FPGA的多路高速数据采集系统的实现.武汉化工学院学报,2006,3(28):58-61
[36]张贵清,朱磊,颜露新,张天序.基于FPGA的多路同步实时数据采集方案设计与实现.测控技术,2005,24(12):26-29
[37]肖金球,刘传洋,仲嘉霖.基于FPGA的高速实时数据采集系统.电路与系统学报. 2005,10(6):128-131
[38]叶卫东,曹照连.基于FPGA的数据采集系统设计.制作与设计,2005,24(215):112-114
[39]刘斌兵,刘云海,汪燮彬.用FPGA实现高速大图像采集系统.电子技术,2006,1:60-63
[40]周骞,陈金树.超高速数据采集存储系统的设计与实现.计算机应用与研究,2003,8:139-141
[41]马海潮.超高速数据采集技术发展现状.测试技术学报,2003,4(17):287-292
[42]朱晓华.超高速数据采集系统的设计与实现.电测与仪表,2002,444(39):40-43
[43]樊秀云,欧宏武,杨文革.超高速数据采集系统设计与实现.装备指挥技术学院学报,2002,4(13):74-77
[44]吴石增,郭涛.超越器件发展的超高速数据采集系统.硬件纵横,1999,12:17-19
[45]黄斌,李晓明,王晶.高速数据实时采集系统的设计. EA产品与技术器件&电路,2004,7:136-138
[46]谢前进.基于PCI总线的超高速数据采集系统的设计与实现.计算机测量与控制,2002,10(9):612-613
[47]曾峦,熊伟,赵忠文.基于SCSI总线的超高速实时图像数据存储系统.应用天地,2001,12:56-58
[48]沈羽,齐伟民,张毅.实时高速数据采集与存储系统的一种实现方法.数采与监测,2006,22(1):83-85
[49] Sampling Time Offset Estimation Algorithm for Ultra High-Speed Waveform Digitizers Using Interleaving. IEEE Transactions on Instrumentation and Measurement,1990,1(30):71-75
[50] YIH-CHYUN JENQ.Digital Spectra of Nonuniformly Sampled Signals: Fundamentals and High-Speed Waveform Digitizers. IEEE Transactions on Instrumentation and Measurement, 1988, 2(37):245-251
[51] YIH-CHYUN JENQ.Perfect Reconstruction of Digital Spectrum from Nonuniformly Sampled Signals. IEEE Transactions on Instrumentation and Measurement, 1997, 3(46):649-652
[52] Peter von Walter, Albert Rausch. A 1GHz Flash-ADC Module in VMEbus. IEEE Transactions on Nuclear Science, VOL.39, NO.4, 1992, Page(s): 776~779
[53] Yu Lan, Yang Zhaoming, Jiang Jing, Zuo Delin, Tang Changwen. A High-Speed Multi-Channel Data Acquisition and Processing System for Coherent Radar. Proceedings of ICSP, 1998, Page(s): 1632~1635
[54] Al Chamé. PCI Bus in High Speed I/O Systems Applications. 1998 IEEE Aerospace Applications Conference, 1998, Page(s):505~514
[55] Naoki Kurosawa, Haruo Kobayashi, Kaoru Maruyama, Hidetake Sugawara, andKensuke Kobayashi. Explicit Analysis of Channel Mismatch Effects in Time-Interleaved ADC Systems. IEEE Transactions on Circuits and Systems, VOL.48, NO.3, 2001, Page(s):261~271
[56] Shafiq M.Jamal, Daihong Fu, Mahendra P.Singh, Paul J.Hurst, and Stephen H.Lewis. Calibration of Sample-Time Error in a Two-Channel Time-Interleaved Analog-to-Digital Converter. IEEE Transactions on Circuits and Systems, VOL.51, NO.1, 2004, Page(s):130~139
[57] Donald L.Gribble, James H.Herzog. A RISC Architecture for High-Speed Data Acquisition. IEEE Transactions on Instrumentation and Measurement, VOL.43, NO.3, 1994, Page(s):457~462
[58] N.M.Desai, Rinku Agrawal, J.G.Vachhani, V.R.Gujraty and S.S.Rana. High Speed Data Acquisition Systems for ISRO’s Airborne and Spaceborne Radars. Proceedings of INCEMIC, 2003, Page(s):29~36
[59]张清洪,吕幼新,王洪,刘霖.多片ADC并行采集系统的误差时域测量与校正.电讯技术,2005,4:189-193
[60]刘仁宇,张丽娟,张凯利.非均匀采样周期信号采样时间偏差估计算法研究.哈尔滨理工大学学报,1998,5(3):45-49
[61]林茂六,解本钊,权太范.幅度非均匀取样信号的数字频谱研究.电子学报,2000,5(28):25-28
[62]蔡菲娜,张建奇.基于非均匀同步采样的周期信号重构.浙江工业大学学报,2005,4(33):403-406
[63]王永刚,王砚方.低成本100MSPS数据采集系统研制.核电子学与探测技术,1996,3(16):194-196
[64]刘海华.基于PC高速数据采集的存储系统的设计.中南民族学院学报,1999,3(18):39-44
[65]朱勇.嵌入式系统的PCI接口设计.应用与设计,2002,12:7-9
[66]熊伟信,杨隆鑫.基于PCI总线的高速数据采集板的设计.中国传媒大学学报自然科学版,2006,3(13):77-81