基于DSP+FPGA的图像处理电路板硬件设计
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摘要
波前处理机是自适应光学系统中实时信号处理和运算的核心,随着自适应光学系统得发展,波前传感器的采样频率越来越高,这就要求波前处理机必须有更强的数据处理能力以保证系统的实时性。在整个波前处理机的工作流程中,对CCD传来的实时图像数据进行实时处理是第一步,也是十分重要的一步。如果不能保证图像处理的实时性,那么后续的处理过程都无从谈起。因此,研制高性能的图像处理平台,对波前处理机性能的提高具有十分重要的意义。
     论文介绍了本研究课题的背景以及国内外图像处理技术的应用和发展状况,接着介绍了传统的专用和通用图像处理系统的结构、特点和模型,并通过分析DSP芯片以及DSP系统的特点,提出了基于DSP和FPGA芯片的实时图像处理系统。该系统不同于传统基于PC机模式的图像处理系统,发挥了DSP和FPGA两者的优势,能更好地提高图像处理系统实时性能,同时也最大可能地降低成本。
     论文根据图像处理系统的设计目的、应用需求确定了器件的选型。介绍了主要的器件,接着从系统架构、逻辑结构、硬件各功能模块组成等方面详细介绍了DSP+FPGA图像处理系统硬件设计,并分析了包括各种参数指标选择、连接方式在内的具体设计方法以及应该注意的问题。
     论文在阐述传输线理论的基础上,在制作PCB电路板的过程中,针对高速电路设计中易出现的问题,详细分析了高速PCB设计中的信号完整性问题,包括反射、串扰等,说明了高速PCB的信号完整性、电源完整性和电磁兼容性问题及其解决方法,进行了一定的理论和技术探讨和研究。
     论文还介绍了基于FPGA的逻辑设计,包括了图像采集模块的工作原理、设计方案和SDRAM控制器的设计,介绍了SDRAM的基本操作和工作时序,重点阐述系统中可编程器件内部模块化SDRAM控制器的设计及仿真结果。
     论文最后描述了硬件系统的测试及调试流程,并给出了部分的调试结果。
     该系统主要优点有:实时性、高速性。硬件设计的执行速度,在高速DSP和FPGA中实现信号处理算法程序,保证了系统实时性的实现;性价比高。自行研究设计的电路及硬件系统比较好的解决了高速实时图像处理的需求。
In adaptive optics system (AOS), wavefront processor is the core element of the real-time signal processing. With the development of AOS, higher frame rate of the wavefront sensor is necessary, which requires the wavefront processor has more powerful data processing to ensure the real-time of the system. In the whole working step of the AOS, deal with the real-time image from CCD is the first and important step. All subsequences processing can not go on without the image processing. Therefore, the comprehensive performance of image processor is a great significance to AOS.
     Not only the background of the research problem and the use state of image processing technology through the world but also the frame, characteristic and model of traditional special and universal image processing system are discussed in the thesis. After analyzing the characters of DSPs chip and DSP system, the thesis introduces a real time image processing system based on the DSP&FPGA. This system can vary from the traditional image processing system based on PC mode in character, improves its performance in the field of real time than ever and reduces the cost of the system in most possible.
     The thesis confirms the parts of an apparatus select from the design purpose and appliance requirement. The thesis particular introduces the image processing system design about hardware based on DSP&FPGA from its system build-up,logic frame and each function module of the system and analyzed the design technology and the method of realization in details.
     In the next chapter, based on the introduction of basic transmission line theory in the thesis, aim at the problem in high-speed circuit, high frequency signal integrity problem is stated, including reflection, crosstalk, etc. And explains focuses on how to solve SI, PI and EMC problems in high-speed PCB design.
     Lastly, the thesis introducs the logic design based on FPGA. Including the working principle and design project of the image incept module. The thesis introduces the basic operation and the operation timing of SDRAM. Expatiates the SDRAM controller modularization design based on FPGA. Lastly, the thesis shows us the emulator result.
     Lastly, the thesis describes the hardware testing and debugging, and shows us some results.
     The system is specialized in two aspects: one is high-speed and real-time because of the devices, the programme can running in DSP and FPGA assure the design purpose.The other one is high-powered and better cost-effective. The hardware design can resolve the problems of the real-time image processing system.
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