基于FPGA的玻璃缺陷图像采集预处理系统设计
摘要
玻璃在生产过程中，会产生各种各样的缺陷，比如：气泡、条纹和结石。这些缺陷都是在熔制过程中发生的。对于玻璃缺陷的允许程度，取决于该制品的用途。一般来说，不允许玻璃中有大量的明显的缺陷，否则会影响玻璃的外观质量，降低玻璃的透光性，机械强度和热稳定性，造成大量的废品和次品。
本文首先分析了玻璃缺陷采集处理系统的现状，比较FPGA、DSP和ASIC三种芯片作为图像采集处理系统核心芯片的优缺点，结合项目背景和需求，提出基于FPGA的图像采集处理系统的整体方案。该方案中各个外围接口的控制逻辑、芯片控制逻辑、算法处理模块均由FPGA实现。接着详细介绍了玻璃缺陷检测中图像预处理系统的设计方案，实现了具有前端视频采集、图像预处理功能的FPGA子系统。该系统采用Altera公司的FPGA芯片作为中央处理器，由图像采集模块、异步FIFO模块、图像帧存储控制模块、图像低级处理模块、通信接口模块和FPGA配置电路组成。其中图像传感器OV9121在FPGA控制下负责图像采集，两片SDRAM作为视频图像的缓存，采样控制和滤波算法在FPGA内部实现。
在本文中图像采集部分包括OV9121初始化模块、采样控制模块和SDRAM控制模块。初始化模块主要是根据设计要求，设定OV9121的工作模式、图像的分辨率、帧频等参数；采样控制模块主要提供OV9121采集图像需要的控制信号；SDRAM控制模块主要负责缓存OV9121输出的图像数据，并将图像数据送FPGA滤波模块处理。
本文最后对常见图像预处理算法做出分析，包括图像的滤波与边缘检测等处理方法，得出预处理中卷积算法是重复使用较多的算法，最后来对卷积算法的FPGA实现进行了详细的说明，并讨论FPGA实现卷积算法方案上的改进，使得系统的图像处理速度得到提高，从而提高整个系统的性能。
All kinds of glass defect will occur during the melting production, such as airbladder, stria and concretiono. The precision of glass depends on where and how the products are used. Generally speaking, lots of obvious glass defect are not allowed which will reduce appearance quality, transparence, mechanical intensity and heat stability, and can bring plenty of wasters.
Firstly, the current state of image collection and process systems were introduced, and then, the system's merits and demerits were compared separately which based on FPGA、DSP and ASIC , considering the background and demands of the project, the whole architecture of image collection and process system were brought forward which based on FPGA. In system, control logic module of peripheral interface、chips control logic module and algorithms module are all implemented by FPGA. And then, the solution that image pre-processing system in image detection system was detailedly introduced and FPGA subsystem was implemented which had the function of image capture and image pre-processing. The system used Alters Corporation's FPGA as the central processor. It was composed of image capture module, asynchronous FIFO module, image frame storing control module, image low-level processing module, communication module and FPGA configuration circuit. OV9121 takes charge of image collection controlled by FPGA, and the two SDRAM are image buffer storage, image collection and filter module is realized in the FPGA.
The system consists of OV9121 initialization module, image collection control module, SDRAM control module. Initialization module configure OV9121's work mode, resolution, frame frequency which based on the system acquitment; Image collection control module provide control signal that OV9121 need when collecting image, SDRAM control module major answer for image data buffer and deliver these data to filter module.
At the end of this article, the familiar image preprocess algorithms are introduced, including filters and edge detection of the image, summarize that the convolution algorithms is the most important algorithms of preprocess, finally, the convolution algorithms based on FPGA were introduced detailedly, then discuss optimization of scheme that FPGA realize the convolution algorithms, which cause the image process speed a big progess,and these improve the performance of the system.
本文首先分析了玻璃缺陷采集处理系统的现状，比较FPGA、DSP和ASIC三种芯片作为图像采集处理系统核心芯片的优缺点，结合项目背景和需求，提出基于FPGA的图像采集处理系统的整体方案。该方案中各个外围接口的控制逻辑、芯片控制逻辑、算法处理模块均由FPGA实现。接着详细介绍了玻璃缺陷检测中图像预处理系统的设计方案，实现了具有前端视频采集、图像预处理功能的FPGA子系统。该系统采用Altera公司的FPGA芯片作为中央处理器，由图像采集模块、异步FIFO模块、图像帧存储控制模块、图像低级处理模块、通信接口模块和FPGA配置电路组成。其中图像传感器OV9121在FPGA控制下负责图像采集，两片SDRAM作为视频图像的缓存，采样控制和滤波算法在FPGA内部实现。
在本文中图像采集部分包括OV9121初始化模块、采样控制模块和SDRAM控制模块。初始化模块主要是根据设计要求，设定OV9121的工作模式、图像的分辨率、帧频等参数；采样控制模块主要提供OV9121采集图像需要的控制信号；SDRAM控制模块主要负责缓存OV9121输出的图像数据，并将图像数据送FPGA滤波模块处理。
本文最后对常见图像预处理算法做出分析，包括图像的滤波与边缘检测等处理方法，得出预处理中卷积算法是重复使用较多的算法，最后来对卷积算法的FPGA实现进行了详细的说明，并讨论FPGA实现卷积算法方案上的改进，使得系统的图像处理速度得到提高，从而提高整个系统的性能。
All kinds of glass defect will occur during the melting production, such as airbladder, stria and concretiono. The precision of glass depends on where and how the products are used. Generally speaking, lots of obvious glass defect are not allowed which will reduce appearance quality, transparence, mechanical intensity and heat stability, and can bring plenty of wasters.
Firstly, the current state of image collection and process systems were introduced, and then, the system's merits and demerits were compared separately which based on FPGA、DSP and ASIC , considering the background and demands of the project, the whole architecture of image collection and process system were brought forward which based on FPGA. In system, control logic module of peripheral interface、chips control logic module and algorithms module are all implemented by FPGA. And then, the solution that image pre-processing system in image detection system was detailedly introduced and FPGA subsystem was implemented which had the function of image capture and image pre-processing. The system used Alters Corporation's FPGA as the central processor. It was composed of image capture module, asynchronous FIFO module, image frame storing control module, image low-level processing module, communication module and FPGA configuration circuit. OV9121 takes charge of image collection controlled by FPGA, and the two SDRAM are image buffer storage, image collection and filter module is realized in the FPGA.
The system consists of OV9121 initialization module, image collection control module, SDRAM control module. Initialization module configure OV9121's work mode, resolution, frame frequency which based on the system acquitment; Image collection control module provide control signal that OV9121 need when collecting image, SDRAM control module major answer for image data buffer and deliver these data to filter module.
At the end of this article, the familiar image preprocess algorithms are introduced, including filters and edge detection of the image, summarize that the convolution algorithms is the most important algorithms of preprocess, finally, the convolution algorithms based on FPGA were introduced detailedly, then discuss optimization of scheme that FPGA realize the convolution algorithms, which cause the image process speed a big progess,and these improve the performance of the system.
引文
[1] 章毓晋，图像工程上册-图像处理和分析[M]，清华大学出版社，2000：25-148．
[2] 王丽萍，蓝天，王少丰等．玻璃缺陷在线自动检测设备性能及实践[J]．玻璃，2003(5)：46-48．
[3] 李巧先．关于玻璃缺陷在线检测技术的研究[J]．上海计量测试，1994(4)：26-28．
[4] Altera Inc. Ltd. Cyclone Device Datasheet[D]. Altera Inc. Ltd, 2003: 23-125.
[5] Altera Inc. ByteBlasterMV Parallel Port Download Cable Data Sheet v3.3. Altera Inc. 2002
[6] Andy G. Ye and David M. Lewis, Procedural Texture Mapping on FPGA [J]. Proceedings of the ACM/SIGDA International Sympisium on FPGA, Feb 1999, 112-120.
[7] P. Zhong, M. Martonosi and P. Ashar, FPGA-based SAT solver architecture with near-zero systhesis and layout over head[J]. IEEE Proc. -Comput. Digit. Tech., May 2000, Vol.147, No.3, 135-141.
[8] Donald MacVicar and Satnam Singh. Accelerating DTP with reconfigurable computing engines[J]. Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, volume 1482 of Lecture Notes in Computer Science, Aug 1998, 391-395
[9] T. Adnrews, W. Alberts. Operating System Design and Im-plementaion[J]. New Jersey: Prentice-Hall, Inc. 1997: 300-323.
[10] Realtek Semi-conductor Co. Ltd. Realtek full-duplex ethernet controller with plug and play function specification[M]. 2001. 1-58.
[11] 赵丕风，徐元欣，赵亮，李式巨．多路读写的SDRAM接口设计[J]．电子技术应用，1999，34-35．
[12] 吴皓，刘鹏，蔡钟，王维东．视频采集系统SDRAM控制器的FPGA实现[J]．中国有线电视，2003，22-25．
[13] National Semiconductor Corp. LVDS Owner's manual. National Semiconductor Corp Revision 2.0, 2000: 24-123.
[14] Mark. I. Montrose. EMC and the Printed Circuit Board: Design[J], Theory, and Layout Made Simple. New York, the Institute and Electronics Engineers, 2002(14): 112-120.
[15] J. Batlle, J. Marti, P Ridao, A New FPGA/DSP-Based Parallel Architecture for Real-Time Image Processing[J], Real-Time Imaging, 2002, 8(5), 345-356.
[16] Peter M. Athanas, A. Lynn Abbott Addressing the Computational Requirements of Image Processing with a Custom Computing Machine: An Overview[J], The Ninth International Parallel Processing Symposium, April 1995, 412-417.
[17] 李玉山等，图像采集及边缘提取，ASIC设计[J]．西安电子科技大学学报，1995，Vol．22，No．1．
[18] R Halverson, Art Lew, FPGAs for expression level parallel processing[J], Microprocessors and Microsystems, 1995, 533-540.
[19] Bruce Draper, Walid Najjar, Wim Bohm, Compiling and optimizing image processing algorithms for FPGA's Workshop on Computer[J], Architecture for Machine Performance, 2000. 222-231.
[20] Samir Tagzout, Karim Achour, Oualid Djekoune, Hough transform algorithm for FPGA implementation[J], Signal Processing, 2001(81), 1295-1301.
[21] Gerasimos Louverdis, Ioannis Andreadis and Antonios Gasteratos, A New Content Based Median Filter[J], 12th European Signal Processing Conference (EUSIPCO 2004), 6-10 September 2004, Vienna, Austria, 1337-1340.
[22] 付忠良．图像阈值选取方法的构造[J]．中国图像图形学报，2000，30(4)：427-441．
[23] 刘旨春，王敬儒．基于FPGA设计的图像增强预处理器[J]．光电工程，2001，28(3)：44-45
[24] 赵震甲．使用FIFO完成数据传输与同步[J]．中国集成电路，2005(8)：34-36．
[25] 吴自信，张嗣忠．异步FIFO结构及FPGA设计[J]．单片机与嵌入式系统，2003(8)：50-52．
[26] 朱鹏飞，赵雅兴．视频图像捕获系统SRAM控制器的FPGA实现[J]．半导体技术，2002(6)：66-68．
[27] 李雷鸣，张焕春一种基于FPGA的图像中值滤波器的硬件实现[J]．电子工程师，2004(2)：12-15．
[28] 刘常杰．基于FPGA高速视觉检测系统的研究[J]．仪器仪表学报，2001(6)：23-24．
[29] 胡海涛．基于TMS320C67xx的便携式实时视频检测系统[J]．计算机工程，2005(21)：69-71．
[30] 黄文清，汪亚明等．计算机视觉技术在工业领域中的应用[J]．浙江工程学院学报，2002(6)：88-90．
[31] 梁吉，蒋式勤等．视觉检测系统及其应用[J]．微计算机信息，2003(12)：63-66．
[32] 李立轻，黄秀宝．图像处理用于玻璃疵点自动检测的研究进展[J]．东华大学学报，2002．828(4)：118-122．
[33] 李萍．基于PCI软核的PCI总线接口设计与实现[J]．电子技术应用，2001(1)：24-27．
[34] Zhen Luo and Margaret Martonosi. Accelerating Pipelined Integer and Floating Accumulations in Configurable hardware with Delayed Addition Techniques Point[J]. Ieee Transactions on computer, 2000, 49(3): 139-146.
[35] Masaaki. Introduction to robust, reliable, and High-Speed Power-Line Communication Systems[J]. Communications and Computer Sciences. 2001 (12): 180-183.
[36] H Meng, Y L Guan, S Chen. Modeling and Analysis of Noise Effects on Broadband Power Line Communications[J]. IEEE TRANSACTIONS ON POWER DELIVERY, 2005(2): 201-203.
[37] 张凤珊，国澄明．基于FPGA的高清晰度电视显示测试信号发生器的研究与实现[J]．天津大学学报，2003(11)：45-48
[38] 张涛，国澄明，国狄非．HDTV视频同步与消隐时序控制信号的CPLD设计[J]．天津大学学报，2003(5)：123-125
[39] M. H. Shwehdi. A. Z. Khan. A Power Line Data Communication Interface using Spread Spectrum Tecnology in Home Automation [J]. IEEE transactions on power delivery, 1996(11): 1232-1237.
[40] 唐辉，郑晓明，刘志基于SOPC技术的事故现场处理平台设计与实现[J]．电子设计与应用，2005(1)：110-113．
[41] 林明．基于FPGA的数字图像显示系统[J]．单片机与嵌入式应用，2002(23)：927．
[42] 牛风举，朱明程．芯片设计中的IP技术[J]．半导体技术，2001(2)：214-218．
[43] 李如春，秦苗．基于FPGA／CPLD的小型片上系统的设计[J]．浙江工业大学学报，2001(29)：312-315
[44] 朱策，陶德源，何振亚，条纹图象的细化算法研究[J]，信号处理，1995．9，Vol．11，No．3
[45] 黄国亮，乌敏贤，金国藩，严瑛白，干涉条纹快速预处理的新方法[J]，光电工程，1994．2，Vol．21．No．1
[46] Mihran Tuceryan, A. K. Jain, "Texture Analysis". in Handbook of PatternRecognition and Computer Vision[J], C. H. Chen, et al. (eds.), World Scientific Publishing Co., 1993,. 235-276.
[47] Kieran G., Arkin, Natural Demodulation of 2D Fringe Patterns[J], The Fourthlnternational Workshop on Automatic Processing of Fringe Patterns, Bremen,Germany, September, 2001: 111-114
[2] 王丽萍，蓝天，王少丰等．玻璃缺陷在线自动检测设备性能及实践[J]．玻璃，2003(5)：46-48．
[3] 李巧先．关于玻璃缺陷在线检测技术的研究[J]．上海计量测试，1994(4)：26-28．
[4] Altera Inc. Ltd. Cyclone Device Datasheet[D]. Altera Inc. Ltd, 2003: 23-125.
[5] Altera Inc. ByteBlasterMV Parallel Port Download Cable Data Sheet v3.3. Altera Inc. 2002
[6] Andy G. Ye and David M. Lewis, Procedural Texture Mapping on FPGA [J]. Proceedings of the ACM/SIGDA International Sympisium on FPGA, Feb 1999, 112-120.
[7] P. Zhong, M. Martonosi and P. Ashar, FPGA-based SAT solver architecture with near-zero systhesis and layout over head[J]. IEEE Proc. -Comput. Digit. Tech., May 2000, Vol.147, No.3, 135-141.
[8] Donald MacVicar and Satnam Singh. Accelerating DTP with reconfigurable computing engines[J]. Proceedings of the 8th International Workshop on Field-Programmable Logic and Applications, volume 1482 of Lecture Notes in Computer Science, Aug 1998, 391-395
[9] T. Adnrews, W. Alberts. Operating System Design and Im-plementaion[J]. New Jersey: Prentice-Hall, Inc. 1997: 300-323.
[10] Realtek Semi-conductor Co. Ltd. Realtek full-duplex ethernet controller with plug and play function specification[M]. 2001. 1-58.
[11] 赵丕风，徐元欣，赵亮，李式巨．多路读写的SDRAM接口设计[J]．电子技术应用，1999，34-35．
[12] 吴皓，刘鹏，蔡钟，王维东．视频采集系统SDRAM控制器的FPGA实现[J]．中国有线电视，2003，22-25．
[13] National Semiconductor Corp. LVDS Owner's manual. National Semiconductor Corp Revision 2.0, 2000: 24-123.
[14] Mark. I. Montrose. EMC and the Printed Circuit Board: Design[J], Theory, and Layout Made Simple. New York, the Institute and Electronics Engineers, 2002(14): 112-120.
[15] J. Batlle, J. Marti, P Ridao, A New FPGA/DSP-Based Parallel Architecture for Real-Time Image Processing[J], Real-Time Imaging, 2002, 8(5), 345-356.
[16] Peter M. Athanas, A. Lynn Abbott Addressing the Computational Requirements of Image Processing with a Custom Computing Machine: An Overview[J], The Ninth International Parallel Processing Symposium, April 1995, 412-417.
[17] 李玉山等，图像采集及边缘提取，ASIC设计[J]．西安电子科技大学学报，1995，Vol．22，No．1．
[18] R Halverson, Art Lew, FPGAs for expression level parallel processing[J], Microprocessors and Microsystems, 1995, 533-540.
[19] Bruce Draper, Walid Najjar, Wim Bohm, Compiling and optimizing image processing algorithms for FPGA's Workshop on Computer[J], Architecture for Machine Performance, 2000. 222-231.
[20] Samir Tagzout, Karim Achour, Oualid Djekoune, Hough transform algorithm for FPGA implementation[J], Signal Processing, 2001(81), 1295-1301.
[21] Gerasimos Louverdis, Ioannis Andreadis and Antonios Gasteratos, A New Content Based Median Filter[J], 12th European Signal Processing Conference (EUSIPCO 2004), 6-10 September 2004, Vienna, Austria, 1337-1340.
[22] 付忠良．图像阈值选取方法的构造[J]．中国图像图形学报，2000，30(4)：427-441．
[23] 刘旨春，王敬儒．基于FPGA设计的图像增强预处理器[J]．光电工程，2001，28(3)：44-45
[24] 赵震甲．使用FIFO完成数据传输与同步[J]．中国集成电路，2005(8)：34-36．
[25] 吴自信，张嗣忠．异步FIFO结构及FPGA设计[J]．单片机与嵌入式系统，2003(8)：50-52．
[26] 朱鹏飞，赵雅兴．视频图像捕获系统SRAM控制器的FPGA实现[J]．半导体技术，2002(6)：66-68．
[27] 李雷鸣，张焕春一种基于FPGA的图像中值滤波器的硬件实现[J]．电子工程师，2004(2)：12-15．
[28] 刘常杰．基于FPGA高速视觉检测系统的研究[J]．仪器仪表学报，2001(6)：23-24．
[29] 胡海涛．基于TMS320C67xx的便携式实时视频检测系统[J]．计算机工程，2005(21)：69-71．
[30] 黄文清，汪亚明等．计算机视觉技术在工业领域中的应用[J]．浙江工程学院学报，2002(6)：88-90．
[31] 梁吉，蒋式勤等．视觉检测系统及其应用[J]．微计算机信息，2003(12)：63-66．
[32] 李立轻，黄秀宝．图像处理用于玻璃疵点自动检测的研究进展[J]．东华大学学报，2002．828(4)：118-122．
[33] 李萍．基于PCI软核的PCI总线接口设计与实现[J]．电子技术应用，2001(1)：24-27．
[34] Zhen Luo and Margaret Martonosi. Accelerating Pipelined Integer and Floating Accumulations in Configurable hardware with Delayed Addition Techniques Point[J]. Ieee Transactions on computer, 2000, 49(3): 139-146.
[35] Masaaki. Introduction to robust, reliable, and High-Speed Power-Line Communication Systems[J]. Communications and Computer Sciences. 2001 (12): 180-183.
[36] H Meng, Y L Guan, S Chen. Modeling and Analysis of Noise Effects on Broadband Power Line Communications[J]. IEEE TRANSACTIONS ON POWER DELIVERY, 2005(2): 201-203.
[37] 张凤珊，国澄明．基于FPGA的高清晰度电视显示测试信号发生器的研究与实现[J]．天津大学学报，2003(11)：45-48
[38] 张涛，国澄明，国狄非．HDTV视频同步与消隐时序控制信号的CPLD设计[J]．天津大学学报，2003(5)：123-125
[39] M. H. Shwehdi. A. Z. Khan. A Power Line Data Communication Interface using Spread Spectrum Tecnology in Home Automation [J]. IEEE transactions on power delivery, 1996(11): 1232-1237.
[40] 唐辉，郑晓明，刘志基于SOPC技术的事故现场处理平台设计与实现[J]．电子设计与应用，2005(1)：110-113．
[41] 林明．基于FPGA的数字图像显示系统[J]．单片机与嵌入式应用，2002(23)：927．
[42] 牛风举，朱明程．芯片设计中的IP技术[J]．半导体技术，2001(2)：214-218．
[43] 李如春，秦苗．基于FPGA／CPLD的小型片上系统的设计[J]．浙江工业大学学报，2001(29)：312-315
[44] 朱策，陶德源，何振亚，条纹图象的细化算法研究[J]，信号处理，1995．9，Vol．11，No．3
[45] 黄国亮，乌敏贤，金国藩，严瑛白，干涉条纹快速预处理的新方法[J]，光电工程，1994．2，Vol．21．No．1
[46] Mihran Tuceryan, A. K. Jain, "Texture Analysis". in Handbook of PatternRecognition and Computer Vision[J], C. H. Chen, et al. (eds.), World Scientific Publishing Co., 1993,. 235-276.
[47] Kieran G., Arkin, Natural Demodulation of 2D Fringe Patterns[J], The Fourthlnternational Workshop on Automatic Processing of Fringe Patterns, Bremen,Germany, September, 2001: 111-114